FGSD12SR6012A_技术文档

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

The Digital Tomodachi Series of non-isolated dc-dc

converters deliver exceptional electrical and thermal

performance in DOSA based footprints for

Point-of-Load converters. Operating from

a

3.0Vdc-14.4Vdc input, these are the converters of

choice for Intermediate Bus Architecture (IBA) and

Distributed Power Architecture applications that

require high efficiency, tight regulation, and high

reliability in elevated temperature environments with

low airflow. The PMBus interface supports a range of

commands to both control and monitor the module.

The module also includes the Tunable Loop™

feature that allows the user to optimize the dynamic

response of the converter to match the load with

reduced amount of output capacitance leading to

savings on cost and PWB area.

The FGSD12SR6012*A converter of the Tomodachi

Series delivers 12A of output current at a tightly

regulated programmable and PMBus control output

voltage of 0.45Vdc to 5.5Vdc. The thermal

Features



Compliant to RoHS II EU “Directive 2011/65/EC“

Delivers up to 12A (66W)

High efficiency, no heatsink required

Negative and Positive ON/OFF logic

DOSA based

Small size: 12.2 x 12.2 x 8.5mm

(0.48 in x 0.48 in x 0.335 in)

Tape & reel packaging

performance

of

the

FGSD12SR6012*A

is

best-in-class: Little derating is needed up to 85℃,

under natural convection.

Applications



Programmable output voltage from 0.6V to 5.5V

via external resistor. Digitally adjustable down to

0.45Vdc



Intermediate Bus Architecture

Telecommunications

Data/Voice processing

Distributed Power Architecture

Computing (Servers, Workstations)

Test Equipments



Digital interface through the PMBus™ ^#protocol

Tunable Loop™ to optimize dynamic output

voltage response



Flexible output voltage sequencing

EZ-SEQUENCE



Power Good signal

Fixed switching frequency with capability of

external synchronization



Auto-reset output over-current protection

Remote ON/OFF

Ability to sink and source current

No minimum load required

Start up into pre-biased output

UL* 60950-1 2^ndEd. Recognized, CSA^†C22.2 No.

60950-1-07 Certified, and VDE^‡(EN60950-1 2^ndEd.)

(Pending)



ISO** 9001 and ISO 14001 certified manufacturing

facilities

* UL is a registered trademark of Underwriters Laboratories, Inc.

†

CSA is a registered trademark of Canadian Standards Association.

VDE is a trademark of Verband Deutscher Elektrotechniker e.V.

‡

** ISO is a registered trademark of the International Organization of Standards

^#The PMBus name and logo are registered trademarks of the System Management Interface Forum (SMIF)

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Absolute Maximum Ratings

Stresses in excess of the absolute maximum ratings may lead to degradation in performance and reliability of

the converter and may result in permanent damage.

PARAMETER

ABSOLUTE MAXIMUM RATINGS¹

Input Voltage

NOTES

MIN

TYP

MAX

UNITS

Continuous

-0.3

15

7

Vdc

°C

SEQ, SYNC, Vs+

CLK, DATA, SMBALERT

Operating Temperature

Storage Temperature

Output Voltage

3.6

85

Ambient temperature

-40

-55

125

5.5

°C

0.45

Vdc

Electrical Specifications

All specifications apply over specified input voltage, output load, and temperature range, unless otherwise

noted.

PARAMETER

INPUT CHARACTERISTICS

Operating Input Voltage Range

Maximum Input Current

NOTES

MIN

TYP

MAX

UNITS

3.0

14.4

9

Vdc

Adc

mA

A²s

Vin=3V to 14V, Io-max

Input Stand-by Current

Vin=12V, module disabled

Vout=5.0V

6.5

85

52

Input No Load Current

Vout=0.6V

Inrush Transient, I²t

1

Peak-to-peak (5Hz to 20MHz, 1uH

source impedance; Vin=0 to 14V, Io-max

Input Reflected-Ripple Current

Input Ripple Rejection (120Hz)

400

-55

mAp-p

dB

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Electrical Specifications (Continued)

PARAMETER

NOTES

MIN

TYP

MAX

UNITS

OUTPUT CHARACTERISTICS

With 0.1% tolerance for external resistor

used to set output voltage

Output Voltage Set Point

Output Voltage Range

-1.0

-3.0

+1.0

+3.0

%Vout

(Over all operating input voltage,

resistive load and temperature

conditions until end of life)

Some output voltages may not be

possible depending on the input voltage

– see feature description section

Adjustment Range

(selected by an external resistor)

0.6

5.5

Vdc

PMBus Adjustable Output Voltage Range

PMBus Output Voltage Adjustment Step Size

Remote Sense Range

-25

0.4

+25

%Vout

Vdc

0.5

0.4

10

5

Output Regulation (for Vo ≥ 2.5Vdc)

Line (Vin = min to max)

Load (Io = min to max)

Line (Vin = min to max)

Load (Io = min to max)

Temperature (Ta = min to max)

% Vout

mV

Output Regulation (for Vo < 2.5Vdc)

Output Ripple and Noise

mV

10

0.4

mV

% Vout

Vin=12V, Io= min to max, Co =

0.1uF+22uF ceramic capacitors

Peak to Peak

5MHz to 20MHz bandwidth

Plus full load (resistive)

ESR ≥ 1mΩ

50

20

100

38

mVp-p

mVrms

%

RMS

External Load Capacitance ¹

Without the Tunable Loop

With the Tunable Loop

22

0

47

1,000

5,000

12

uF

ESR ≥ 0.15mΩ

uF

ESR ≥ 10mΩ

uF

Output Current Range

(in either sink or source mode)

Adc

Current limit does not operate in sink

mode

Output Current Limit Inception (Hiccup mode)

130

% Io-max

Arms

Output Short-Circuit Current

Efficiency

Vo ≤ 250mV, Hiccup mode

0.92

Vin = 12Vdc, Ta = 25°C, Io = max

Vout=5.0Vdc

Vout=3.3Vdc

Vout=2.5Vdc

Vout=1.8Vdc

Vout=1.2Vdc

Vout=0.6Vdc

95.4

93.6

92.2

89.9

86.0

76.4

%

¹External capacitors may require using the new Tunable Loop^TMfeature to ensure that the module is stable as well as

getting the best transient response. See the Tunable Loop^TMsection for details.

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Electrical Specifications (Continued)

PARAMETER

NOTES

MIN

TYP

MAX

UNITS

Switching Frequency

600

kHz

Frequency Synchronization

Synchronization Frequency Range

High Level Input Voltage

Low Level Input Voltage

Input Current, SYNC

510

2.0

720

kHz

V

0.4

V

100

nA

nS

Minimum Pulse Width, SYNC

Maximum SYNC rise time

100

General Specifications

PARAMETER

NOTES

Io = 0.8 * Io-max, Ta = 40°C

MIN

TYP

MAX

UNITS

Hours

g (oz.)

Calculated MTBF

21,774,843

2.23(0.079)

Telecordia Issue 2 Method 1 Case 3

Weight

Feature Specifications

PARAMETER

NOTES

MIN

TYP

MAX

UNITS

Vin = min to max, open collector or

equivalent, Signal reference to GND

ON/OFF Signal Interface

Positive Logic

Logic High (Module ON)

Input High Current

Input High Voltage

Logic Low (Module OFF)

Input Low Current

Input Low Voltage

1

mA

V

2.0

Vin-max

1

mA

V

-0.2

0.6

On/Off pin is open collector/drain logic input

with external pull-up resistor; signal

reference to GND

Negative Logic

Logic High (Module OFF)

Input High Current

1

mA

V

Input High Voltage

Logic Low (Module ON)

Input Low Current

2.0

Vin-max

10

uA

V

Input Low Voltage

-0.2

0.6

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Feature Specifications

PARAMETER

NOTES

MIN

TYP

MAX

UNITS

Vin = Vin-nom, Io = Io-max _,Vo to within

±1% of steady state

Turn-On Delay Time

Case 1: On/Off input is enabled and

then input power is applied

delay from instant at which Vin =

Vin-min until Vo = 10% of Vo-set)

1.1

700

3.1

ms

us

Case 2: Input power is applied for at least

one second and then the On/Off input

is enabled

delay from instant at which Von/Off is

enabled until Vo = 10% of Vo-set

time for Vo to rise from 10% of Vo-set to

90% of Vo-set

Output voltage Rise time

ms

Output voltage overshoot with or without

maximum external capacitance

Ta = 25^oC, Vin = Vin-min to Vin-max,

Io = Io-min to Io-max

3.0

%Vout

°C

Over Temperature Protection

(See Thermal Considerations section)

120

130

PMBus Over Temperature Warning Threshold

*

°C

Vin-min to Vom-max, Io-min to Io-max,

VSEQ < Vo

Tracking Accuracy

Power-Up: 2V/ms

Power-Down: 2V/ms

Input Under Voltage Lockout

Turn-on Threshold

Turn-off Threshold

Hysteresis

100

mV

2.475

2.25

3.025

2.75

Vdc

0.25

PMBus Adjustable Input Under Voltage

Lockout Thresholds

2.5

14

Vdc

mV

Resolution of Adjustable Input Under

Voltage Threshold

500

PGOOD (Power Good)

Signal Interface Open Drain,

Vsupply  5VDC

Overvoltage threshold for PGOOD ON

Overvoltage threshold for PGOOD OFF

Undervoltage threshold for PGOOD ON

Undervoltage threshold for PGOOD OFF

Pulldown resistance of PGOOD pin

Sink current capability into PGOOD pin

108

110

92

%Vout



90

50

5

mA

* Over temperature Warning – Warning may not activate before alarm and unit may shutdown before warning

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Digital Interface Specifications

PARAMETER

PMBus Signal Interface Characteristics

Input High Voltage (CLK, DATA)

NOTES

MIN

TYP

MAX

UNITS

2.1

3.6

0.8

10

V

Input Low Voltage (CLK, DATA)

Input high level current (CLK, DATA)

Input low level current (CLK, DATA)

Output Low Voltage (CLK, DATA, SMBALERT#)

-10

uA

V

10

I_OUT=2mA

V_OUT=3.6V

0.4

Output high level open drain leakage current (DATA,

SMBALERT#)

0

10

uA

Pin capacitance

0.7

pF

kHz

nS

PMBus Operating frequency range

Data hold time

Slave Mode

10

0

400

Receive Mode

Transmit Mode

300

250

nS

Data setup time

nS

Measurement System Characteristics

Read delay time

153

0

192

231

18

us

A

Output current measurement range

Output current measurement resolution

Output current measurement gain accuracy (at 25°C)

Output current measurement offset

Vout measurement range

62.5

mA

%

±5

0.1

5.5

A

0

V

Vout measurement resolution

Vout measurement accuracy

Vout measurement offset

15.625

32.5

mV

%

-15

-3

3

15

3

%

Vinmeasurement range

14.4

V

Vin measurement resolution

Vin measurement accuracy

Vin measurement offset

mV

%

-15

15

-5.5

1.4

LSB

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

provides output ripple information for different

external capacitance values at various Vo and a full

load current of 12A. For stable operation of the

module, limit the capacitance to less than the

maximum output capacitance as specified in the

electrical specification table. Optimal performance of

the module can be achieved by using the Tunable

Loop™ feature described later in this data sheet.

Design Considerations

Input Filtering

The FGSD12SR6012*A converter should be

connected to a low ac-impedance source. A highly

inductive source can affect the stability of the module.

An input capacitance must be placed directly

adjacent to the input pin of the module, to minimize

input ripple voltage and ensure module stability.

60

1x22uF Ext Cap

1x47uF Ext Cap

50

2x47uF Ext Cap

To minimize input voltage ripple, ceramic capacitors

are recommended at the input of the module. Fig-1

shows the input ripple voltage for various output

voltages at 12A of load current with 2x22uF or

3x22uF ceramic capacitors and an input of 12V.

4x47uF Ext Cap

40

30

20

10

0

250

2x22uF

3x22uF

200

0.5

1.5

2.5

3.5

4.5

150

100

50

Output Voltage(Volts)

Fig-2: Output ripple voltage for various output

voltages with external 1x22uF, 1x47uF, 2x47uF

or 4x47uF ceramic capacitors at the output (12A

load). Input voltage is 12V.

0.5

1.5

2.5

3.5

4.5

Output Voltage(Volts)

Safety Consideration

Fig-1: Input ripple voltage for various output

voltages with 2x22uF or 3x22uF ceramic

capacitors at the input (12A load). Input voltage

is 12V.

For safety agency approval the power module must

be installed in compliance with the spacing and

separation requirements of the end-use safety

agency standards, i.e., UL 60950-1 2nd, CSA C22.2

No. 60950-1-07, DIN EN 60950-1:2006 + A11

(VDE0805 Teil 1 + A11):2009-11; EN 60950-1:2006

+ A11:2009-03.

Output Filtering

For the converter output to be considered meeting

the requirements of safety extra-low voltage (SELV),

the input must meet SELV requirements. The power

module has extra-low voltage (ELV) outputs when all

inputs are ELV.

The FGSD12SR6012*A is designed for low output

ripple voltage and will meet the maximum output

ripple specification with 0.1uF ceramic and 22uF

ceramic capacitors at the output of the module.

However, additional output filtering may be required

by the system designer for a number of reasons.

First, there may be a need to further reduce the

output ripple and noise of the module. Second, the

dynamic response characteristics may need to be

customized to a particular load step change.

The input to these units is to be provided with a

slow-blow fuse with a maximum rating of 15 A in the

positive input lead.

To reduce the output ripple and improve the dynamic

response to a step load change, additional

capacitance at the output can be used. Low ESR

polymer and ceramic capacitors are recommended to

improve the dynamic response of the module. Fig-2

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

is turned ON pulling the On/Off pin low, turning

transistor Q1 OFF resulting in the PWM Enable pin

going high.

Analog Feature Descriptions

Remote On/Off

MODULE

+3.3V

The module can be turned ON and OFF either by

using the ON/OFF pin (Analog interface) or through

the PMBus interface (Digital). The module can be

configured in a number of ways through the PMBus

interface to react to the two ON/OFF inputs:

 Module ON/OFF can be controlled only through

the analog interface (digital interface ON/OFF

commands are ignored)

+VIN

Rpullup

I

10K

ENABLE

22K

ON/OFF

Q1

+

Q2

V

22K

 Module ON/OFF can be controlled only through

the PMBus interface (analog interface is ignored)

 Module ON/OFF can be controlled by either the

analog or digital interface

ON/OFF

_

GND

The default state of the module (as shipped from the

factory) is to be controlled by the analog interface

only. If the digital interface is to be enabled, or the

module is to be controlled only through the digital

interface, this change must be made through the

PMBus. These changes can be made and written to

non-volatile memory on the module so that it is

remembered for subsequent use.

Fig-3: Circuit configuration for using positive

On/Off logic.

MODULE

+3.3V

+VIN

Rpullup

I

10K

ENABLE

Analog ON/OFF

ON/OFF

22K

The FGSD12SR6012*A power modules feature an

On/Off pin for remote On/Off operation. Two On/Off

logic options are available. In the Positive Logic

On/Off option, (device code suffix “P” - see Part

Number System), the module turns ON during a logic

High on the On/Off pin and turns OFF during a logic

Low. With the Negative Logic On/Off option, (device

code suffix “N” - see Part Number System), the

module turns OFF during logic High and ON during

logic Low. The On/Off signal should be always

referenced to ground. For either On/Off logic option,

leaving the On/Off pin disconnected will turn the

module ON when input voltage is present.

Q1

+

Q2

V

22K

ON/OFF

_

GND

Fig-4: Circuit configuration for using negative

On/Off logic.

Digital ON/OFF

For positive logic modules, the circuit configuration

for using the On/Off pin is shown in Fig-3. When the

external transistor Q2 is in the OFF state, the internal

transistor Q1 is turned ON, and the internal PWM

#Enable signal is pulled low causing the module to be

ON. When transistor Q2 is turned ON, the On/Off pin

is pulled low and the module is OFF. A suggested

value for R_pullupis 20k.

Please see the Digital Feature Descriptions section.

Monotonic Start-up and Shut-down

The module has monotonic start-up and shutdown

behavior for any combination of rated input voltage,

output current and operating temperature range.

For negative logic On/Off modules, the circuit

configuration is shown in Fig-4. The On/Off pin

should be pulled high with an external pull-up resistor

(suggested value for the 3V to 14V input range is

20K). When transistor Q2 is in the OFF state, the

On/Off pin is pulled high, transistor Q1 is turned ON

and the module is OFF. To turn the module ON, Q2

Startup into Pre-biased Output

The module can start into a prebiased output as long

as the prebias voltage is 0.5V less than the set output

voltage.

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Analog Output Voltage Programming

0.6Vdc. To calculate the value of the trim resistor,

Rtrim for a desired output voltage, should be as per

the following equation:

The output voltage of the module is programmable to

any voltage from 0.6dc to 5.5Vdc by connecting a

resistor between the Trim and SIG_GND pins of the

module. Certain restrictions apply on the output

voltage set point depending on the input voltage.

These are shown in the Output Voltage vs. Input

Voltage Set Point Area plot in Fig-5. The Upper

Limit curve shows that for output voltages lower than

1V, the input voltage must be lower than the

maximum of 14.4V. The Lower Limit curve shows

that for output voltages higher than 0.6V, the input

voltage needs to be larger than the minimum of 3V.

12

R_TRIM



[kΩ]

(V_O-REQ- 0.6)

Rtrim is the external resistor in kohm

Vo-req is the desired output voltage

Note that the tolerance of a trim resistor will affect the

tolerance of the output voltage. Standard 1% or 0.5%

resistors may suffice for most applications; however,

a tighter tolerance can be obtained by using two

resistors in series instead of one standard value

resistor.

Table 1 provides R_TRIMvalues required for some

common output voltages.

Table 1: Trim Resistor Value

V_O-REG[V]

0.6

R_TRIM[kꢀ]

Open

40

0.9

1.0

30

1.2

20

1.5

13.33

10

1.8

2.5

6.316

4.444

2.727

3.3

5.0

Fig-5: Output Voltage vs. Input Voltage Set

Point Area plot showing limits where the output

voltage can be set for different input voltages.

Digital Output Voltage Adjustment

Please see the Digital Feature Descriptions section.

Remote Sense

The power module has a Remote Sense feature to

minimize the effects of distribution losses by

regulating the voltage between the sense pins (VS+

and VS-). The voltage drop between the sense pins

and the VOUT and GND pins of the module should

not exceed 0.5V.

Analog Voltage Margining

Caution – Do not connect SIG_GND to

GND elsewhere in the layout.

Output voltage margining can be implemented in the

module by connecting a resistor, Rmargin-up, from

the Trim pin to the ground pin for margining-up the

Fig-6: Output Voltage vs. Input Voltage Set

Point Area plot showing limits where the output

voltage can be set for different input voltages.

output voltage and by connecting

a

resistor,

Rmargin-down, from the Trim pin to output pin for

margining-down. Fig-7 shows the circuit configuration

for output voltage margining. The POL Programming

Tool, available at www.fdk.com under the Downloads

section, also calculates the values of Rmargin-up and

Without an external resistor between Trim and

SIG_GND pins, the output of the module will be

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Rmargin-down for a specific output voltage and %

margin. Please consult your local FDK FAE for

additional details.

Fig-8: Circuit showing connection of the

sequencing signal to the SEQ pin.

When the scaled down sequencing voltage is applied

to the SEQ pin, the output voltage tracks this voltage

until the output reaches the set-point voltage. The

final value of the sequencing voltage must be set

higher than the set-point voltage of the module. The

output voltage follows the sequencing voltage on a

one-to-one basis. By connecting multiple modules

together, multiple modules can track their output

voltages to the voltage applied on the SEQ pin.

Fig-7: Circuit Configuration for margining Output

Voltage.

Digital Output Voltage Margining

Please see the Digital Feature Descriptions section.

The module’s output can track the SEQ pin signal

with slopes of up to 0.5V/msec during power-up or

power-down.

Output Voltage Sequencing

To initiate simultaneous shutdown of the modules,

the SEQ pin voltage is lowered in a controlled

manner. The output voltage of the modules tracks the

The power module includes a sequencing feature,

EZSEQUENCE that enables users to implement

various types of output voltage sequencing in their

applications. This is accomplished via an additional

sequencing pin. When not using the sequencing

feature, leave it unconnected.

voltages below their set-point voltages on

a

one-to-one basis. A valid input voltage must be

maintained until the tracking and output voltages

reach ground potential.

The voltage applied to the SEQ pin should be scaled

down by the same ratio as used to scale the output

voltage down to the reference voltage of the module.

This is accomplished by an external resistive divider

connected across the sequencing voltage before it is

fed to the SEQ pin as shown in Fig-8. In addition, a

small capacitor (suggested value 100pF) should be

connected across the lower resistor R1.

Note that in all digital Tomodachi series of modules,

the PMBus Output Undervoltage Fault will be tripped

when sequencing is employed. This will be detected

using the STATUS_WORD and STATUS_VOUT

PMBus commands. In addition, the SMBALERT#

signal will be asserted low as occurs for all faults and

warnings. To avoid the module shutting down due

to the Output Undervoltage Fault, the module must

be set to continue operation without interruption as

the response to this fault (see the description of the

PMBus command VOUT_UV_FAULT_RESPONSE

for additional information).

For all Tomodachi modules, the minimum

recommended delay between the ON/OFF signal and

the sequencing signal is 10ms to ensure that the

module output is ramped up according to the

sequencing signal. This ensures that the module

soft-start routine is completed before the sequencing

signal is allowed to ramp up.

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Over-Current Protection

done by using the external signal applied to the

SYNC pin of the module as shown in Fig-9, with the

converter being synchronized by the rising edge of

the external signal. The Electrical Specifications table

specifies the requirements of the external SYNC

signal. If the SYNC pin is not used, the module

should free run at the default switching frequency. If

synchronization is not being used, connect the

SYNC pin to GND.

To provide protection in a fault (output overload)

condition, the unit is equipped with internal

current-limiting circuitry and can endure current

limiting continuously. At the point of current-limit

inception, the unit enters hiccup mode. The unit

operates normally once the output current is brought

back into its specified range.

Digital Adjustable Overcurrent Warning

Please see the Digital Feature Descriptions section.

Over-Temperature Protection

To provide protection in a fault condition, the unit is

equipped with a thermal shutdown circuit. The unit

will shut down if the over-temperature threshold of

150°C (typ) is exceeded at the thermal reference

point Tref. Once the unit goes into thermal shutdown

it will then wait to cool before attempting to restart.

Fig-9:

External

source

connections

to

synchronize switching frequency of the module.

Measuring Output Current, Output Voltage

and Input Voltage

Digital Temperature Status via PMBus

Please see the Digital Feature Descriptions section.

Digitally Adjustable Output Over and Under

Voltage Protection

Dual Layout

Identical dimensions and pin layout of Analog and

Digital Tomodachi modules permit migration from

one to the other without needing to change the

layout. To support this, 2 separate Trim Resistor

locations have to be provided in the layout. As shown

in Fig. 10, for the digital modules, the resistor is

connected between the TRIM pad and SGND and in

the case of the analog module it is connected

between TRIM and GND.

Please see the Digital Feature Descriptions section.

Input Under-Voltage Lockout (UVLO)

At input voltages below the input under-voltage

lockout limit, the module operation is disabled. The

module will begin to operate at an input voltage

above the under-voltage lockout turn-on threshold.

MODULE

TRIM

Digitally Adjustable Input Undervoltage

Lockout

Rtrim1

for

Digital

Rtrim2

for

Analog

SIG_GND

Please see the Digital Feature Descriptions section.

GND(Pin 7)

Digitally Adjustable Power Good Thresholds

Please see the Digital Feature Descriptions section.

Fig-10: Connections to support either Analog or

Digital Tomodachi on the same layout.

Synchronization

The module switching frequency can be

synchronized to a signal with an external frequency

within a specified range. Synchronization can be

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Tunable Loop™

meet 2% output voltage deviation limits for some

common output voltages in the presence of a 6A to

12A step change (50% of full load), with an input

voltage of 12V.

The module has a feature that optimizes transient

response of the module called Tunable Loop™

Please contact your FDK technical representative to

obtain more details of this feature as well as for

guidelines on how to select the right value of external

R-C to tune the module for best transient

performance and stable operation for other output

capacitance values or input voltages other than 12V.

External capacitors are usually added to the output of

the module for two reasons: to reduce output ripple

and noise (see Fig-2) and to reduce output voltage

deviations from the steady-state value in the

presence of dynamic load current changes. Adding

external capacitance however affects the voltage

control loop of the module, typically causing the loop

to slow down with sluggish response. Larger values

of external capacitance could also cause the module

to become unstable.

Table 2: General recommended value of R_TUNE

and C_TUNEfor Vin=12V and various external

ceramic capacitor combinations.

1x47uF 2x47uF 4x47uF 6x47uF 10x47uF

The Tunable Loop™ allows the user to externally

adjust the voltage control loop to match the filter

network connected to the output of the module. The

Tunable Loop™ is implemented by connecting a

series R-C between the SENSE and TRIM pins of the

module, as shown in Fig-11. This R-C allows the user

to externally adjust the voltage loop feedback

compensation of the module.

Co

330

220

R_TUNE

C_TUNE

100pF

560pF

1500pF 2200pF

10nF

20x47uF

180

Co

R_TUNE

C_TUNE

6800pF

Table 3: Recommended values of R_TUNEand

C_TUNEto obtain transient deviation of 2% of Vout

for a 6A step load with Vin=12V.

Vo

5V

5x47uF

330

3.3V 2.5V 1.8V 1.2V 0.6V

1x47uF 3x47uF 1x47uF 1x47uF 3x47uF

+

Co

330uF

330uF 2x330uF 3x330uF 6x330uF

Polymer Polymer Polymer Polymer Polymer

330

270

220

180

R_TUNE

C_TUNE

△V

1500pF 2700pF 3300pF 5600pF 10nF

47nF

99mV 58mV 47mV 34mV 24mV 12mV

Fig-11: Circuit diagram showing connection of

R_TUNEand C_TUNEto tune the control loop of the

module.

Note: The capacitors used in the Tunable Loop

table are 47uF/3m Ω ESR ceramic and

330uF/12mΩ ESR polymer capacitors.

Recommended values of R_TUNEand C_TUNEfor

different output capacitor combinations are given in

Table 2. Table 2 shows the recommended values of

R

_TUNEand C_TUNEfor different values of ceramic output

capacitors up to 1000uF that might be needed for an

application to meet output ripple and noise

requirements. Selecting R_TUNEand C_TUNEaccording to

Table 2 will ensure stable operation of the module.

In applications with tight output voltage limits in the

presence of dynamic current loading, additional

output capacitance will be required. Table 3 lists

recommended values of R_TUNEand C_TUNEin order to

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

PMBus Addressing

Digital Feature Description

The power module can be addressed through the

PMBus using a device address. The module has 64

possible addresses (0 to 63 in decimal) which can be

set using resistors connected from the ADDR0 and

ADDR1 pins to SIG_GND. Note that some of these

addresses (0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 12, 40,

44, 45, 55 in decimal) are reserved according to the

SMBus specifications and may not be useable. The

address is set in the form of two octal (0 to 7) digits,

with each pin setting one digit. The ADDR1 pin sets

the high order digit and ADDR0 sets the low order

digit. The resistor values suggested for each digit are

shown in Table 4 (1% tolerance resistors are

recommended). Note that if either address resistor

value is outside the range specified in Table 4, the

module will respond to address 127.

PMBus Interface Capability

The 12A Digital Tomodachi power modules have a

PMBus interface that supports both communication

and control. The PMBus Power Management

Protocol Specification can be obtained from

www.pmbus.org. The modules support a subset of

version 1.1 of the specification (see Table 6 for a list

of the specific commands supported). Most module

parameters can be programmed using PMBus and

stored as defaults for later use.

All communication over the module PMBus interface

must support the Packet Error Checking (PEC)

scheme. The PMBus master must generate the

correct PEC byte for all transactions, and check the

PEC byte returned by the module.

Table 4:

Digit

0

Resistor Value [kꢀ]

The module also supports the SMBALERT response

protocol whereby the module can alert the bus

master if it wants to talk. For more information on the

SMBus alert response protocol, see the System

Management Bus (SMBus) specification.

10

1

15.4

23.7

36.5

54.9

84.5

130

200

2

3

The module has non-volatile memory that is used to

store configuration settings. Not all settings

programmed into the device are automatically saved

into this non-volatile memory, only those specifically

identified as capable of being stored can be saved

(see Table 6 for which command parameters can be

saved to non-volatile storage).

4

5

6

7

The user must know which I²C addresses are

reserved in a system for special functions and set the

address of the module to avoid interfering with other

system operations. Both 100kHz and 400kHz bus

speeds are supported by the module. Connection for

the PMBus interface should follow the High Power

DC specifications given in section 3.1.3 in the SMBus

specification V2.0 for the 400kHz bus speed or the

Low Power DC specifications in section 3.1.2. The

complete SMBus specification is available from the

SMBus web site, smbus.org.

PMBus Data Format

For commands that set thresholds, voltages or report

such quantities, the module supports the “Linear”

data format among the three data formats supported

by PMBus. The Linear Data Format is a two byte

value with an 11-bit, two’s complement mantissa and

a 5-bit, two’s complement exponent. The format of

the two data bytes is shown below:

Data Byte High

Data Byte Low

ADDR1

ADDR0

7 6 5 4 3

2 1 0 7 6 5 4 3 2 1 0

Exponent

MSB

Mantissa

MSB

R_ADDR0

R_ADDR1

The value is of the number is then given by

Value = Mantissa x 2^Exponent

SIG_GND

Fig-12: Circuit showing connection of resistors

used to set the PMBus address of the module.

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FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

PMBus Enabled On/Off

PMBus Adjustable Soft Start Rise Time

The module can also be turned on and off via the

PMBus interface. The OPERATION command is

used to actually turn the module on and off via the

PMBus, while the ON_OFF_CONFIG command

configures the combination of analog ON/OFF pin

input and PMBus commands needed to turn the

module on and off. Bit [7] in the OPERATION

command data byte enables the module, with the

following functions:

The soft start rise time can be adjusted in the module

via PMBus. When setting this parameter, make sure

that the charging current for output capacitors can be

delivered by the module in addition to any load

current to avoid nuisance tripping of the overcurrent

protection circuitry during startup. The TON_RISE

command sets the rise time in ms, and allows

choosing soft start times between 600us and 9ms,

with possible values listed in Table 5. Note that the

exponent is fixed at -4 (decimal) and the upper two

bits of the mantissa are also fixed at 0.

0

1

:

Output is disabled

Output is enabled

Table 5

This module uses the lower five bits of the

ON_OFF_CONFIG data byte to set various ON/OFF

options as follows:

Rise Time

600us

900us

1.2ms

1.8ms

2.7ms

4.2ms

6.0ms

9.0ms

Exponent

11100

Mantissa

00000001010

00000001110

00000010011

00000011101

00000101011

00001000011

00001100000

00010010000

Bit Position

Access

4

r/w

3

r/w

2

r/w

1

r/w

0

r

Function

PU CMD CPR POL CPA

Default Value

1

0

1

PU: Sets the default to either operate any time input

power is present or for the ON/OFF to be controlled

by the analog ON/OFF input and the PMBus

OPERATION command. This bit is used together

with the CP, CMD and ON bits to determine startup.

Output Voltage Adjustment Using the

PMBus

The VOUT_SCALE_LOOP parameter is important for

a number of PMBus commands related to output

voltage trimming, margining, over/under voltage

protection and the PGOOD thresholds. The output

voltage of the module is set as the combination of the

voltage divider formed by RTrim and a 20kꢀ upper

divider resistor inside the module, and the internal

reference voltage of the module. The reference

voltage V_REFis nominally set at 600mV, and the

output regulation voltage is then given by

Bit Value

Action

Module powers up any time power is

present regardless of state of the analog

ON/OFF pin

Module does not power up until

commanded by the analog ON/OFF pin

and the OPERATION command as

programmed in bits [2:0] of the

ON_OFF_CONFIG register.

0

1

CMD: The CMD bit controls how the device responds

to the OPERATION command.

20000  RTrim





V_OUT



V_REF









RTrim

Bit Value

Action

Module ignores the ON bit in the

OPERATION command

Module responds to the ON bit in the

OPERATION command

0

Hence the module output voltage is dependent on the

value of RTrim which is connected external to the

module. The information on the output voltage divider

ratio is conveyed to the module through the

VOUT_SCALE_LOOP parameter which is calculated

as follows:

1

CPR: Sets the response of the analog ON/OFF pin.

This bit is used together with the CMD, PU and ON

bits to determine startup.

RTrim

VOUT _SCALE _LOOP 

Bit Value

Action

20000  RTrim

Module ignores the analog ON/OFF pin,

i.e. ON/OFF is only controlled through the

PMBUS via the OPERATION command

Module requires the analog ON/OFF pin

to be asserted to start the unit

0

The VOUT_SCALE_LOOP parameter is specified

using the “Linear” format and two bytes. The upper

five bits [7:3] of the high byte are used to set the

exponent which is fixed at –9 (decimal). The

remaining three bits of the high byte [2:0] and the

eight bits of the lower byte are used for the mantissa.

1

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FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

The default value of the mantissa is 00100000000

corresponding to 256 (decimal), corresponding to a

divider ratio of 0.5. The maximum value of the

mantissa is 512 corresponding to a divider ratio of 1.

Note that the resolution of the VOUT_SCALE_LOOP

command is 0.2%.

cannot be outside the ±25% window around the

nominal output voltage. The data associated with

VOUT_MARGIN_HIGH and VOUT_MARGIN_LOW

can be stored to non-volatile memory using the

STORE_DEFAULT_ALL command.

The module is commanded to go to the margined

high or low voltages using the OPERATION

command. Bits [5:2] are used to enable margining as

follows:

When PMBus commands are used to trim or margin

the output voltage, the value of V_REFis what is

changed inside the module, which in turn changes

the regulated output voltage of the module.

00XX : Margin Off

The nominal output voltage of the module can be

adjusted with a minimum step size of 0.4% over a

±25% range from nominal using the VOUT_TRIM

command over the PMBus.

0101 : Margin Low (Ignore Fault)

0110 : Margin Low (Act on Fault)

1001 : Margin High (Ignore Fault)

1010 : Margin High (Act on Fault)

The VOUT_TRIM command is used to apply a fixed

offset voltage to the output voltage command value

using the “Linear” mode with the exponent fixed at

–10 (decimal). The value of the offset voltage is given

by

PMBus Adjustable Overcurrent Warning

The module can provide an overcurrent warning via

the PMBus. The threshold for the overcurrent

warning can be set using the parameter

IOUT_OC_WARN_LIMIT. This command uses the

“Linear” data format with a two byte data word where

the upper five bits [7:3] of the high byte represent the

exponent and the remaining three bits of the high

byte [2:0] and the eight bits in the low byte represent

the mantissa. The exponent is fixed at –1 (decimal).

The upper five bits of the mantissa are fixed at 0

while the lower six bits are programmable. For

production codes after April 2013, the value for

IOUT_OC_WARN_LIMIT will be fixed at 14.5A. For

earlier production codes the actual value for

IOUT_OC_WARN_LIMIT will vary from module to

module due to calibration during production testing.

The resolution of this warning limit is 500mA. The

value of the IOUT_OC_WARN_LIMIT can be stored

V_OUT(offset)VOUT _TRIM2^10

This offset voltage is added to the voltage set through

the divider ratio and nominal VREF to produce the

trimmed output voltage. The valid range in two’s

complement for this command is –4000h to 3999h.

The high order two bits of the high byte must both be

either 0 or 1. If a value outside of the +/-25%

adjustment range is given with this command, the

module will set it’s output voltage to the nominal

value (as if VOUT_TRIM had been set to 0), assert

SMBALRT#, set the CML bit in STATUS_BYTE and

the invalid data bit in STATUS_CML.

Output Voltage Margining Using the PMBus

to

non-volatile

memory

using

the

STORE_DEFAULT_ALL command.

The module can also have its output voltage

margined via PMBus commands. The command

VOUT_MARGIN_HIGH sets the margin high voltage,

while the command VOUT_MARGIN_LOW sets the

margin low voltage. Both the VOUT_MARGIN_HIGH

and VOUT_MARGIN_LOW commands use the

“Linear” mode with the exponent fixed at –10

(decimal). Two bytes are used for the mantissa with

the upper bit [7] of the high byte fixed at 0. The actual

margined output voltage is a combination of the

VOUT_MARGIN_HIGH or VOUT_MARGIN_LOW

and the VOUT_TRIM values as shown below.

Temperature Status via PMBus

The module can provide information related to

temperature of the module through the

STATUS_TEMPERATURE command. The command

returns information about whether the pre-set over

temperature fault threshold and/or the warning

threshold have been exceeded.

PMBus Adjustable Output Over and Under

Voltage Protection

V_OUT(MH)



(VOUT_MARGIN_HIGHVOUT_TRIM)2^10

The module has output over and under voltage

protection capability. The PMBus command

VOUT_OV_FAULT_LIMIT is used to set the output

over voltage threshold from four possible values:

108%, 110%, 112% or 115% of the commanded

V

_OUT(ML)

(VOUT_MARGIN_LOW VOUT_TRIM)2^10

Note that the sum of the margin and trim voltages

output

voltage.

The

command

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

VOUT_UV_FAULT_LIMIT sets the threshold that

causes an output under voltage fault and can also be

selected from four possible values: 92%, 90%, 88%

or 85%. The default values are 112% and 88% of

commanded output voltage. Both commands use two

data bytes formatted as two’s complement binary

integers. The “Linear” mode is used with the

exponent fixed to –10 (decimal) and the effective

over or under voltage trip points given by:

are entered for either command, they will be mapped

to the closest of the allowed values.

VIN_ON must be set higher than VIN_OFF.

Attempting to write either VIN_ON lower than

VIN_OFF or VIN_OFF higher than VIN_ON results in

the new value being rejected, SMBALERT being

asserted along with the CML bit in STATUS_BYTE

and the invalid data bit in STATUS_CML.

V_{OUT(OV _REQ)} (VOUT _OV _FAULT _LIMIT)2^10

V_{OUT(UV _REQ)} (VOUT _UV _FAULT _LIMIT)2^10

Both the VIN_ON and VIN_OFF commands use the

“Linear” format with two data bytes. The upper five

bits represent the exponent (fixed at -2) and the

remaining 11 bits represent the mantissa. For the

mantissa, the four most significant bits are fixed at 0.

Values within the supported range for over and

undervoltage detection thresholds will be set to the

nearest fixed percentage. Note that the correct value

for VOUT_SCALE_LOOP must be set in the module

for the correct over or under voltage trip points to be

calculated.

Power Good

The module provides a Power Good (PGOOD) signal

that is implemented with an open-drain output to

indicate that the output voltage is within the

regulation limits of the power module. The PGOOD

signal will be de-asserted to a low state if any

condition such as overtemperature, overcurrent or

loss of regulation occurs that would result in the

output voltage going outside the specified thresholds.

The PGOOD thresholds are user selectable via the

PMBus (the default values are as shown in the

Feature Specifications Section). Each threshold is

set up symmetrically above and below the nominal

value. The POWER_GOOD_ON command sets the

output voltage level above which PGOOD is asserted

(lower threshold). For example, with a 1.2V nominal

output voltage, the POWER_GOOD_ON threshold

can set the lower threshold to 1.14 or 1.1V. Doing

this will automatically set the upper thresholds to 1.26

or 1.3V.

In addition to adjustable output voltage protection, the

12A Digital Tomodachi module can also be

programmed for the response to the fault. The

VOUT_OV_FAULT_RESPONSE

and

VOUT_UV_FAULT_RESPONSE commands specify

the response to the fault. Both these commands use

a single data byte with the possible options as shown

below.

1. Continue operation without interruption

(Bits [7:6] = 00, Bits [5:3] = xxx)

2. Continue for four switching cycles and then shut

down if the fault is still present, followed by no

restart or continuous restart

(Bits [7:6] = 01, Bits [5:3] = 000 means no restart,

Bits [5:3] = 111 means continuous restart)

3. Immediate shut down followed by no restart or

continuous restart

(Bits [7:6] = 10, Bits [5:3] = 000 means no restart,

Bits [5:3] = 111 means continuous restart).

4. Module output is disabled when the fault is

present and the output is enabled when the fault

no longer exists

The POWER_GOOD_OFF command sets the level

below which the PGOOD command is de-asserted.

This

command

also

sets

two

thresholds

symmetrically placed around the nominal output

voltage.

threshold

Normally,

is

the

POWER_GOOD_ON

higher than the

(Bits [7:6] = 11, Bits [5:3] = xxx).

set

Note that separate response choices are possible for

output over voltage or under voltage faults.

POWER_GOOD_OFF threshold.

Both POWER_GOOD_ON and

POWER_GOOD_OFF commands use the “Linear”

format with the exponent fixed at –10 (decimal).

The two thresholds are given by

PMBus Adjustable Input Undervoltage

Lockout

V_{OUT(PGOOD_ON)} (POWER_GOOD_ON)2^10

V_{OUT(PGOOD_OFF)} (POWER_GOOD_OFF)2^10

The module allows adjustment of the input under

voltage lockout and hysteresis. The command

VIN_ON allows setting the input voltage turn on

threshold, while the VIN_OFF command sets the

input voltage turn off threshold. For the VIN_ON

command, possible values are 2.75V, and 3V to 14V

in 0.5V steps. For the VIN_OFF command, possible

values are 2.5V to 14V in 0.5V steps. If other values

Both commands use two data bytes with bit [7] of the

high byte fixed at 0, while the remaining bits are r/w

and used to set the mantissa using two’s complement

representation. Both commands also use the

VOUT_SCALE_LOOP parameter so it must be set

correctly. The default value of POWER_GOOD_ON

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FGSD12SR6012*A

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is set at 1.1035V and that of

POWER_GOOD_OFF is set at 1.08V. The values

associated with these commands can be stored in

the

data byte in two-s complement format and is fixed at

–4 (decimal). The remaining 11 bits in two’s

complement binary format represent the mantissa

with the 11^thbit fixed at 0 since only positive numbers

are considered valid.

non-volatile

memory

using

the

STORE_DEFAULT_ALL command.

The PGOOD terminal can be connected through a

pullup resistor (suggested value 100K) to a source

of 5VDC or lower.

Note that the current reading provided by the module

is not corrected for temperature. The temperature

corrected current reading for module temperature

T_Modulecan be estimated using the following equation.

Measurement of Output Current, Output

Voltage and Input Voltage

I_{READ _OUT}

I

OUT,CORR



1 [(T_IND 30)0.00393]

The module is capable of measuring key module

parameters such as output current and voltage and

input voltage and providing this information through

the PMBus interface. Roughly every 200us, the

module makes 16 measurements each of output

current, voltage and input voltage. Average values of

of these 16 measurements are then calculated and

placed in the appropriate registers. The values in the

registers can then be read using the PMBus

interface.

where I_{OUT_CORR}is the temperature corrected value of

the current measurement, I_{READ_OUT}is the module

current measurement value, T_INDis the temperature

of the inductor winding on the module. Since it may

be difficult to measure T_IND, it may be approximated

by an estimate of the module temperature.

Measuring Output Voltage Using the PMBus

The module can provide output voltage information

using the READ_VOUT command. The command

returns two bytes of data all representing the

mantissa while the exponent is fixed at -10 (decimal).

Measuring Output Current Using the PMBus

The module measures current by using the inductor

winding resistance as a current sense element. The

inductor winding resistance is then the current gain

factor used to scale the measured voltage into a

current reading. This gain factor is the argument of

the IOUT_CAL_GAIN command, and consists of two

bytes in the linear data format. The exponent uses

the upper five bits [7:3] of the high data byte in two-s

complement format and is fixed at –15 (decimal). The

remaining 11 bits in two’s complement binary format

represent the mantissa.

During manufacture of the module, offset and gain

correction values are written into the non-volatile

memory

of

the

module.

The

command

VOUT_CAL_OFFSET can be used to read and/or

write the offset (two bytes consisting of a 16-bit

mantissa in two’s complement format) while the

exponent is always fixed at -10 (decimal). The

allowed range for this offset correction is -125 to

124mV. The command VOUT_CAL_GAIN can be

used to read and/or write the gain correction - two

bytes consisting of a five-bit exponent (fixed at -8)

and a 11-bit mantissa. The range of this correction

factor is -0.125V to +0.121V, with a resolution of

0.004V. The corrected output voltage reading is then

given by:

The current measurement accuracy is also improved

by each module being calibrated during manufacture

with the offset in the current reading. The

IOUT_CAL_OFFSET command is used to store and

read the current offset. The argument for this

command consists of two bytes composed of a 5-bit

exponent (fixed at -4d) and a 11-bit mantissa. This

command has a resolution of 62.5mA and a range of

-4000mA to +3937.5mA. During manufacture, each

module is calibrated by measuring and storing the

current gain factor and offset into non-volatile

storage.

V_OUT(Final) 

[V_OUT(Initial)(1VOUT_CAL_GAIN)]

VOUT _CAL_OFFSET

Measuring Input Voltage Using the PMBus

The READ_IOUT command provides module

average output current information. This command

only supports positive or current sourced from the

module. If the converter is sinking current a reading

of 0 is provided. The READ_IOUT command returns

two bytes of data in the linear data format. The

exponent uses the upper five bits [7:3] of the high

The module can provide output voltage information

using the READ_VIN command. The command

returns two bytes of data in the linear format. The

upper five bits [7:3] of the high data form the two’s

complement representation of the mantissa which is

fixed at –5 (decimal). The remaining 11 bits are used

for two’s complement representation of the mantissa,

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

with the 11^thbit fixed at zero since only positive

numbers are valid.

High Byte

Bit

Position

Default

Value

Flag

During module manufacture, offset and gain

correction values are written into the non-volatile

7

6

5

4

3

2

1

0

VOUT fault or warning

IOUT fault or warning

0

memory

of

the

module.

The

command

VIN_CAL_OFFSET can be used to read and/or write

the offset - two bytes consisting of a five-bit exponent

(fixed at -5) and a 11-bit mantissa in two’s

complement format. The allowed range for this offset

correction is -2 to 1.968V, and the resolution is

32mV. The command VIN_CAL_GAIN can be used

to read and/or write the gain correction - two bytes

consisting of a five-bit exponent (fixed at -8) and a

11-bit mantissa. The range of this correction factor is

-0.125V to +0.121V, with a resolution of 0.004V. The

corrected output voltage reading is then given by:

X

POWER_GOOD# (is negated)

X

STATUS_VOUT: Returns one byte of information

relating to the status of the module’s output voltage

related faults.

V_IN(Final) 

Bit

Position

Default

Value

Flag

[V_IN(Initial)(1VIN _CAL _GAIN)]

 VIN _CAL _OFFSET

7

6

5

4

3

2

1

0

VOUT OV Fault

0

X

VOUT UV Fault

Reading the Status of the Module using the

PMBus

X

The module supports a number of status information

commands implemented in PMBus. However, not all

features are supported in these commands. A 1 in

the bit position indicates the fault that is flagged.

STATUS_IOUT: Returns one byte of information

relating to the status of the module’s output voltage

related faults.

STATUS_BYTE: Returns one byte of information

with a summary of the most critical device faults.

Bit

Position

Default

Value

Bit

Position

Default

Value

Flag

7

6

5

4

3

2

1

0

IOUT OC Fault

0

7

6

5

4

3

2

1

0

X

OFF

0

X

IOUT OC Warning

VOUT Overvoltage

IOUT Overcurrent

VIN Undervoltage

Temperature

X

CML (Comm. Memory Fault)

None of the above

STATUS_TEMPERATURE: Returns one byte of

information relating to the status of the module’s

temperature related faults.

STATUS_WORD: Returns two bytes of information

with a summary of the module’s fault/warning

conditions.

Low Byte

Bit

Position

Default

Value

Bit

Position

Default

Value

Flag

7

6

5

4

3

2

1

0

OT Fault

OT Warning

0

7

6

5

4

3

2

1

0

X

OFF

0

X

VOUT Overvoltage

IOUT Overcurrent

VIN Undervoltage

Temperature

CML (Comm. Memory Fault)

None of the above

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3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

STATUS_CML: Returns one byte of information

relating to the status of the module’s communication

related faults.

Bit

Position

Default

Value

Flag

Invalid/Unsupported

Command

Invalid/Unsupported

7

6

0

Command

5

4

3

2

1

0

Packet Error Check Failed

0

X

Other Communication Fault

X

MFR_VIN_MIN: Returns minimum input voltage as

two data bytes of information in Linear format (upper

five bits are exponent – fixed at -2, and lower 11 bits

are mantissa in two’s complement format – fixed at

12)

MFR_VOUT_MIN: Returns minimum output voltage

as two data bytes of information in Linear format

(upper five bits are exponent – fixed at -10, and lower

11 bits are mantissa in two’s complement format –

fixed at 614)

MFR_SPECIFIC_00: Returns information related to

the type of module and revision number. Bits [7:2] in

the Low Byte indicate the module type (000000

corresponds to the FGSD12SR6012 module) Bits 1:0

in the High Byte are used to indicate the

manufacturer ID, with 01 reserved for FDK.

Low Byte

Bit

Position

7:2

Default

Value

000000

10

Flag

Module Name

Reserved

1:0

High Byte

Flag

Bit

Position

7:0

Default

Value

None

01

Module Revision Number

Manufacturer ID

1:0

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Summary of Supported PMBus Commands

Please refer to the PMBus 1.1 specification for more details of these commands.

Table 6

Non-Volatile

Memory

Storage

Hex

Code

Command

Brief Description

Turn Module on or off. Also used to margin the output voltage

Format

Bit Position

Access

Function

Default Value

Unsigned Binary

7

6

r

X

0

5

r/w

4

3

2

r/w

1

r

X

0

r

X

01

OPERATION

r/w

On

0

r/w

Margin

0

Configures the ON/OFF functionality as a combination of analog ON/OFF

pin and PMBus commands

Format

Bit Position

Access

Function

Default Value

Unsigned Binary

7

r

X

0

6

r

X

0

5

r

X

0

4

r/w

pu

1

3

r/w

cmd

0

2

r/w

cpr

1

0

r

cpa

1

02

03

ON_OFF_CONFIG

CLEAR_FAULTS

YES

r/w

pol

1

Clear any fault bits that may have been set, also releases the SMBALERT#

signal if the device has been asserting it.

Used to control writing to the module via PMBus. Copies the current register

setting in the module whose command code matches the value in the data

byte into non-volatile memory (EEPROM) on the module

Format

Bit Position

Access

Function

Default Value

Unsigned Binary

7

r/w

bit7

0

6

r/w

bit6

0

5

r/w

bit5

0

4

x

3

x

2

x

X

1

x

X

0

x

X

10

WRITE_PROTECT

YES

Bit5: 0 – Enables all writes as permitted in bit6 or bit7

1 – Disables all writes except the WRITE_PROTECT, OPERATION

and ON_OFF_CONFIG (bit 6 and bit7 must be 0)

Bit 6: 0 – Enables all writes as permitted in bit5 or bit7

1 – Disables all writes except for the WRITE_PROTECT and

OPERATION commands (bit5 and bit7 must be 0)

Bit7: 0 – Enables all writes as permitted in bit5 or bit6

1 – Disables all writes except for the WRITE_PROTECT command

(bit5 and bit6 must be 0)

Copies all current register settings in the module into non-volatile memory

(EEPROM) on the module. Takes about 50ms for the command to execute.

11

12

STORE_DEFAULT_ALL

Restores all current register settings in the module from values in the

module non-volatile memory (EEPROM)

RESTORE_DEFAULT_ALL

Copies the current register setting in the module whose command code

matches the value in the data byte into non-volatile memory (EEPROM) on

the module

13

14

STORE_DEFAULT_CODE

Bit Position

Access

7

w

6

w

5

w

4

w

3

w

2

w

1

w

0

w

Function

Command code

Restores the current register setting in the module whose command code

matches the value in the data byte from the value in the module non-volatile

memory (EEPROM)

RESTORE_DEFAULT_CODE

Bit Position

Access

7

w

6

w

5

w

4

w

3

w

2

w

1

w

0

w

Function

Command code

The module has MODE set to Linear and Exponent set to -10. These values

cannot be changed

Bit Position

Access

Function

7

r

6

5

r

4

r

3

r

2

1

r

0

r

20

VOUT_MODE

r

Mode

0

r

Exponent

1

Default Value

0

1

0

1

0

Table 6 (continued)

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Non-Volatile

Memory

Storage

Hex

Command

Code

Brief Description

Apply a fixed offset voltage to the output voltage command value. Exponent

is fixed at -10.

Format

Linear, two’s complement binary

Bit Position

Access

7

r/w

6

r/w

5

r/w

4

r/w

3

r/w

2

r/w

1

r/w

0

r/w

Function

High Byte

22

25

26

29

35

VOUT_TRIM

VOUT_MARGIN_HIGH

VOUT_MARGIN_LOW

VOUT_SCALE_LOOP

VIN_ON

YES

Default Value

Bit Position

Access

Function

Default Value

0

7

r/w

0

6

r/w

0

5

r/w

0

4

0

3

0

2

r/w

0

1

r/w

0

r/w

Low Byte

0

Sets the target voltage for margining the output high. Exponent is fixed at

-10.

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r/w

5

r/w

4

3

2

r/w

1

r/w

0

r/w

Function

High Byte

Default Value

Bit Position

Access

Function

Default Value

0

7

r/w

0

6

r/w

0

5

r/w

0

4

0

3

1

2

r/w

0

1

r/w

1

0

r/w

Low Byte

0

1

0

1

Sets the target voltage for margining the output low. Exponent is fixed at

-10

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r/w

5

r/w

4

3

2

r/w

1

r/w

0

r/w

Function

High Byte

Default Value

Bit Position

Access

Function

Default Value

0

7

r/w

0

6

r/w

0

5

r/w

0

4

0

3

1

2

r/w

0

1

r/w

0

r/w

Low Byte

0

1

0

1

0

1

Sets the scaling of the output voltage – equal to the feedback resistor

divider ratio

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r/w

Mantissa

0

r/w

Function

Exponent

Default Value

Bit Position

Access

Function

Default Value

1

7

r/w

0

6

r/w

1

5

r/w

1

4

1

3

0

2

r/w

0

1

r/w

1

0

r/w

Mantissa

0

Sets the value of input voltage at which the module turns on

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

Function

Exponent

Mantissa

Default Value

Bit Position

Access

1

7

r

1

6

r/w

1

5

r/w

1

4

0

3

0

2

r/w

0

1

r/w

0

r/w

Function

Mantissa

Default Value

0

1

0

1

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Preliminary Data Sheet

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Table 6 (continued)

Non-Volatile

Memory

Storage

Hex

Command

Code

Brief Description

Sets the value of input voltage at which the module turns off

Format Linear, two’s complement binary

Bit Position

Access

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

Function

Exponent

Mantissa

36

VIN_OFF

YES

Default Value

Bit Position

Access

1

7

r

1

6

r/w

1

5

r/w

1

4

r/w

0

3

r/w

0

2

r/w

0

1

r/w

0

r/w

Function

Mantissa

Default Value

0

1

0

1

0

Returns the value of the gain correction term used to correct the measured

output current

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

4

r

3

r

2

r

1

r

0

r/w

r

Function

Exponent

Mantissa

38

IOUT_CAL_GAIN

YES

Default Value

Bit Position

Access

1

7

r/w

0

6

r/w

0

5

r/w

0

4

r/w

1

3

r/w

0

2

r/w

0

1

r/w

V

0

r/w

Function

Default Value

Mantissa

V: Variable based on factory calibration

Returns the value of the offset correction term used to correct the measured

output current

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

4

r

3

r

2

1

r

0

r

r/w

Function

Exponent

Mantissa

39

IOUT_CAL_OFFSET

YES

Default Value

Bit Position

Access

1

7

r

1

6

r

1

5

r/w

0

4

r/w

0

3

r/w

V

2

r/w

0

1

r/w

0

r/w

Function

Default Value

Mantissa

V: Variable based on factory calibration

0

Sets the voltage level for an output overvoltage fault. Exponent is fixed at

-10.

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r/w

5

4

3

2

1

r/w

0

r/w

Function

High Byte

40

VOUT_OV_FAULT_LIMIT

YES

Default Value

Bit Position

Access

0

7

r/w

0

6

r/w

0

5

r/w

0

4

r/w

0

3

r/w

1

2

r/w

0

1

r/w

1

0

r/w

Function

Low Byte

Default Value

0

1

0

1

0

Instructs the module on what action to take in response to a output

overvoltage fault

Format

Bit Position

Access

Unsigned Binary

7

r/w

6

r/w

5

r/w

4

3

2

r

1

r

0

r

41

VOUT_OV_FAULT_RESPONSE

YES

r/w

RSP RSP

Function

RS[2] RS[1] RS[0]

X

1

X

0

X

0

[1]

[0]

Default Value

1

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Preliminary Data Sheet

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3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Table 6 (continued)

Non-Volatile

Memory

Storage

Hex

Command

Code

Brief Description

Sets the voltage level for an output undervoltage fault. Exponent is fixed at

-10.

Format

Linear, two’s complement binary

Bit Position

Access

7

r

6

r/w

5

r/w

4

r/w

3

r/w

2

r/w

1

r/w

0

r/w

Function

High Byte

44

VOUT_UV_FAULT_LIMIT

YES

Default Value

Bit Position

Access

0

7

r/w

0

6

r/w

0

5

r/w

0

4

r/w

0

3

r/w

1

2

r/w

0

1

r/w

0

r/w

Function

Low Byte

Default Value

1

0

1

Instructs the module on what action to take in response to a output

undervoltage fault

Format

Bit Position

Access

Unsigned Binary

7

r/w

6

r/w

5

r/w

4

3

2

r

1

r

0

r

45

VOUT_UV_FAULT_RESPONSE

YES

r/w

RSP RSP

Function

RS[2] RS[1] RS[0]

X

1

X

0

X

0

[1]

[0]

Default Value

0

Sets the output overcurrent fault level in A (cannot be changed)

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

4

r

3

r

2

r

1

r

0

r

Function

Exponent

Mantissa

46

IOUT_OC_FAULT_LIMIT

Default Value

Bit Position

Access

1

7

r

1

6

r

1

5

r

1

4

r

1

3

r

0

2

r

0

1

r

0

r

YES

Function

Mantissa

Default Value

0

1

Sets the output overcurrent warning level in A

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

4

r

3

r

2

r

1

r

0

r

Function

Exponent

Mantissa

4A

IOUT_OC_WARN_LIMIT

Default Value

Bit Position

Access

1

7

r

1

6

r

1

5

r/w

1

4

r/w

1

3

r/w

0

2

r/w

0

1

r/w

0

r/w

YES

Function

Mantissa

Default Value

0

1

0

1

Sets the output voltage level at which the PGOOD pin is asserted high.

Exponent is fixed at -10.

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r/w

5

4

3

2

1

r/w

0

r/w

Function

High Byte

5E

POWER_GOOD_ON

YES

Default Value

Bit Position

Access

0

7

r/w

0

6

r/w

0

5

r/w

0

4

r/w

0

3

r/w

1

2

r/w

0

1

r/w

0

r/w

Function

Low Byte

Default Value

0

1

0

1

0

1

0

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Preliminary Data Sheet

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Table 6 (continued)

Non-Volatile

Memory

Storage

Hex

Command

Code

Brief Description

Sets the output voltage level at which the PGOOD pin is de-asserted low.

Exponent is fixed at -10.

Format

Linear, two’s complement binary

Bit Position

Access

7

r

6

r/w

5

r/w

4

r/w

3

r/w

2

r/w

1

r/w

0

r/w

Function

High Byte

5F

POWER_GOOD_OFF

YES

Default Value

Bit Position

Access

0

7

r/w

0

6

r/w

0

5

r/w

0

4

r/w

0

3

r/w

1

2

r/w

0

1

r/w

0

r/w

Function

Low Byte

Default Value

0

1

0

1

0

1

0

Sets the rise time of the output voltage during startup

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

4

r

3

r

2

r

1

r

0

r/w

r

Function

Exponent

Mantissa

61

TON_RISE

YES

Default Value

Bit Position

Access

1

7

r/w

1

6

r/w

1

5

r/w

0

4

r/w

0

3

r/w

0

2

r/w

0

1

r/w

0

r/w

Function

Mantissa

Default Value

0

1

0

1

0

1

0

Returns one byte of information with a summary of the most critical module

faults

Format

Bit Position

Access

Unsigned Binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

78

STATUS_BYTE

r

OTHE

R

VOUT IOUT VIN_

_OV _OC UV

Flag

X

0

OFF

0

TEMP CML

Default Value

0

Returns two bytes of information with

fault/warning conditions

a summary of the module’s

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

r

4

r

3

2

r

1

r

0

r

PGO

OD

0

3

r

IOUT

_OC

Flag

VOUT

X

79

STATUS_WORD

Default Value

Bit Position

Access

0

7

r

0

6

r

0

5

r

0

4

r

0

2

r

0

1

r

0

r

OTHE

R

VOUT IOUT VIN_

_OV _OC UV

Flag

X

0

OFF

0

TEMP CML

Default Value

0

Returns one byte of information with the status of the module’s output

voltage related faults

Format

Bit Position

Access

Unsigned Binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

7A

STATUS_VOUT

Flag

Default Value

VOUT_OV

0

X

0

X

0

VOUT_UV

0

X

0

X

0

X

0

X

0

Returns one byte of information with the status of the module’s output

current related faults

Format

Bit Position

Access

Unsigned Binary

7

r

6

r

5

4

r

3

r

2

r

1

r

0

r

7B

STATUS_IOUT

r

IOUT_OC_WA

Flag

IOUT_OC

0

X

0

X

0

X

0

X

0

X

0

X

0

RN

0

Default Value

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Table 6 (continued)

Non-Volatile

Memory

Storage

Hex

Command

Code

Brief Description

Returns one byte of information with the status of the module’s temperature

related faults

Format

Unsigned Binary

Bit Position

Access

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

7D

STATUS_TEMPERATURE

Flag

Default Value

OT_FAULT OT_WARN

X

0

X

0

X

0

X

0

X

0

X

0

Returns one byte of information with the status of the module’s

communication related faults

Format

Bit Position

Access

Unsigned Binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

7E

STATUS_CML

Other

Comm

Fault

0

Invalid

Command Data Fail

Invalid PEC

Flag

X

0

X

0

X

0

X

0

Default Value

0

Returns the value of the input voltage applied to the module

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

4

r

3

r

2

r

1

r

0

r

Function

Exponent

Mantissa

88

READ_VIN

Default Value

Bit Position

Access

1

7

r

1

6

r

0

5

r

1

4

r

1

3

r

0

2

r

0

1

r

0

r

Function

Mantissa

Default Value

0

Returns the value of the output voltage of the module. Exponent is fixed at

-10.

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

Function

Mantissa

8B

READ_VOUT

Default Value

Bit Position

Access

0

7

r

0

6

r

0

5

r

0

4

r

0

3

r

0

2

r

0

1

r

0

r

Function

Mantissa

Default Value

0

Returns the value of the output current of the module

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

4

r

3

r

2

r

1

r

0

r

Function

Exponent

Mantissa

8C

READ_IOUT

Default Value

Bit Position

Access

1

7

r

1

6

r

1

5

r

0

4

r

0

3

r

0

2

r

0

1

r

0

r

Function

Mantissa

Default Value

0

Returns one byte indicating the module is compliant to PMBus Spec. 1.1

(read only)

Format

Bit Position

Access

Unsigned Binary

98

PMBUS_REVISION

YES

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

Default Value

0

1

0

1

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Table 6 (continued)

Non-Volatile

Memory

Storage

Hex

Command

Code

Brief Description

Returns the minimum input voltage the module is specified to operate at (read

only)

Format

Linear, two’s complement binary

Bit Position

Access

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

Function

Exponent

Mantissa

A0

MFR_VIN_MIN

YES

Default Value

Bit Position

Access

1

7

r

1

6

r

1

5

r

1

4

r

0

3

r

0

2

r

0

1

r

0

r

Function

Mantissa

Default Value

0

1

0

Returns the minimum output voltage possible from the module (read only)

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

Function

Mantissa

A4

MFR_VOUT_MIN

YES

Default Value

Bit Position

Access

0

7

r

0

6

r

0

5

r

0

4

r

0

3

r

0

2

r

1

r

0

r

Function

Mantissa

Default Value

0

1

0

1

0

Returns module name information (read only)

Format

Bit Position

Access

Unsigned Binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r

Function

Reserved

D0

MFR_SPECIFIC_00

YES

Default Value

Bit Position

Access

1

7

r

1

6

r

1

5

r

0

4

r

1

3

r

0

2

r

0

1

r

0

r

Function

Module Name

Reserved

Default Value

0

1

0

Applies an offset to the READ_VOUT command results to calibrate out offset

errors in module measurements of the output voltage (between -125mV and

+124mV). Exponent is fixed at -10.

Format

Bit Position

Access

Linear, two’s complement binary

7

r/w

6

r

5

r

4

r

3

r

2

r

1

r

0

r

D4

VOUT_CAL_OFFSET

YES

Function

Mantissa

Default Value

Bit Position

Access

V

7

r/w

0

6

r/w

0

5

r/w

0

4

r/w

0

3

r/w

0

2

r/w

0

1

r/w

0

r/w

Function

Mantissa

Default Value

V

Applies a gain correction to the READ_VOUT command results to calibrate out

gain errors in module measurements of the output voltage (between -0.125 and

0.121)

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

r

4

r

3

r

2

r

1

r

0

r/w

D5

VOUT_CAL_GAIN

YES

Function

Exponent

Mantissa

Default Value

Bit Position

Access

1

7

r/w

1

6

r/w

0

5

r/w

0

4

r/w

0

3

r/w

0

2

r/w

0

1

r/w

V

0

r/w

Function

Mantissa

Default Value

V

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Table 6 (continued)

Non-Volatile

Memory

Storage

Hex

Command

Code

Brief Description

Applies an offset correction to the READ_VIN command results to calibrate out

offset errors in module measurements of the input voltage (between -2V and

+1.968V)

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

r

4

r

3

r/w

2

r

1

r

0

r/w

D6

VIN_CAL_OFFSET

YES

Function

Exponent

Mantissa

Default Value

Bit Position

Access

1

7

r

1

6

r

0

5

r/w

1

4

r/w

V

3

r/w

0

2

r/w

0

1

r/w

V

0

r/w

Function

Mantissa

Default Value

0

V

Applies a gain correction to the READ_VIN command results to calibrate out

gain errors in module measurements of the input voltage (between -0.125 and

0.121)

Format

Bit Position

Access

Linear, two’s complement binary

7

r

6

r

5

r

4

r

3

r/w

2

r

1

r

0

r/w

D7

VIN_CAL_GAIN

YES

Function

Exponent

Mantissa

Default Value

Bit Position

Access

1

7

r

1

6

r

0

5

r

0

4

r/w

V

3

r/w

0

2

r/w

0

1

r/w

V

0

r/w

Function

Mantissa

Default Value

0

V

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Characterization

A maximum component temperature of 120°C should

not be exceeded in order to operate within the

derating curves. Thus, the temperature at the

thermocouple location shown in Fig-14 should not

exceed 120°C in normal operation.

Overview

The converter has been characterized for several

operational features, including efficiency, thermal

derating (maximum available load current as a

function of ambient temperature and airflow), ripple

and noise, transient response to load step changes,

start-up and shutdown characteristics.

Note that continuous operation beyond the derated

current as specified by the derating curves may lead

to degradation in performance and reliability of the

converter and may result in permanent damage.

Figures showing data plots and waveforms for

different output voltages are presented in the

following pages.

Thermal Considerations

Power modules operate in a variety of thermal

environments; however, sufficient cooling should

always be provided to help ensure reliable operation.

Considerations include ambient temperature, airflow,

module power dissipation, and the need for increased

reliability. A reduction in the operating temperature of

the module will result in an increase in reliability.

The thermal data presented here is based on

physical measurements taken in a wind tunnel. The

test set-up is shown in Fig-13. The preferred airflow

direction for the module is in Fig-14.

Fig-14: Preferred airflow direction and location

of hot-spot of the module (Tref).

The main heat dissipation method of this converter is

to transfer its heat to the system board. Thus, if the

temperature of the system board goes high, even

with the low ambient temperature, it may exceed the

guaranteed temperature of components.

25.4_

(1.0)

Wind Tunnel

PWBs

Power Module

76.2_

(3.0)

x

Probe Location

for measuring

airflow and

12.7_

(0.50)

ambient

temperature

Air

flow

Fig-13: Thermal test set-up

The maximum available load current, for any given

set of conditions, is defined as the lower of:

(i) The output current at which the temperature of any

component reaches 120°C, or

(ii) The current rating of the converter (12A)

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Characteristic Curves

The following figures provide typical characteristics for the 12A Digital Tomodachi at 5Vo and 25°C

100

12

95

10

NC

0.5m/s

(100LFM)

90

85

80

75

70

8

6

4

2

0

Vin=7V

Vin=14V

1m/s

(200LFM)

Vin=12V

1.5m/s

(300LFM)

Standard

Part (85°C)

Ruggedized (D)

2m/s

(400LFM)

Part (105°C)

45

55

65

75

85

95

105

0

2

4

6

8

10

12

OUTPUT CURRENT, I_O(A)

Fig-15. Converter Efficiency versus Output Current.

AMBIENT TEMPERATURE, T_A^OC

Fig-16. Derating Output Current versus Ambient

Temperature and Airflow.

TIME, t (1us/div)

TIME, t (20us /div)

Fig-18. Transient Response to Dynamic Load Change

from 50% to 100% at 12Vin, Cout= 5x47uF,

CTune=1500pF & RTune=330ohms

Fig-17. Typical output ripple and noise (CO=22uF ceramic,

VIN = 12V, Io = Io,max, ).

TIME, t (2ms/div)

Fig-20. Typical Start-up Using Input Voltage (VIN = 12V,

Io = Io,max).

Fig-19. Typical Start-up Using On/Off Voltage (Io = Io,max).

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Characteristic Curves

The following figures provide typical characteristics for the 12A Digital Tomodachi at 3.3Vo and 25°C

100

12

95

10

NC

90

85

80

75

70

0.5m/s

(100LFM)

8

6

4

2

0

Vin=4.5V

1m/s

(200LFM)

Vin=14V

Vin=12V

Standard

1.5m/s

(300LFM)

Part (85°C)

Ruggedized (D)

Part (105°C)

2m/s

(400LFM)

55

65

75

85

95

105

0

2

4

6

8

10

12

OUTPUT CURRENT, I_O(A)

Fig-21. Converter Efficiency versus Output Current.

AMBIENT TEMPERATURE, T_A^OC

Fig-22. Derating Output Current versus Ambient

Temperature and Airflow.

TIME, t (1us/div)

TIME, t (20us /div)

Fig-24. Transient Response to Dynamic Load Change

from 50% to 100% at 12Vin, Cout= 1x47uF+1x330uF,

CTune=2700pF & RTune=330ohms

Fig-23. Typical output ripple and noise (CO=22uF ceramic,

VIN = 12V, Io = Io,max, ).

TIME, t (2ms/div)

Fig-26. Typical Start-up Using Input Voltage (VIN = 12V,

Io = Io,max).

Fig-25. Typical Start-up Using On/Off Voltage (Io = Io,max).

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Characteristic Curves

The following figures provide typical characteristics for the 12A Digital Tomodachi at 2.5Vo and 25°C

100

12

95

10

NC

90

85

80

75

70

0.5m/s

(100LFM)

Vin=4.5V

8

6

4

2

0

1m/s

(200LFM)

Vin=14V

Vin=12V

Standard

1.5m/s

(300LFM)

Part (85°C)

Ruggedized (D)

Part (105°C)

2m/s

(400LFM

55

65

75

85

95

105

0

2

4

6

8

10

12

OUTPUT CURRENT, I_O(A)

Fig-27. Converter Efficiency versus Output Current.

AMBIENT TEMPERATURE, T_A^OC

Fig-28. Derating Output Current versus Ambient

Temperature and Airflow.

TIME, t (1us/div)

TIME, t (20us /div)

Fig-30. Transient Response to Dynamic Load Change

from 50% to 100% at 12Vin, Cout= 1x47uF+1x330uF,

CTune=3300pF & RTune=270ohms

Fig-29. Typical output ripple and noise (CO=22uF ceramic,

VIN = 12V, Io = Io,max, ).

TIME, t (2ms/div)

Fig-32. Typical Start-up Using Input Voltage (VIN = 12V,

Io = Io,max).

Fig-31. Typical Start-up Using On/Off Voltage (Io = Io,max).

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Characteristic Curves

The following figures provide typical characteristics for the 12A Digital Tomodachi at 1.8Vo and 25°C

95

12

90

10

Vin=3.5V

NC

0.5m/s

(100LFM)

8

6

4

2

0

85

80

75

70

Vin=12V

Vin=14V

1.5m/s

(300LFM)

1m/s

Standard Part

(200LFM)

(85°C)

Ruggedized (D)

Part (105°C)

2m/s

(400LFM)

55

65

75

85

95

105

0

2

4

6

8

10

12

OUTPUT CURRENT, IO (A)

Fig-33. Converter Efficiency versus Output Current.

AMBIENT TEMPERATURE, TA OC

Fig-34. Derating Output Current versus Ambient

Temperature and Airflow.

TIME, t (1us/div)

TIME, t (20us /div)

Fig-36. Transient Response to Dynamic Load Change

from 50% to 100% at 12Vin, Cout= 1x47uF+2x330uF,

CTune=5600pF & RTune=270ohms

Fig-35. Typical output ripple and noise (CO=22uF ceramic,

VIN = 12V, Io = Io,max, ).

TIME, t (2ms/div)

Fig-38. Typical Start-up Using Input Voltage (VIN = 12V,

Io = Io,max).

Fig-37. Typical Start-up Using On/Off Voltage (Io = Io,max).

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Characteristic Curves

The following figures provide typical characteristics for the 12A Digital Tomodachi at 1.2Vo and 25°C

95

12

90

85

10

NC

Vin=3V

0.5m/s

(100LFM)

80

75

70

65

60

55

50

8

6

4

2

0

Vin=14V

Vin=12V

Standard

Part (85 C)

1.5m/s

(300LFM)

1m/s

(200LFM)

Ruggedized (D)

2m/s

(400LFM)

Part (105°C)

0

2

4

6

8

10

12

55

65

75

85

95

105

OUTPUT CURRENT, I_O(A)

Fig-39. Converter Efficiency versus Output Current.

AMBIENT TEMPERATURE, T_A^OC

Fig-40. Derating Output Current versus Ambient

Temperature and Airflow.

TIME, t (1us/div)

TIME, t (20us /div)

Fig-42. Transient Response to Dynamic Load Change

from 50% to 100% at 12Vin, Cout= 1x47uF+3x330uF,

CTune=10nF & RTune=220ohms

Fig-41. Typical output ripple and noise (CO=22uF ceramic,

VIN = 12V, Io = Io,max, ).

TIME, t (2ms/div)

Fig-44. Typical Start-up Using Input Voltage (VIN = 12V,

Io = Io,max).

Fig-43. Typical Start-up Using On/Off Voltage (Io = Io,max).

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Characteristic Curves

The following figures provide typical characteristics for the 12A Digital Tomodachi at 0.6Vo and 25°C

85

12

80

10

Vin=3V

NC

75

70

65

60

55

50

0.5m/s

(100LFM)

8

6

4

2

0

Standard Part

(85°C)

Vin=14V

1.5m/s

(300LFM)

Vin=12V

Ruggedized (D)

Part (105°C)

1m/s

(200LFM)

2m/s

(400LFM)

0

2

4

6

8

10

12

55

65

75

85

95

105

OUTPUT CURRENT, I_O(A)

Fig-45. Converter Efficiency versus Output Current.

AMBIENT TEMPERATURE, T_A^OC

Fig-46. Derating Output Current versus Ambient

Temperature and Airflow.

TIME, t (1us/div)

TIME, t (20us /div)

Fig-48. Transient Response to Dynamic Load Change

from 50% to 100% at 12Vin, Cout= 3x47uF+6x330uF,

CTune=47nF, RTune=180ohms

Fig-47. Typical output ripple and noise (CO=22uF ceramic,

VIN = 12V, Io = Io,max, ).

TIME, t (2ms/div)

Fig-50. Typical Start-up Using Input Voltage (VIN = 12V,

Io = Io,max).

Fig-49. Typical Start-up Using On/Off Voltage (Io = Io,max).

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Example Application Circuit

Requirements:

Vin:

12V

Vout:

1.8V

Iout:

Vout:

Vin, ripple

9A max., worst case load transient is from 6A to 9A

1.5% of Vout (27mV) for worst case load transient

1.5% of Vin (180mV, p-p)

Vin+

Vout+

VIN

VOUT

VS+

PGOOD

RTUNE

CTUNE

MODULE

SEQ

CLK

TRIM

ADDR0

ADDR1

CI2

CI3

CI1

CO3

CO1

CO2

DATA

SMBALRT#

RTrim

ON/OFF

SYN

RADDR1 RADDR0

SIG_GND

GND

VS-

GND

CI1

CI2

CI3

Decoupling cap - 1x0.047uF/16V ceramic capacitor (e.g. Murata LLL185R71C473MA01)

2x22uF/16V ceramic capacitor (e.g. Murata GRM32ER61C226KE20)

470uF/16V bulk electrolytic

CO1

CO2

CO3

CTune

RTune

RTrim

Decoupling cap - 1x0.047uF/16V ceramic capacitor (e.g. Murata LLL185R71C473MA01)

2 x 47uF/6.3V ceramic capacitor (e.g. Murata GRM31CR60J476ME19)

1 x 330uF/6.3V Polymer (e.g. Sanyo Poscap)

3300pF ceramic capacitor (can be 1206, 0805 or 0603 size)

270 ohms SMT resistor (can be 1206, 0805 or 0603 size)

10k SMT resistor (can be 1206, 0805 or 0603 size, recommended tolerance of 0.1%)

Note: The DATA, CLK and SMBALRT pins do not have any pull-up resistors inside the module.

Typically, the SMBus master controller will have the pull-up resistors as well as provide the driving

source for these signals.

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Mechanical Drawing

All dimensions are in millimeters (inches)

Tolerances:

x.x mm  0.5 mm (x.xx in.  0.02 in.) [unless otherwise indicated]

x.xx mm  0.25 mm (x.xxx in  0.010 in.)

Pin Connections

Pin #

Function

ON/OFF

Vin

Pin #

10

Function

PGOOD

SYNC ¹

VS-

1

2

3

4

5

6

7

8

9

11

GND

Vout

12

13

SIG_GND

SMBALERT

DATA

VS+

14

Trim

15

GND

CLK

16

ADDR0

ADDR1

17

SEQ

¹If unused, connect to Ground.

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Recommended Pad Layout

All dimensions are in millimeters (inches)

Tolerances:

x.x mm  0.5 mm (x.xx in.  0.02 in.) [unless otherwise indicated]

x.xx mm  0.25 mm (x.xxx in  0.010 in.)

Pin Connections

Pin #

Function

ON/OFF

Vin

Pin #

10

Function

PGOOD

SYNC ²

VS-

1

2

3

4

5

6

7

8

9

²If unused, connect to Ground.

11

GND

Vout

12

13

SIG_GND

SMBALERT

DATA

VS+

14

Trim

15

GND

CLK

16

ADDR0

ADDR1

17

SEQ

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Packaging Details

The 12A Digital Tomodachi modules are supplied in tape & reel as standard. Modules are shipped in quantities

of 200 modules per reel.

All Dimensions are in millimeters and (in inches).

Reel Dimensions:

Outside Dimensions: 330.2 mm (13.00)

Inside Dimensions: 177.8 mm (7.00”)

Tape Width:

24.00 mm (0.945”)

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Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

to verify results and performance.

Surface Mount Information

It is recommended that the pad layout include a test

pad where the output pin is in the ground plane. The

thermocouple should be attached to this test pad

since this will be the coolest solder joints. The

temperature of this point should be:

Pick and Place

The 12A Digital Tomodachi modules use an open

frame construction and are designed for a fully

automated assembly process. The modules are fitted

with a label designed to provide a large surface area

for pick and place operations. The label meets all the

requirements for surface mount processing, as well

as safety standards, and is able to withstand reflow

temperatures of up to 300°C. The label also carries

product information such as product code, serial

number and the location of manufacture.

Maximum peak temperature is 260 C.

Minimum temperature is 235 C.

Dwell time above 217 C: 60 seconds minimum

Dwell time above 235 C: 5 to 15 second

MSL Rating

The 12A Digital Tomodachi modules have a MSL

rating of 2a.

Nozzle Recommendations

Storage and Handling

The module weight has been kept to a minimum by

using open frame construction. Variables such as

nozzle size, tip style, vacuum pressure and

placement speed should be considered to optimize

this process. The minimum recommended inside

nozzle diameter for reliable operation is 3mm. The

maximum nozzle outer diameter, which will safely fit

within the allowable component spacing, is 7mm.

The recommended storage environment and

handling procedures for moisture-sensitive surface

mount packages is detailed in J-STD-033 Rev. A

(Handling, Packing, Shipping and Use of

Moisture/Reflow Sensitive Surface Mount Devices).

Moisture barrier bags (MBB) with desiccant are

required for MSL ratings of 2 or greater. These

sealed packages should not be broken until time of

use. Once the original package is broken, the floor

life of the product at conditions of  30°C and 60%

relative humidity varies according to the MSL rating

(see J-STD-033A). The shelf life for dry packed SMT

packages will be a minimum of 12 months from the

bag seal date, when stored at the following

conditions: < 40°C, < 90% relative humidity.

Bottom Side / First Side Assembly

This module is not recommended for assembly on

the bottom side of a customer board. If such an

assembly is attempted, components may fall off the

module during the second reflow process.

300

Lead Free Soldering

Per J-STD-020 Rev. C

Peak Temp 260°C

250

The modules are lead-free (Pb-free) and RoHS

compliant and fully compatible in a Pb-free soldering

process. Failure to observe the instructions below

may result in the failure of or cause damage to the

modules and can adversely affect long-term

reliability.

Cooling

Zone

200

* Min. Time Above 235°C

15 Seconds

150

Heating Zone

1°C/Second

*Time Above 217°C

60 Seconds

100

50

0

Pb-free Reflow Profile

Reflow Time (Seconds)

Power Systems will comply with J-STD-020 Rev. C

Fig-51: Recommended linear reflow profile

using Sn/Ag/Cu solder.

(Moisture/Reflow

Sensitivity

Classification

for

Nonhermetic Solid State Surface Mount Devices) for

both Pb-free solder profiles and MSL classification

procedures. This standard provides a recommended

forced-air-convection reflow profile based on the

volume and thickness of the package (table 4-2).

The suggested Pb-free solder paste is Sn/Ag/Cu

(SAC). The recommended linear reflow profile using

Sn/Ag/Cu solder is shown in Fig-51. Soldering

outside of the recommended profile requires testing

Post Solder Cleaning and Drying

Considerations

Post solder cleaning is usually the final circuit-board

assembly process prior to electrical board testing.

The result of inadequate cleaning and drying can

Page 39 of 41

Http://www.fdk.com

Ver 1.7 May. 8, 2013

Delivering Next Generation Technology

Series

Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

affect both the reliability of a power module and the

testability of the finished circuit-board assembly. For

guidance on appropriate soldering, cleaning and

drying procedures, refer to Board Mounted Power

Modules: Soldering and Cleaning Application Note

(AN04-001).

Page 40 of 41

Http://www.fdk.com

Ver 1.7 May. 8, 2013

Delivering Next Generation Technology

Series

Preliminary Data Sheet

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Part Number System

Product

Series

Input

Voltage Scheme

Mounting

Output

Voltage

Rated

Current

ON/OFF

Logic

Shape

S

Regulation

D

FG

12

S

R60

12

*

A

0.6V

(Programmable:

See page 9)

Series

Name

Surface

Mount

N: Negative

P: Positive

Small D: Digital Feature Typ=12V

12A

Standard

Cautions

NUCLEAR AND MEDICAL APPLICATIONS: FDK Corporation products are not authorized for use as critical

components in life support systems, equipment used in hazardous environments, or nuclear control systems

without the written consent of FDK Corporation.

SPECIFICATION CHANGES AND REVISIONS: Specifications are version-controlled, but are subject to

change without notice.

Page 41 of 41

Http://www.fdk.com

Ver 1.7 May. 8, 2013


型号：	FGSD12SR6012A
厂家：	ETC
描述：	3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output 3-14.4Vdc输入，12A， 0.45-5.5Vdc输出
文件：	总41页 (文件大小：798K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FGSD12SR6012A [ETC]

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