FST16210MTDX [ETC]

Bus Switch ; 总线开关\n
FST16210MTDX
型号: FST16210MTDX
厂家: ETC    ETC
描述:

Bus Switch
总线开关\n

开关 逻辑集成电路 光电二极管 驱动
文件: 总4页 (文件大小:113K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
November 1998  
Revised December 1999  
FST16210  
20-Bit Bus Switch  
General Description  
Features  
The Fairchild Switch FST16210 provides 20-Bits of high-  
speed CMOS TTL-compatible bus switching. The low on  
resistance of the switch allows inputs to be connected to  
outputs without adding propagation delay or generating  
additional ground bounce noise.  
4switch connection between two ports.  
Minimal propagation delay through the switch.  
Low lCC  
.
Zero bounce in flow-through mode.  
Control inputs compatible with TTL level.  
The device is organized as a 10-bit or 20-Bit bus switch.  
When OE1 is LOW, the switch is ON and Port 1A is con-  
nected to Port 1B. When OE2 is LOW, Port 2A is connected  
to Port 2B.  
Ordering Code:  
Order Number Package Number  
Package Description  
FST16210MTD  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Diagram  
Truth Table  
Pin Descriptions  
Inputs  
Inputs/Outputs  
Pin Name  
Description  
OE1  
OE2  
1A, 1B  
2A, 2B  
L
L
L
H
L
1A = 1B  
2A = 2B  
OE1, OE2  
1A, 2A  
Bus Switch Enables  
Bus A  
1A = 1B  
Z
2A = 2B  
Z
H
H
Z
Z
1B, 2B  
Bus B  
H
© 1999 Fairchild Semiconductor Corporation  
DS500193  
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
Recommended Operating  
Conditions (Note 3)  
Supply Voltage (VCC  
)
0.5V to +7.0V  
0.5V to +7.0V  
0.5V to +7.0V  
50mA  
DC Switch Voltage (VS)  
Power Supply Operating (VCC)  
4.0V to 5.5V  
0V to 5.5V  
0V to 5.5V  
DC Input Voltage (VIN) (Note 2)  
DC Input Diode Current (lIK) VIN<0V  
DC Output (IOUT) Sink Current  
Input Voltage (VIN  
)
Output Voltage (VOUT  
)
128mA  
Input Rise and Fall Time (tr, tf)  
Switch Control Input  
DC VCC/GND Current (ICC/IGND  
)
+/100mA  
0nS/V to 5nS/V  
0nS/V to DC  
Storage Temperature Range (TSTG  
)
65°C to +150 °C  
Switch I/O  
Free Air Operating Temperature (TA)  
-40 °C to +85 °C  
Note 1: The Absolute Maximum Ratingsare those values beyond which  
the safety of the device cannot be guaranteed. The device should not be  
operated at these limits. The parametric values defined in the Electrical  
Characteristics tables are not guaranteed at the absolute maximum rating.  
The Recommended Operating Conditionstable will define the conditions  
for actual device operation.  
Note 2: The input and output negative voltage ratings may be exceeded if  
the input and output diode current ratings are observed.  
Note 3: Unused control inputs must be held high or low. They may not float.  
DC Electrical Characteristics  
T
A = −40 °C to +85 °C  
VCC  
(V)  
Symbol  
Parameter  
Units  
Conditions  
Typ  
Min  
Max  
(Note 4)  
VIK  
Clamp Diode Voltage  
4.5  
4.05.5  
4.05.5  
5.5  
1.2  
V
V
IIN = −18mA  
VIH  
VIL  
II  
HIGH Level Input Voltage  
LOW Level Input Voltage  
Input Leakage Current  
2.0  
0.8  
±1.0  
10  
±1.0  
7
V
µA  
µA  
µA  
0VIN 5.5V  
IN = 5.5V  
0 A, B VCC  
0
V
IOZ  
OFF-STATE Leakage Current  
Switch On Resistance  
(Note 5)  
5.5  
RON  
4.5  
4
4
V
V
V
V
V
IN = 0V, IIN = 64mA  
4.5  
7
IN = 0V, IIN = 30mA  
4.5  
8
12  
20  
3
IN = 2.4V, IIN = 15mA  
IN = 2.4V, IIN = 15mA  
IN = VCC or GND, IOUT = 0  
4.0  
11  
ICC  
Quiescent Supply Current  
Increase in ICC per Input  
5.5  
µA  
mA  
ICC  
5.5  
2.5  
One input at 3.4V  
Other inputs at VCC or GND  
Note 4: Typical values are at VCC = 5.0V and TA = +25°C  
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the  
voltages on the two (A or B) pins.  
www.fairchildsemi.com  
2
AC Electrical Characteristics  
T
A = −40 °C to +85 °C,  
L = 50pF, RU = RD = 500Ω  
CC = 4.5 – 5.5V CC = 4.0V  
C
Symbol  
Parameter  
Units  
Conditions  
Figure No.  
V
V
Min  
Max  
Min  
Max  
t
PHL,tPLH  
Prop Delay Bus to Bus  
(Note 6)  
0.25  
0.25  
ns  
ns  
VI = OPEN  
Figure 1,  
Figure 2  
tPZH, tPZL  
Output Enable Time  
1.5  
1.5  
6.0  
7.0  
6.5  
7.2  
VI = 7V for tPZL  
Figure 1,  
Figure 2  
VI = OPEN for tPZH  
VI = 7V for tPLZ  
tPHZ, tPLZ  
Output Disable Time  
ns  
Figure 1,  
Figure 2  
VI = OPEN for tPHZ  
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On  
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).  
Capacitance (Note 7)  
Symbol  
CIN  
CI/O  
Parameter  
Typ  
Max  
Units  
Conditions  
CC = 5.0V  
VCC, OE = 5.0V  
Control pin Input Capacitance  
Input/Output Capacitance  
3
6
pF  
pF  
V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.  
AC Loading and Waveforms  
Note: Input driven by 50 source terminated in 50 Ω  
Note: CL includes load and stray capacitance  
Note: Input PRR = 1.0 MHz, tW = 500 ns  
FIGURE 1. AC Test Circuit  
FIGURE 2. AC Waveforms  
3
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Package Number MTD48  
Technology Description  
The Fairchild Switch family derives from and embodies Fairchilds proven switch technology used for several years in its  
74LVX3L384(FST3384) bus switch product.  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
www.fairchildsemi.com  
4

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