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FT0405BH [ETC]

Logic Level TRIACs ; 逻辑电平双向可控硅\n
FT0405BH
型号： FT0405BH
厂家： ETC    ETC
描述：

Logic Level TRIACs
逻辑电平双向可控硅\n

可控硅 三端双向交流开关
文件： 总4页 (文件大小：144K)
中文：  中文翻译
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FT04...H  
LOGIC LEVEL TRIAC  
TO220-AB  
On-State Current  
4 Amp  
Gate Trigger Current  
£ 5 mA to £ 10 mA  
MT2  
Off-State Voltage  
200 V ÷ 600 V  
This series of TRIACs uses a high  
MT1  
MT2  
performance PNPN technology.  
These parts are intended for general  
purpose AC switching applications with  
highly inductive loads.  
G
Absolute Maximum Ratings, according to IEC publication No. 134  
SYMBOL  
PARAMETER  
RMS On-state Current  
CONDITIONS  
Min.  
Max.  
Unit  
All Conduction Angle, TC = 110 ºC  
Full Cycle, 60 Hz  
4
33  
30  
4.5  
4
A
A
A
IT(RMS)  
ITSM  
ITSM  
I2t  
IGM  
Non-repetitive On-State Current  
Non-repetitive On-State Current  
Fusing Current  
Full Cycle, 50 Hz  
tp = 10 ms, Half Cycle  
A2  
s
Peak Gate Current  
20 µs max.  
Tj =125ºC  
Tj =125ºC  
A
W
Average Gate Power Dissipation  
Critical rate of rise of on-state current  
1
PG(AV)  
I
G
= 2x IGT, tr £100ns  
50  
A/µs  
di/dt  
f= 120 Hz, Tj =125ºC  
Tj  
Operating Temperature  
Storage Temperature  
-40  
-40  
+125  
+150  
ºC  
ºC  
Tstg  
SYMBOL  
PARAMETER  
VOLTAGE  
Unit  
V
B
D
M
Repetitive Peak Off State  
Voltage  
200  
400  
600  
VDRM  
VRRM  
Dec - 02  
FT04...H  
LOGIC LEVEL TRIAC  
Electrical Characteristics  
Quadrant  
Unit  
SYMBOL  
PARAMETER  
CONDITIONS  
SENSITIVITY  
07 08 09  
04  
05  
5
(1)  
Q1÷Q3  
Q4  
mA  
mA  
MAX 5  
5
7
10 10  
10  
IGT  
Gate Trigger Current  
VD = 12 VDC , RL = 33W, Tj = 25 ºC  
VD = VDRM  
VR = VRRM  
,
MAX  
MAX  
MAX  
MAX  
MAX  
MAX  
MAX  
MIN  
5
mA  
µA  
V
IDRM /IRRM  
,
1
5
Tj = 125 ºC  
Tj = 25 ºC  
Off-State Leakage Current  
(2)  
Vto  
Tj = 125 ºC  
Tj = 125 ºC  
0.9  
120  
1.6  
1.3  
0.2  
Threshold Voltage  
Dynamic Resistance  
On-state Voltage  
(2)  
Rd  
mW  
V
(2)  
IT = 5.5 Amp, tp = 380 µs, Tj = 25 ºC  
VD = 12 VDC , RL = 33W, Tj = 25 ºC  
VD = VDRM , RL = 3.3KW, Tj = 125 ºC  
IT = 100 mA , Gate open, Tj = 25 ºC  
VTM  
Q1÷Q4(3)  
Q1÷Q4(3)  
VGT  
VGD  
Gate Trigger Voltage  
Gate Non Trigger Voltage  
Holding Current  
V
V
(2)  
IH  
mA  
mA  
MAX  
20  
20  
40  
15  
10  
20  
10  
10  
15  
15  
10  
20  
15  
25  
30  
(4)  
Latching Current  
IL  
IG = 1.2 IGT, Tj = 25 ºC  
Q1,Q3,Q4 MAX  
Q2  
MAX  
VD = 0.67 x VDRM  
,
Gate open  
(2)  
dv / dt  
Critical Rate of Voltage Rise  
Critical Rate of Current Rise  
20  
MIN 10  
20  
10  
40  
V/µs  
Tj = 125 ºC  
2.5  
1.5  
1.8  
0.9  
-
MIN  
MIN  
MIN  
1.5  
2.7  
2.0  
-
A/ms  
(2)  
(dv/dt)c= 0.1 V/µs  
(dv/dt)c= 10 V/µs  
without snubber  
Tj = 125 ºC  
Tj = 125 ºC  
Tj = 125 ºC  
(di/dt)c  
-
-
-
-
-
-
Rth(j-c)  
Thermal Resistance  
Junction-Case  
2.6  
ºC/W  
ºC/W  
Thermal Resistance  
Junction-Ambient  
60  
Rth(j-a)  
(1) Minimum IGT is guaranted at 5% of IGT max.  
(2) For either polarity of electrode MT2 voltage with reference to electrode MT1.  
(3) Q4 for 4 Quadrant Triacs  
Q3 for 3 Quadrant Triacs  
(4) Only for 4 Quadrant Triacs  
PART NUMBER INFORMATION  
F
T
04  
08  
B
H
00 TU  
FAGOR  
TRIAC  
PACKAGING  
FORMING  
CASE  
VOLTAGE  
CURRENT  
SENSITIVITY  
Dec - 02  
FT04...H  
LOGIC LEVEL TRIAC  
Fig. 1: Maximum power dissipation versus  
RMS on-state curren (full cycle).  
Fig. 2: RMS on-state current versus case  
temperature (full cycle).  
I
(A)  
T(RMS)  
P (W)  
5
4.5  
4.0  
3.5  
4
3
2
1
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
I
(A)  
T(RMS)  
Tc (ºC)  
0
0
1
2
3
4
0
25  
50  
75  
100  
125  
Fig. 4: On-state characteristics (maximum  
values)  
Fig. 3: : Relative variation of thermal  
impedance versus pulse duration.  
I
(A)  
K=[Zth / Rth]  
TM  
100  
10  
1
1E+0  
Zth(j-c)  
Tj max  
1E-1  
Zth(j-a)  
Tj = 25 ºC  
Tj max  
Vto = 0.85 V  
Rt = 35mW  
tp (s)  
V
(V)  
TM  
1E-2  
1E-3  
1E-2  
1E-1  
1E+0 1E+1 1E+2 5E+2  
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0  
Fig. 5: Surge peak on-state current versus  
number of cycles  
Fig. 6: Non-repetitive surge peak on-state  
current for a sinusoidal pulse with width  
tp<10ms, and corresponding value of I  
2t.  
(A), I2 t (A2s)  
I
(A)  
I
TSM  
TSM  
dl/dt limitation  
50A/µs  
30  
25  
20  
15  
10  
5
Tj initial = 25 ºC  
t=20ms  
One cycle  
100  
I
Non repetitive  
TSM  
Tj initial = 25 ºC  
Repetitive  
Tc = 90 ºC  
10  
1
I2t  
Number of cycles  
tp (ms)  
10.00  
0
1
10  
100  
1000  
0.01  
0.10  
1.00  
Dec - 02  
FT04...H  
LOGIC LEVEL TRIAC  
Fig. 8: Relative variation of critical rate of  
decrease of main current versus junction  
temperature  
Fig. 7: Relative variation of gate trigger  
current, holding current and latching versus  
junction temperature (typical values)  
(dI/dt) [Tj]/(dI/dc) [Tj specified]  
I
I
I [Tj]/I  
I
I .[Tj=25ºC]  
c
c
GT, H, L  
GT, H, L  
2.5  
2.0  
1.5  
1.0  
0.5  
0
6
5
4
3
2
1
0
I
GT  
IH&IL  
Tj(ºC)  
Tj(ºC)  
-40 -20  
0
20 40 60 80 100120140  
0
25  
50  
75  
100  
125  
TO-220AB (Plastic)  
PACKAGE MECHANICAL DATA  
DIMENSIONS  
Milimeters  
Nominal  
REF.  
c
B
b2  
Min.  
Max.  
A
a1  
a2  
B
b1  
b2  
C
c1  
c2  
e
F
I
I4  
L
15.20  
15.90  
L
3.75  
F
13.00  
10.00  
0.61  
1.23  
4.40  
0.49  
2.40  
2.40  
6.20  
3.75  
15.80  
2.65  
1.14  
1.14  
14.00  
10.40  
0.88  
1.32  
4.60  
0.70  
2.72  
2.70  
6.60  
3.85  
16.80  
2.95  
1.70  
1.70  
øI  
A
14  
c2  
a1  
13  
12  
a2  
16.40  
2.60  
b1  
M
I2  
I3  
M
c1  
e
Dec - 02  

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