FTA4N65 [ETC]

4A/650V N-Channel MOSFET TO-220 TO-220F; 4A / 650V N沟道MOSFET TO- 220 TO- 220F
FTA4N65
型号: FTA4N65
厂家: ETC    ETC
描述:

4A/650V N-Channel MOSFET TO-220 TO-220F
4A / 650V N沟道MOSFET TO- 220 TO- 220F

文件: 总9页 (文件大小:391K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
FTP04N65  
FTA04N65  
N-Channel MOSFET  
Applications:  
• Adaptor  
• Charger  
VDSS  
650V  
RDS(ON) (Max.)  
2.35  
ID  
4.0A  
• SMPS Standby Power  
• LCD Panel Power  
Features:  
• Lead Free  
D
• Low ON Resistance  
• Low Gate Charge  
• Peak Current vs Pulse Width Curve  
• Inductive Switching Curves  
G
G
D
G
D
S
S
Ordering Information  
TO-220  
TO-220F  
S
Not to Scale  
Not to Scale  
PART NUMBER  
FTP04N65  
PACKAGE  
BRAND  
FTP04N65  
FTA04N65  
TO-220  
FTA04N65  
TO-220F  
Absolute Maximum Ratings TC=25 oC unless otherwise specified  
Symbol  
VDSS  
Parameter  
Drain-to-Source Voltage  
FTP04N65  
FTA04N65  
Units  
V
(NOTE *1)  
(NOTE *2)  
650  
ID  
Continuous Drain Current  
Continuous Drain Current  
PulsedDrainCurrent,VGS@ 10V  
Power Dissipation  
4.0  
4.0*  
ID@ 100 oC  
Figure 3  
A
IDM  
Figure 6  
100  
24  
W
W/ oC  
V
PD  
Derating Factor above 25 oC  
0.80  
0.19  
VGS  
EAS  
Gate-to-Source Voltage  
± 30  
250  
Single Pulse Avalanche Engergy  
L=3.0 mH, ID=4.1 Amps  
mJ  
IAS  
Pulsed Avalanche Rating  
Figure 8  
3.0  
dv/dt  
Peak Diode Recovery dv/dt  
Maximum Temperature for Soldering  
(NOTE *3)  
V/ns  
oC  
TL  
TPKG  
Leads at 0.063in (1.6mm) from Case for 10 seconds  
Package Body for 10 seconds  
300  
260  
Operating Junction and Storage  
Temperature Range  
TJ and TSTG  
-55 to 150  
*Drain Current limited by Maximum Junction Temperature.  
Caution: Stresses greater than those listed in the “Absolute Maximum Ratings” Table may cause permanent damage to the device.  
Thermal Resistance  
Symbol  
RθJC  
RθJA  
Parameter  
Junction-to-Case  
Junction-to-Ambient  
FTP04N65 FTA04N65  
Units  
oC/W  
Test Conditions  
Water cooled heatsink, P adjusted for  
D
1.25  
62  
5.2  
62  
a peak junction temperature of +150 oC  
1 cubic foot chamber, free air.  
.
FTP04N60/FTA04N60 REV. A. April. 2006  
©2006 InPower Semiconductor Co., Ltd.  
OFF Characteristics T =25 oC unless otherwise specified  
J
Symbol  
BVDSS  
Parameter  
Min.  
650  
Typ.  
--  
Max.  
--  
Units  
V
Test Conditions  
Drain-to-Source Breakdown Voltage  
VGS=0V, ID=250µA  
Reference to 25 oC,  
BreakdownVoltage Temperature  
Coefficient, Figure 11.  
V/ oC  
--  
--  
0.71  
--  
--  
BVDSS/TJ  
ID=250µA  
25  
VDS=650V, VGS=0V  
IDSS  
Drain-to-Source Leakage Current  
µA  
VDS=520V, VGS=0V  
TJ=125oC  
--  
--  
250  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
--  
--  
--  
--  
100  
VGS=+30V  
VGS= -30V  
IGSS  
nA  
-100  
ON Characteristics T =25 o unless otherwise specified  
C
J
Symbol  
RDS(ON)  
VGS(TH)  
gfs  
Parameter  
Min.  
Typ.  
1.8  
--  
Max.  
2.35  
4.0  
Units  
Test Conditions  
VGS=10V, ID=2.4A  
Static Drain-to-Source On-Resistance  
Figure 9 and 10.  
--  
(NOTE *4)  
,
250µA  
ID  
=
GS  
Gate Threshold Voltage, Figure 12.  
Forward Transconductance  
2.0  
--  
VDS  
V
=
V
S
VDS=15V, ID=4.0A  
(NOTE *4)  
3.8  
--  
Dynamic Characteristics Essentially independent of operating temperature  
Symbol  
Ciss  
Parameter  
Input Capacitance  
Min.  
--  
Typ.  
660  
85  
Max.  
Units  
Test Conditions  
VGS=0V  
--  
--  
VDS=25V  
Coss  
Output Capacitance  
--  
pF  
f =1.0MHz  
Figure 14  
Crss  
Reverse Transfer Capacitance  
Total Gate Charge  
--  
--  
--  
18  
23  
--  
--  
--  
Qg  
V =325V  
DD  
I
D=4.0A  
Qgs  
Gate-to-Source Charge  
4.3  
nC  
V
VGS=10  
Qgd  
Figure 15  
Gate-to-Drain (“Miller”) Charge  
--  
10.6  
--  
Resistive Switching Characteristics Essentially independent of operating temperature  
Symbol  
td(ON)  
Parameter  
Turn-on Delay Time  
Min.  
--  
Typ.  
21  
Max.  
Units  
Test Conditions  
VDD=325V  
ID=4.0A  
--  
--  
--  
trise  
Rise Time  
--  
21  
ns  
td(OFF)  
tfall  
Turn-Off Delay Time  
--  
44  
VGS=10V  
RG=12Ω  
Fall Time  
--  
40  
--  
FTP04N60/FTA04N60 REV. A. April. 2006  
Page 2 of 9  
©2006 InPower Semiconductor Co., Ltd.  
Source-Drain Diode Characteristics T =25 oC unless otherwise specified  
c
Symbol  
IS  
Parameter  
Min.  
--  
Typ.  
Max.  
Units  
Test Conditions  
Continuous Source Current (Body Diode)  
Maximum Pulsed Current (Body Diode)  
Diode Forward Voltage  
--  
--  
4.0  
16.0  
1.5  
A
A
Integral pn-diode  
in MOSFET  
ISM  
--  
--  
--  
--  
VSD  
IS=4.0A, VGS=0V  
VGS=0V  
--  
V
trr  
Reverse Recovery Time  
250  
1.6  
380  
2.4  
ns  
Qrr  
Reverse Recovery Charge  
IF=4.0A, di/dt=100 A/µs  
µC  
Notes:  
*1. T = +25 oC to +150 oC.  
J
*2. Repetitive rating; pulse width limited by maximum junction temperature.  
*3. I = 4.0A di/dt < 100 A/µs, V < BV  
, T =+150 oC.  
SD  
DD  
DSS  
J
*4. Pulse width < 380µs; duty cycle < 2%.  
FTP04N60/FTA04N60 REV. A. April. 2006  
Page 3 of 9  
©2006 InPower Semiconductor Co., Ltd.  
Figure 1. Maximum Effective Thermal Impedance, Junction-to-Case  
Duty Factor  
50%  
1.000  
0.100  
20%  
10%  
PDM  
2%  
t1  
t2  
1%  
NOTES:  
DUTY FACTOR: D=t1/t2  
PEAK T =P x Z x R  
0.010  
0.001  
single pulse  
+T  
C
J
DM  
θJC θJC  
1E-05  
1E-04  
1E-03  
1E-02  
1E-01  
1E+00  
1E+01  
tp, Rectangular Pulse Duration (s)  
Maximum Power Dissipation  
vs Case Temperature  
F ig u r e 3 . Maximum Continuous Drain Current  
vs Case Temperature  
Figure 2.  
100  
90  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
80  
70  
60  
50  
40  
30  
20  
10  
0
1.0  
0.5  
0
75  
125  
50  
25  
100  
25  
50  
75  
100  
125  
150  
150  
T , Case Temperature (o  
)
C
T , Case Temperature (o  
)
C
C
C
F ig u r e 5 .  
Figure 4. Typical Output Characteristics  
Typical Drain-to-Source ON Resistance  
vs Gate Voltage and Drain Current  
10  
9
8
7
6
5
4
3
2
1
0
7
6
5
4
3
2
PULSE DURATION = 250 µS  
DUTY FACTOR = 0.5% MAX  
PULSE DURATION = 250 µS  
DUTY FACTOR = 0.5% MAX  
T
= 25oC  
T
= 25 oC  
C
C
I
I
= 4A  
= 2A  
D
D
VGS = 5.25V  
VGS = 5.0V  
VGS = 4.5V  
1
0
5
15  
20  
25  
30  
10  
4
5
6
7
8
9
10 11 12 13 14 15  
VDS, Drain-to-Source Voltage ( )  
VGS, Gate-to-Source Voltage ( )  
V
V
FTP04N60/FTA04N60 REV. A. April. 2006  
Page 4 of 9  
©2006 InPower Semiconductor Co., Ltd.  
Figure 6. Maximum Peak Current Capability  
100  
TRANSCONDUCTANCE  
MAY LIMIT CURRENT IN  
THIS REGION  
FOR TEMPERATURES  
ABOVE 25oC DERATE PEAK  
CURRENT AS FOLLOWS:  
150 – T  
C
I = I  
----------------------  
125  
25  
10  
V
= 10V  
GS  
1
1E-6  
10E-6  
100E-6  
1E-3  
10E-3  
100E-3  
1E+0  
10E+0  
tp, Pulse Width (s)  
Unclamped Inductive  
Switching Capability  
F ig u r e 8 .  
Figure 7. Typical Transfer Characteristics  
12  
10  
8
100.0  
10.0  
1.0  
PULSE DURATION = 250 µs  
DUTY CYCLE = 0.5% MAX  
V
= 10 V  
DS  
STARTING T = 25o  
C
J
6
STARTING T = 150o  
J
C
4
+150 oC  
+25 oC  
-55 oC  
If R= 0: t = (L×I )/(1.3BV  
AV AS  
-V )  
DSS DD  
2
If R0: t = (L/R) ln[I ×R)/(1.3BV  
-V )+1]  
AV AS DSS DD  
R equals total Series resistance of Drain circuit  
0.1  
0
6.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.5  
1E-6  
10E-6  
100E-6  
1E-3  
10E-3  
100E-3  
VGS, Gate-to-Source Voltage ( )  
tAV, Time in Avalanche (s)  
V
Figure 9. Typical Drain-to-Source ON  
Resistance vs Drain Current  
Figure 10. Typical Drain-to-Source  
e
Resistanc  
ON  
vs Junction Temperature  
3.5  
2.6  
2.4  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
PULSE DURATION = 2 µs  
DUTY CYCLE = 0.5% MAX  
T
C
=25°C  
3.0  
2.5  
2.0  
1.5  
1.0  
V
= 10V  
GS  
V
= 20V  
GS  
PULSE DURATION = 250 µs  
DUTY CYCLE = 0.5% MAX  
= 10V, I = 4.0A  
V
D
GS  
0
2
4
6
8
10  
12  
-75 -50 -25  
0
25  
50  
75  
100 125 150  
TJ, Junction Temperature (o  
)
C
ID, Drain Current (A)  
FTP04N60/FTA04N60 REV. A. April. 2006  
Page 5 of 9  
©2006 InPower Semiconductor Co., Ltd.  
Figure 12. Typical Threshold Voltage vs  
Junction Temperature  
Figure 11. Typical Breakdown Voltage vs  
Junction Temperature  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
V
= 0V  
V
= V  
DS  
GS  
= 250 µA  
GS  
I = 250 µA  
D
I
D
-75 -50 -25 0.0  
25  
50  
75  
100 125 150  
-75  
-25 0.0 25  
50  
75 100 125  
-50  
150  
TJ, Junction Temperature (oC)  
TJ, Junction Temperature (oC)  
Figure 14. Typical Capacitance vs  
Figure 13. Maximum Forward Bias Safe  
Operating Area  
10000  
1000  
100  
10  
100.0  
10.0  
1.0  
T
= MAX RATED, T = 25 oC  
J
C
Single Pulse  
10µs  
C
iss  
C
oss  
V
= 0V, f = 1MHz  
GS  
C
rss  
C
C
C
= C + C  
gs gd  
iss  
OPERATION IN THIS AREA MAY  
C + C  
oss  
rss  
ds  
gd  
BE LIMITED BY R  
DS(ON)  
= C  
gd  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
1
1000  
VDS, Drain Voltage (V)  
V
DS, Drain-to-Source Voltage (V)  
Figure 15. Typical Gate Charge  
vs Gate-to-Source Voltage  
Figure 16. Typical Body Diode Transfer  
Characteristics  
12  
10  
50  
45  
40  
35  
V
V
V
= 163V  
= 325V  
= 488V  
DS  
DS  
DS  
8
6
30  
25  
20  
15  
10  
5
+150oC  
-55 oC  
4
2
0
I
= 4.0A  
V
= 0V  
D
GS  
0
0
5
10  
15  
20  
25  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
Q
G ,Total Gate Charge (nC)  
VSD, Source-to-Drain Voltage (V)  
FTP04N60/FTA04N60 REV. A. April. 2006  
Page 6 of 9  
©2006 InPower Semiconductor Co., Ltd.  
Test Circuits and Waveforms  
V
DS  
I
D
I
D
V
DS  
V
Miller  
GS  
Region  
V
GS  
V
DD  
D.U.T.  
V
GS(TH)  
1 mA  
Q
Q
gs  
gd  
Q
g
Figure 17. Gate Charge Test Circuit  
Figure 18. Gate Charge Waveform  
V
DS  
R
L
90%  
V
DS  
V
GS  
V
DD  
R
D.U.T.  
G
10%  
t
V
GS  
t
t
t
d(OFF)  
fall  
d(ON)  
rise  
Figure 19. Resistive Switching Test Circuit  
Figure 20. Resistive Switching Waveforms  
FTP04N60/FTA04N60 REV. A. April. 2006  
Page 7 of 9  
©2006 InPower Semiconductor Co., Ltd.  
Test Circuits and Waveforms  
di/dt adj.  
Current  
Pump  
di/dt = 100A/µA  
I
D
Double Pulse  
D.U.T.  
V
DD  
Q
rr  
L
t
rr  
I
D
Figure 22. Diode Reverse Recovery Waveform  
Figure 21. Diode Reverse Recovery Test Circuit  
BV  
DSS  
Series Switch  
(MOSFET)  
L
I
AS  
BV  
DSS  
V
DD  
V
D.U.T.  
DD  
Commutating  
Diode  
0
t
AV  
V
50  
GS  
I
AS  
V
t
GS  
p
2
I
L
AS  
E
=
AS  
2
Figure 23. Unclamped Inductive Switching Test Circuit  
Figure 24. Unclamped Inductive Switching Waveforms  
FTP04N60/FTA04N60 REV. A. April. 2006  
Page 8 of 9  
©2006 InPower Semiconductor Co., Ltd.  
Disclaimers:  
InPower Semiconductor Co., Ltd (IPS) reserves the right to make changes without notice in order to improve reliability,  
function or design and to discontinue any product or service without notice. Customers should obtain the latest relevant  
information before orders and should verify that such information is current and complete. All products are sold subject to  
IPS’s terms and conditions supplied at the time of order acknowledgement.  
InPower Semiconductor Co., Ltd warrants performance of its hardware products to the specifications at the time of sale,  
Testing, reliability and quality control are used to the extent IPS deems necessary to support this warrantee. Except where  
agreed upon by contractual agreement, testing of all parameters of each product is not necessarily performed.  
InPower Semiconductor Co., Ltd does not assume any liability arising from the use of any product or circuit designs described  
herein. Customers are responsible for their products and applications using IPS’s components. To minimize risk, customers  
must provide adequate design and operating safeguards.  
InPower Semiconductor Co., Ltd does not warrant or convey any license either expressed or implied under its patent rights,  
nor the rights of others. Reproduction of information in IPS’s data sheets or data books is permissible only if reproduction is  
without modification or alteration. Reproduction of this information with any alteration is an unfair and deceptive business  
practice. InPower Semiconductor Co., Ltd is not responsible or liable for such altered documentation.  
Resale of IPS’s products with statements different from or beyond the parameters stated by InPower Semiconductor Co., Ltd  
for that product or service voids all express or implied warrantees for the associated IPS’s product or service and is unfair and  
deceptive business practice. InPower Semiconductor Co., Ltd is not responsible or liable for any such statements.  
Life Support Policy:  
InPower Semiconductor Co., Ltd’s products are not authorized for use as critical components in life support devices or  
systems without the expressed written approval of InPower Semiconductor Co., Ltd.  
As used herein:  
1. Life support devices or systems are devices or systems which:  
a. are intended for surgical implant into the human body,  
b. support or sustain life,  
c. whose failure to perform when properly used in accordance with instructions  
for used provided in the labeling, can be reasonably expected to result in significant  
injury to the user.  
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably  
expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.  
FTP04N60/FTA04N60 REV. A. April. 2006  
Page 9 of 9  
©2006 InPower Semiconductor Co., Ltd.  

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