HD74ACT182FP [ETC]
Look-Ahead Carry Generator ; 先行进位发生器\n
| 型号： | HD74ACT182FP |
| 厂家： | 
ETC |
| 描述： | Look-Ahead Carry Generator
|
| 文件： | 总11页 (文件大小：65K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74AC182/HD74ACT182
Carry Lookhead Generator
Description
The HD74AC182/HD74ACT182 is a high-speed carry lookahead generator. It is generally used with the
HD74AC181 or HD74AC381 4-bit arithmetic logic unit to provide high-speed lookahead over word
lengths of more than four bits.
Features
•
•
Outputs Source/Sink 24 mA
HD74ACT182 has TTL-Compatible Inputs
Pin Arrangement
1
2
3
4
5
16 VCC
G1
P1
G0
P0
G3
15 P2
14
13
G2
Cn
12 Cn+X
11 Cn+y
10 G
P3 6
7
8
P
GND
9
Cn+z
(Top view)
HD74AC182/HD74ACT182
Logic Symbol
P0 G0
P1 G1
P2 G2
P3 G3
G
P
Cn
Cn+x
Cn+y
Cn+z
Pin Names
Cn
Carry Input
G0, G2
G1
G3
P0, P1
P2
P3
Carry Generate Inputs (Active Low)
Carry Generate Input (Active Low)
Carry Generate Input (Active Low)
Carry Propagate Inputs (Active Low)
Carry Propagate Input (Active Low)
Carry Propagate Input (Active Low)
Carry Outputs
Cn + x to Cn + z
G
P
Carry Generate Output (Active Low)
Carry Propagate Output (Active Low)
2
HD74AC182/HD74ACT182
Logic Diagram
Cn G0 P0
G1 P1
G2 P2
G3 P3
Cn+x
Cn+y
Cn+z
G
P
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
Functional Description
The HD74AC182/HD74ACT182 carry lookahead generator accepts up to four pairs of Active Low Carry
Propagate (P0 to P3) and Carry Generate (G0 to G3) signals and an Active High Carry input (Cn) and
provides anticipated Active High carries (Cn + x, Cn + y , Cn + z) across four groups of binary adders. The
HD74AC182/HD74ACT182 also has Active Low Carry Propagate (P) and Carry Generate (G) outputs
which may be used for further level of lookahead. The logic equations provided at the outputs are:
Cn + x = G0 + P0Cn
Cn + y = G1 + P1G0 + P1P0Cn
Cn + z = G2 + P2G1 + P2P1G0 + P2P1P0Cn
G
P
= G3 + P3G2 + P3P2G1 + P3P2P1G0
= P3P2P1P0
Also, the HD74AC182/HD74ACT182 can be used with binary ALUs in an active Low or active High input
operand mode. The connections (Figure a) to and from the ALU to the carry lookahead generator are
identical in both cases. Carries are rippled between lookahead blocks. The critical speed path follows the
circled numbers. There are several possible arrangements for the carry interconnects, but all achieve about
the same speed. A 28-bit ALU is formed by dropping the last HD74AC182/HD74ACT182.
3
HD74AC182/HD74ACT182
Truth Table
Inputs
Outputs
Cn
X
L
G0
H
H
L
P0
H
X
X
L
G1
P1
G2
P2
G3
P3
Cn + x Cn + y
Cn + z
G
P
L
L
X
H
X
X
L
H
H
L
X
X
H
H
X
L
X
H
X
X
X
L
H
H
H
L
H
X
X
X
L
L
L
X
X
H
X
X
X
L
H
H
H
X
X
X
H
H
H
X
L
X
X
X
H
H
X
X
L
L
X
X
H
X
X
X
X
L
X
H
X
X
X
X
L
H
H
H
H
L
H
X
X
X
X
L
L
L
L
L
X
X
X
H
H
H
H
H
X
X
X
X
H
H
H
X
L
X
X
X
X
H
H
X
X
L
L
X
X
X
X
H
X
X
X
L
L
L
X
X
H
X
X
X
X
L
X
H
X
X
X
X
L
H
H
H
H
L
H
X
X
X
X
L
H
H
H
H
L
X
X
X
L
X
X
L
L
X
L
L
L
H
X
X
X
L
X
H
X
X
L
X
X
H
X
L
X
X
X
H
L
H
H
H
H
L
H :
High Voltage Level
Low Voltage Level
Immaterial
L
:
:
X
4
HD74AC182/HD74ACT182
DC Characteristics (unless otherwise specified)
Item
Symbol Max
Unit
Condition
Maximum quiescent supply current
ICC
ICC
ICCT
80
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = Worst case
Maximum quiescent supply current
Maximum ICC/input (HD74ACT182)
8.0
1.5
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = 25°C
mA
VIN = VCC – 2.1 V, VCC = 5.5 V,
Ta = Worst case
AC Characteristics: HD74AC182
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ
Max
10.5
8.0
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
11.5
9.0
Unit
Propagation delay
Pn to P
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
8.0
5.5
8.0
5.5
9.5
7.5
9.0
7.0
ns
Propagation delay
Pn to P
10.5
8.0
11.5
9.0
ns
ns
ns
ns
ns
Propagation delay
Cn to Cn + x, y, z
12.0
10.0
12.0
10.0
13.0
10.5
14.0
11.5
13.0
11.0
13.0
11.0
14.0
11.5
15.5
12.5
Propagation delay
Cn to Cn + x, y, z
Propagation delay
Pn or Gn to Cn + x, y, z
Propagation delay
Pn or Gn to Cn + x, y, z
10.5
8.0
11.5
9.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
5
HD74AC182/HD74ACT182
AC Characteristics: HD74ACT182
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
Typ
Max
Min
Max
Unit
Propagation delay
Pn to P
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
5.0
5.0
5.0
5.0
5.0
5.0
1.0
7.0
8.0
9.0
9.0
9.0
10.0
9.0
1.0
10.0
ns
Propagation delay
Pn to P
1.0
1.0
1.0
1.0
1.0
10.0
11.0
11.0
11.0
12.5
1.0
1.0
1.0
1.0
1.0
11.0
12.0
12.0
12.0
13.5
ns
ns
ns
ns
ns
Propagation delay
Cn to Cn + x, y, z
Propagation delay
Cn to Cn + x, y, z
Propagation delay
Pn or Gn to Cn + x, y, z
Propagation delay
Pn or Gn to Cn + x, y, z
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Symbol
CIN
Typ
Unit
Condition
VCC = 5.5 V
VCC = 5.0 V
Input capacitance
Power dissipation capacitance
4.5
pF
pF
CPD
50.0
6
Unit: mm
19.20
20.00 Max
16
1
9
8
1.3
1.11 Max
7.62
+ 0.13
– 0.05
0.25
2.54 ± 0.25
0.48 ± 0.10
0° – 15°
Hitachi Code
DP-16
JEDEC
EIAJ
Conforms
Conforms
Weight (reference value) 1.07 g
Unit: mm
10.06
10.5 Max
9
16
1
8
+ 0.20
7.80
– 0.30
0.80 Max
1.15
0° – 8°
1.27
0.70 ± 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
M
0.12
Hitachi Code
JEDEC
EIAJ
FP-16DA
—
Conforms
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.24 g
Unit: mm
9.9
10.3 Max
9
16
1
8
1.27
+ 0.10
6.10
– 0.30
1.08
0.635 Max
0° – 8°
+ 0.67
0.60
– 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
0.25
M
Hitachi Code
JEDEC
EIAJ
FP-16DN
Conforms
Conforms
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.15 g
Unit: mm
5.00
5.30 Max
16
9
1
8
0.65
0.13 M
0.65 Max
1.0
+ 0.08
– 0.07
*0.22
0.20 ± 0.06
6.40 ± 0.20
0° – 8°
0.50 ± 0.10
0.10
Hitachi Code
JEDEC
EIAJ
TTP-16DA
—
—
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.05 g
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