HD74LV540AT_技术文档

HD74LV540A

Octal Inverted Buffers / Drivers with 3-state Outputs

ADE-205-277 (Z)

1st Edition

April 1999

Description

The HD74LV540A has eight inverter drivers with three state outputs in a 20 pin package. When OE1 and

OE2 is low level, this drivers set up output is enable. Low-voltage operation is suitable for battery-

powered products (e.g., notebook computers), and the low-power consumption extends the battery life.

Features

•

V_CC= 2.0 V to 5.5 V operation

All inputs V_IH(Max.) = 5.5 V (@V_CC= 0 V to 5.5 V)

All outputs V_O(Max.) = 5.5 V (@V_CC= 0 V)

Typical V_OLground bounce < 0.8 V (@V_CC= 3.3 V, Ta = 25°C)

Typical V_OHundershoot > 2.3 V (@V_CC= 3.3 V, Ta = 25°C)

Output current ±8 mA (@V_CC= 3.0 V to 3.6 V), ±16 mA (@V_CC= 4.5 V to 5.5 V)

Function Table

Inputs

OE1

L

OE2

L

A

L

Output Y

H

L

H

X

H

X

Z

X

H

Note: H: High level

L: Low level

X: Immaterial

Z: High impedance

HD74LV540A

Pin Arrangement

1

2

3

4

5

6

7

8

9

20 V_CC

OE1

A1

A2

A3

A4

A5

A6

A7

A8

19

18

17

16

15

14

13

12

11

OE2

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y8

GND 10

(Top view)

2

HD74LV540A

Absolute Maximum Ratings

Item

Symbol

Ratings

–0.5 to 7.0

–0.5 to V_CC+ 0.5

–0.5 to 7.0

–20

Unit

V

Conditions

Supply voltage range

Input voltage range*¹

Output voltage range*^{1, 2}

V_CC

V_I

V

V_O

V

Output: H or L

V_CC: OFF or Output: Z

V_I< 0

Input clamp current

I_IK

mA

Output clamp current

I_OK

±50

V_O< 0 or V_O> V_CC

V_O= 0 to V_CC

Continuous output current

I_O

±35

Continuous current through

I_CCor I_GND

±70

V

_CCor GND

Maximum power dissipation

P_T

835

mW

SOP

at Ta = 25°C (in still air)*³

757

TSSOP

Storage temperature

Tstg

–65 to 150

°C

Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,

no two of which may be realized at the same time.

1. The input and output voltage ratings may be exceeded if the input and output clamp-current

ratings are observed.

2. This value is limited to 5.5 V maximum.

3. The maximum package power dissipation was calculated using a junction temperature of 150°C.

3

HD74LV540A

Recommended Operating Conditions

Item

Symbol

V_CC

Min

2.0

0

Max

5.5

V_CC

5.5

–50

–2

Unit

V

Conditions

Supply voltage range

Input voltage range

Output voltage range

V_I

V

V_O

0

V

H or L

0

High impedance state

V_CC= 2.0 V

Output current

I_OH

—

0

µA

mA

V_CC= 2.3 to 2.7 V

V_CC= 3.0 to 3.6 V

V_CC= 4.5 to 5.5 V

V_CC= 2.0 V

–8

–16

50

I_OL

µA

2

mA

V_CC= 2.3 to 2.7 V

V_CC= 3.0 to 3.6 V

V_CC= 4.5 to 5.5 V

V_CC= 2.3 to 2.7 V

V_CC= 3.0 to 3.6 V

V_CC= 4.5 to 5.5 V

8

16

Input transition rise or fall rate

∆t /∆v

200

100

20

ns/V

0

Operating free-air temperature Ta

–40

85

°C

Note: Unused or floating inputs must be held high or low.

Logic Diagram

1

OE1

19

OE2

2

18

A1

Y1

To Seven Other Channels

4

HD74LV540A

DC Electrical Characteristics

•

Ta = –40 to 85°C

Item

Symbol

V_CC(V)*

2.0

Min

Typ

—

Max

—

Unit

Test Conditions

Input voltage

V_IH

1.5

V

2.3 to 2.7

3.0 to 3.6

4.5 to 5.5

2.0

V

_CC× 0.7

—

_CC× 0.7

—

V_IL

—

0.5

2.3 to 2.7

3.0 to 3.6

4.5 to 5.5

—

V

_CC× 0.3

—

_CC× 0.3

—

Output voltage

V_OH

Min to

Max

V_CC– 0.1

—

V

I_OH= –50 µA

2.3

3.0

4.5

2.0

2.48

3.8

—

0.1

I_OH= –2 mA

I_OH= –8 mA

I_OH= –16 mA

I_OL= 50 µA

V_OL

Min to

Max

2.3

—

0.4

0.44

0.55

±1

I_OL= 2 mA

3.0

I_OL= 8 mA

4.5

I_OL= 16 mA

Input current

I_IN

0 to 5.5

5.5

µA

V_IN= 5.5 V or GND

V_O= V_CCor GND

Off-state

I_OZ

±5

output current

Quiescent

I_CC

5.5

0

—

3

20

5

µA

pF

V_IN= V_CCor GND, I_O= 0

V_Ior V_O= 0 V to 5.5 V

V_I= V_CCor GND

supply current

Output leakage I_OFF

current

Input

C_IN

3.3

—

capacitance

Note: For conditions shown as Min or Max, use the appropriate values under recommended operating

conditions.

5

HD74LV540A

Switching Characteristics

•

V_CC= 2.5 ± 0.2 V

Ta = 25°C

Ta = –40 to 85°C

FROM

(Input)

TO

Item

Symbol Min Typ

Max

Min

Max

Unit

Test Conditions

(Output)

Propa-

gation

delay

time

t_PLH

t_PHL

—

7.4

12.0

1.0

14.5

ns

C_L= 15 pF

A

Y

—

9.3

8.2

16.8

17.4

1.0

18.5

21.0

C_L= 50 pF

C_L= 15 pF

Enable

time

t_ZH

t_ZL

ns

OE

Y

—

9.6

7.5

22.2

16.0

1.0

25.5

19.0

C_L= 50 pF

C_L= 15 pF

Disable

time

t_HZ

t_LZ

—

10.5

22.3

1.0

25.5

C_L= 50 pF

•

V_CC= 3.3 ± 0.3 V

Ta = 25°C

Ta = –40 to 85°C

FROM

(Input)

TO

Item

Symbol Min Typ

Max

Min

Max

Unit

Test Conditions

(Output)

Propa-

gation

delay

time

t_PLH

t_PHL

—

5.3

7.0

1.0

8.5

ns

C_L= 15 pF

A

Y

—

6.8

6.2

10.5

1.0

12.0

12.5

C_L= 50 pF

C_L= 15 pF

Enable

time

t_ZH

t_ZL

ns

OE

Y

—

7.6

5.3

14.0

10.5

1.0

16.0

12.5

C_L= 50 pF

C_L= 15 pF

Disable

time

t_HZ

t_LZ

—

7.0

15.4

1.0

17.5

C_L= 50 pF

6

HD74LV540A

Switching Characteristics (cont)

•

V_CC= 5.0 ± 0.5 V

Ta = 25°C

Ta = –40 to 85°C

FROM

(Input)

TO

Item

Symbol Min Typ

Max

Min

Max

Unit

Test Conditions

(Output)

Propa-

gation

delay

time

t_PLH

t_PHL

—

3.8

5.0

1.0

6.0

ns

C_L= 15 pF

A

Y

—

5.0

4.6

7.0

7.2

1.0

8.0

8.5

C_L= 50 pF

C_L= 15 pF

Enable

time

t_ZH

t_ZL

ns

OE

Y

—

5.8

3.6

9.2

6.8

1.0

10.5

8.0

C_L= 50 pF

C_L= 15 pF

Disable

time

t_HZ

t_LZ

—

5.3

8.8

1.0

10.0

C_L= 50 pF

7

HD74LV540A

Output-skew Characteristics

Ta = 25°C

Ta = –40 to 85°C

Item

Symbol V_CC= (V)

Min

—

Max

2.0

1.5

1.0

Min

—

Max

2.0

1.5

1.0

Unit

Output skew

t_{sk (O)}

2.3 to 2.7

3.0 to 3.6

4.5 to 5.5

ns

—

Note: Skew between any outputs of the same package switching in the same direction. This parameter is

warranted but not production tested.

Operating Characteristics

•

C_L= 50 pF

Ta = 25°C

Min

Item

Symbol V_CC= (V)

Typ

Max

Unit

Test Conditions

Power

C_PD

3.3

—

23.0

—

pF

f = 10 MHz

dissipation

capacitance

5.0

—

27.5

—

Noise Characteristics

•

C_L= 50 pF

Ta = 25°C

Min

Item

Symbol V_CC= (V)

Typ

Max

Unit

Test Conditions

Quiet output, V_{OL (P)}

maximum

dynamic V_OL

3.3

—

0.4

0.8

V

Quiet output, V_{OL (V)}

minimum

dynamic V_OL

—

–0.3

2.9

—

–0.8

—

Quiet output, V_{OH (V)}

minimum

dynamic V_OH

—

High-level

dynamic

V_{IH (D)}

2.31

—

V

input voltage

Low-level

dynamic

V_{IL (D)}

—

0.99

input voltage

8

HD74LV540A

Test Circuit

Output

1 kΩ

OPEN

GND

V_CC

S2

C_L

TEST

t_PLH/t_PHL

t_ZH/t_HZ

t_ZL/t_LZ

S2

OPEN

GND

V_CC

Note: C_Lincludes the probe and jig capacitance.

9

HD74LV540A

• Waveform

t_r

t_f

V_CC

90%

50%V_CC

Input A

10%

t_PLH

10%

GND

t_PHL

V_OH

50%V_CC

Output Y

V_OL

t_f

t_r

V_CC

90%

50%V_CC

10%

90%

50%V_CC

10%

Input OE

GND

V_CC

t_ZL

t_LZ

Waveform – A

Waveform – B

50%V_CC

t_ZH

V_OL+ 0.3 V

V_OH– 0.3 V

V_OL

V_OH

t_HZ

50%V_CC

GND

Notes:

1. t_r≤ 3 ns, t_f≤ 3 ns

2. Input waveform: PRR ≤ 1 MHZ, duty cycle 50%

3. Waveform-A is for an output with internal conditions such that the output is low except

when disabled by the output control.

4. Waveform-B is for an output with internal conditions such that the output is high except

when disabled by the output control.

10

HD74LV540A

Package Dimensions

12.6

13 Max

11

10

20

1

+ 0.20

7.80

– 0.30

0.80 Max

1.15

0° – 8°

1.27

0.70 ± 0.20

0.42 ± 0.08

0.40 ± 0.06

0.15

0.12 M

Hitachi Code

JEDEC

FP-20DA

—

EIAJ

Conforms

Dimension including the plating thickness

Base material dimension

Weight (reference value) 0.31 g

11

HD74LV540A

Unit: mm

12.8

13.2 Max

11

10

20

1

+ 0.25

– 0.40

10.40

0.935 Max

1.45

0° – 8°

+ 0.57

– 0.30

1.27

0.70

*0.42 ± 0.08

0.40 ± 0.06

0.15

M

0.12

Hitachi Code

JEDEC

EIAJ

FP-20DB

Conforms

—

*Dimension including the plating thickness

Base material dimension

Weight (reference value) 0.52 g

12

HD74LV540A

6.50

6.80 Max

20

1

11

10

0.65

1.0

+0.08

–0.07

0.22

0.13

M

0.20 ± 0.06

6.40 ± 0.20

0.65 Max

0° – 8°

0.50 ± 0.10

0.10

Hitachi Code

TTP-20DA

JEDEC

EIAJ

—

Dimension including the plating thickness

Base material dimension

Weight (reference value) 0.07 g

13

Cautions

1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,

copyright, trademark, or other intellectual property rights for information contained in this document.

Hitachi bears no responsibility for problems that may arise with third party’s rights, including

intellectual property rights, in connection with use of the information contained in this document.

2. Products and product specifications may be subject to change without notice. Confirm that you have

received the latest product standards or specifications before final design, purchase or use.

3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,

contact Hitachi’s sales office before using the product in an application that demands especially high

quality and reliability or where its failure or malfunction may directly threaten human life or cause risk

of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,

traffic, safety equipment or medical equipment for life support.

4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly

for maximum rating, operating supply voltage range, heat radiation characteristics, installation

conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used

beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable

failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-

safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other

consequential damage due to operation of the Hitachi product.

5. This product is not designed to be radiation resistant.

6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without

written approval from Hitachi.

7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor

products.

Hitachi, Ltd.

Semiconductor & Integrated Circuits.

Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan

Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109

URL

NorthAmerica

Europe

: http:semiconductor.hitachi.com/

: http://www.hitachi-eu.com/hel/ecg

Asia (Singapore)

Asia (Taiwan)

: http://www.has.hitachi.com.sg/grp3/sicd/index.htm

: http://www.hitachi.com.tw/E/Product/SICD_Frame.htm

Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm

Japan

: http://www.hitachi.co.jp/Sicd/indx.htm

For further information write to:

Hitachi Semiconductor

(America) Inc.

Hitachi Europe GmbH

Hitachi Asia (Hong Kong) Ltd.

Group III (Electronic Components)

7/F., North Tower, World Finance Centre,

Harbour City, Canton Road, Tsim Sha Tsui,

Kowloon, Hong Kong

Tel: <852> (2) 735 9218

Fax: <852> (2) 730 0281

Hitachi Asia Pte. Ltd.

16 Collyer Quay #20-00

Hitachi Tower

Singapore 049318

Tel: 535-2100

Electronic components Group

Dornacher Stra§e 3

D-85622 Feldkirchen, Munich

Germany

Tel: <49> (89) 9 9180-0

Fax: <49> (89) 9 29 30 00

179 East Tasman Drive,

San Jose,CA 95134

Tel: <1> (408) 433-1990

Fax: <1>(408) 433-0223

Fax: 535-1533

Hitachi Asia Ltd.

Taipei Branch Office

3F, Hung Kuo Building. No.167,

Tun-Hwa North Road, Taipei (105)

Tel: <886> (2) 2718-3666

Fax: <886> (2) 2718-8180

Telex: 40815 HITEC HX

Hitachi Europe Ltd.

Electronic Components Group.

Whitebrook Park

Lower Cookham Road

Maidenhead

Berkshire SL6 8YA, United Kingdom

Tel: <44> (1628) 585000

Fax: <44> (1628) 778322


型号：	HD74LV540AT
厂家：	ETC
描述：	BUFFER/DRIVER\|SINGLE\|8-BIT\|LV-CMOS\|TSSOP\|20PIN\|PLASTIC 驱动
文件：	总14页 (文件大小：66K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HD74LV540AT [ETC]

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