HFBR-0560 [ETC]

Evaluation Kit for MT-RJ 125 Mb/s Fast Ethernet Multimode and Singlemode Applications ; 评估板MT- RJ 125 Mb / s的快速以太网多模和单模应用\n


型号：	HFBR-0560
厂家：	ETC
描述：	Evaluation Kit for MT-RJ 125 Mb/s Fast Ethernet Multimode and Singlemode Applications 评估板MT- RJ 125 Mb / s的快速以太网多模和单模应用\n 以太网
文件：	总16页 (文件大小：289K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Agilent HFBR-5903/5903E/5903A

FDDI, Fast Ethernet Transceivers

in 2 x 5 Package Style

Data Sheet

Features

•

Multisourced 2 x 5 package style

with MT-RJ receptacle

•

Single +3.3 V power supply

Wave solder and aqueous wash

process compatible

Description

•

Manufactured in an ISO 9002

certified facility

Full compliance with the optical

performance requirements of the

FDDI PMD standard

The HFBR-5900 family of trans-

ceivers from Agilent provide the

system designer with products

to implement a range of FDDI

and ATM (Asynchronous

Transfer Mode) designs at the

100 Mb/s-

and 2 x 11 transceiver and 16

pin transmitter/receiver package

styles for those designs that

require these alternate

configurations.

•

Full compliance with the FDDI

LCF-PMD standard

The HFBR-5903 is also useful for

both ATM 100 Mb/s interfaces

and Fast Ethernet 100 Base-FX

125 MBd rate.

Full compliance with the optical

performance requirements of the

ATM 100 Mb/s physical layer

Full compliance with the optical

performance requirements of

100 Base-FX version of

The transceivers are all supplied interfaces. The ATM Forum

in the new industry standard

2 x 5 DIP style with a MT-RJ

fiber connector interface.

User-Network Interface (UNI)

Standard, Version 3.0, defines

the Physical Layer for 100 Mb/s

Multimode Fiber Interface for

ATM in Section 2.3 to be the

FDDI PMD Standard. Likewise,

the Fast Ethernet Alliance

defines the Physical Layer for

100 Base-FX for Fast Ethernet to

be the FDDI PMD Standard.

•

IEEE 802.3u

FDDI PMD, ATM and Fast Ethernet

2 km Backbone Links

The HFBR-5903 is a 1300 nm

product with optical

performance compliant with the

FDDI PMD standard. The FDDI

PMD standard is ISO/IEC

9314-3: 1990 and ANSI X3.166 -

1990.

Applications

•

Multimode fiber backbone links

Multimode fiber wiring closet to

desktop links

Ordering Information

ATM applications for physical

layers other than 100 Mb/s

The HFBR-5903 1300 nm

product is available for

production orders through the

Agilent Component Field Sales

Offices and Authorized

Multimode Fiber Interface are

supported by Agilent. Products

are available for both the single-

mode and the multimode fiber

SONET OC-3c (STS-3c), SDH

(STM-1) ATM interfaces and the

155 Mb/s-194 MBd multimode

fiber ATM interface as specified

in the ATM Forum UNI.

These transceivers for 2 km

multimode fiber backbones are

supplied in the small 2 x 5 MT-

RJ package style for those

designers who want to avoid the

larger MIC/R (Media Interface

Connector/Receptacle) defined

in the FDDI PMD standard.

Distributors world wide.

HFBR-5903

0°C to +70°C

No Shield

HFBR-5903E = 0°C to +70°C

Extended

Shield

Agilent also provides several

other FDDI products compliant

with the PMD and SM-PMD

standards. These products are

Contact your Agilent sales

representative for information

on these alternative FDDI and

ATM products.

HFBR-5903A = -40°C to +85°C

No Shield.

available with MIC/R, ST , SC

and FC connector styles. They

are available in the 1 x 9, 1 x 13

Transmitter Sections

the light input power decreases

to a typical -38 dBm or less, the

Signal Detect Deasserts, i.e. the

Signal Detect output goes to a

PECL low state. This forces the

receiver outputs, Data Out and

Data Out Bar to go to steady

PECL levels High and Low

respectively.

The electrical subassembly con-

sists of a high volume multilayer

printed circuit board on which

the IC and various surface-

mounted passive circuit

The transmitter section of the

HFBR-5903 utilizes a 1300 nm

Surface Emitting InGaAsP LED.

This LED is packaged in the

optical subassembly portion of

the transmitter section. It is

driven by a custom silicon IC

which converts differential

PECL logic signals, ECL

elements are attached.

The receiver section includes an

internal shield for the electrical

and optical subassemblies to

ensure high immunity to

Package

referenced (shifted) to a +3.3 V

supply, into an analog LED drive

current.

The overall package concept for

the Agilent transceiver consists

of the following basic elements;

two optical subassemblies, an

electrical subassembly and the

housing as illustrated in

Figure 1.

external EMI fields.

The outer housing is electrically

conductive. The MT-RJ port is

molded of filled nonconductive

plastic to provide mechanical

strength and electrical isolation.

The solder posts of the Agilent

design are isolated from the

internal circuit of the

Receiver Sections

The receiver section of the

HFBR-5903 utilizes an InGaAs

PIN photodiode coupled to a

custom silicon transimpedance

preamplifier IC. It is packaged

in the optical subassembly

portion of the receiver.

The package outline drawing

and pin out are shown in

Figures 2 and 3. The details of

this package outline and pin out

are compliant with the multi-

source definition of the 2 x 5

DIP. The low profile of the

Agilent transceiver design

complies with the maximum

height allowed for the MT-RJ

connector over the entire length

transceiver.

The transceiver is attached to a

printed circuit board with the

ten signal pins and the two

solder posts which exit the

bottom of the housing. The two

solder posts provide the primary

mechanical strength to

This PIN/preamplifier combi-

nation is coupled to a custom

quantizer IC which provides the

final pulse shaping for the logic

output and the Signal Detect

function. The Data output is dif-

ferential. The Signal Detect

output is single-ended. Both Data of the package.

and Signal Detect outputs are

PECL compatible, ECL

referenced (shifted) to a +3.3 V

power supply. The receiver

outputs, Data Out and Data Out

Bar, are squelched at Signal

Detect Deassert. That is, when

withstand the loads imposed on

the transceiver by mating with

The optical subassemblies utilize the MT-RJ connectored fiber

a high-volume assembly process

together with low-cost lens

elements which result in a cost-

effective building block.

cables.

RX SUPPLY

DATA OUT

QUANTIZER IC

PIN PHOTODIODE

PRE-AMPLIFIER

SUBASSEMBLY

SIGNAL

DETECT

GROUND

MT-RJ

RECEPTACLE

GROUND

LED OPTICAL

SUBASSEMBLY

DATA IN

LED DRIVER IC

TX SUPPLY

Figure 1. Block Diagram.

13.97

(0.55)

MIN.

4.5 0.2

5.15

(0.20)

(PCB to OVERALL

RECEPTACLE CENTER

LINE)

(0.177 0.008)

(PCB to OPTICS

CENTER LINE)

FRONT VIEW

Case Temperature

Measurement Point

9.6

(0.378)

MAX.

13.59

(0.535)

MAX.

TOP VIEW

Pin 1

10.16

(0.4)

1.778

(0.07)

-0.2

(+000)

(-008)

7.59

(0.299)

8.6

Ø 0.61

Ø1.5

(0.059)

(0.024)

(0.339)

7.112

17.778

(0.28)

(0.472)

(0.7)

49.56 (1.951) REF.

37.56 (1.479) MAX.

9.3

9.8

(0.366)

MAX.

(0.386)

MAX.

SIDE VIEW

3.3

(0.13)

1.07

(0.042)

DIMENSIONS IN MILLIMETERS (INCHES)

NOTES:

1. THIS PAGE DESCRIBES THE MAXIMUM PACKAGE OUTLINE, MOUNTING STUDS, PINS AND THEIR RELATIONSHIPS TO EACH OTHER.

2. TOLERANCED TO ACCOMMODATE ROUND OR RECTANGULAR LEADS.

3. ALL 12 PINS AND POSTS ARE TO BE TREATED AS A SINGLE PATTERN.

4. THE MT-RJ HAS A 750 µm FIBER SPACING.

5. THE MT-RJ ALIGNMENT PINS ARE IN THE MODULE.

6. FOR SM MODULES, THE FERRULE WILL BE PC POLISHED (NOT ANGLED).

7. SEE MT-RJ TRANSCEIVER PIN OUT DIAGRAM FOR DETAILS.

Figure 2. Package Outline Drawing

Mounting

Studs/Solder

Posts

Top

View

RECEIVER SIGNAL GROUND

RECEIVER POWER SUPPLY

SIGNAL DETECT

o 1

o 2

TRANSMITTER DATA IN BAR

TRANSMITTER DATA IN

TRANSMITTER DISABLE (LASER BASED PRODUCTS ONLY)

TRANSMITTER SIGNAL GROUND

TRANSMITTER POWER SUPPLY

RECEIVER DATA OUT BAR

RECEIVER DATA OUT

Figure 3. Pin Out Diagram.

Pin Descriptions:

Pin 1 Receiver Signal Ground V RX:

Directly connect this pin to the

receiver ground plane.

Pin 9 Transmitter Data In TD+:

No internal terminations are

provided. See recommended

circuit schematic.

Pin 5 Receiver Data Out RD+:

No internal terminations are

provided. See recommended

circuit schematic.

Pin 2 Receiver Power Supply V

RX:

Pin 10 Transmitter Data In Bar TD-:

No internal terminations are

provided. See recommended

circuit schematic.

Pin 6 Transmitter Power Supply

Provide +3.3 V dc via the

TX:

recommended receiver power

supply filter circuit. Locate the

power supply filter circuit as

Provide +3.3 V dc via the

recommended transmitter

power supply filter circuit.

Locate the power supply filter

circuit as close as possible to the

Mounting Studs/Solder Posts

The mounting studs are

provided for transceiver

mechanical attachment to the

circuit board. It is

recommended that the holes in

the circuit board be connected to

chassis ground.

close as possible to the V RX

pin.

TX pin.

Pin 3 Signal Detect SD:

Normal optical input levels to

the receiver result in a logic “1”

output.

Pin 7 Transmitter Signal Ground

TX:

Directly connect this pin to the

transmitter ground plane.

Low optical input levels to the

receiver result in a fault

condition indicated by a logic

“0” output.

Pin 8 Transmitter Disable T

DIS

No internal connection. Optional

feature for laser based products

only. For laser based products

connect this pin to +3.3 V TTL

logic high “1” to disable module.

To enable module connect to

TTL logic low “0”.

This Signal Detect output can be

used to drive a PECL input on

an upstream circuit, such as

Signal Detect input or Loss of

Signal-bar.

Pin 4 Receiver Data Out Bar RD-:

No internal terminations are

provided. See recommended

circuit schematic.

Application Information

The area under the curves

When used in FDDI and ATM

The Applications Engineering

group is available to assist you

with the technical under-

standing and design trade-offs

associated with these trans-

ceivers. You can contact them

through your Agilent sales

representative.

represents the remaining OPB at 100 Mb/s applications the

any link length, which is

available for overcoming non-

fiber cable related losses.

performance of the 1300 nm

transceivers is guaranteed over

the signaling rate of 10 MBd to

125 MBd to the full conditions

listed in individual product

specification tables.

Agilent LED technology has

produced 1300 nm LED devices

with lower aging characteristics

than normally associated with

these technologies in the

industry. The industry conven-

tion is 1.5 dB aging for 1300 nm

LEDs. The Agilent 1300 nm

LEDs will experience less than

1 dB of aging over normal com-

mercial equipment mission life

periods. Contact your Agilent

sales representative for

The transceivers may be used

for other applications at signal-

ing rates outside of the 10 MBd

to 125 MBd range with some

penalty in the link optical power

budget primarily caused by a

reduction of receiver sensitivity.

Figure 5 gives an indication of

the typical performance of these

1300 nm products at different

rates.

The following information is

provided to answer some of the

most common questions about

the use of these parts.

Transceiver Optical Power Budget

versus Link Length

Optical Power Budget (OPB) is

the available optical power for a

fiber optic link to accommodate

fiber cable losses plus losses due

to in-line connectors, splices,

optical switches, and to provide

margin for link aging and

additional details.

Figure 4 was generated with a

Agilent fiber optic link model

containing the current industry

conventions for fiber cable

specifications and the FDDI

PMD and LCF-PMD optical

parameters. These parameters

are reflected in the guaranteed

performance of the transceiver

specifications in this data sheet.

This same model has been used

extensively in the ANSI and

IEEE committees, including the

ANSI X3T9.5 committee, to

establish the optical

2.5

unplanned losses due to cable

plant reconfiguration or repair.

1.5

Figure 4 illustrates the predicted

OPB associated with the

0.5

transceiver specified in this data

sheet at the Beginning of Life

(BOL). These curves represent

the attenuation and chromatic

plus modal dispersion losses

associated with the 62.5/125 µm

and 50/125 µm fiber cables only.

-0.5

-1

100 125 150 175 200

SIGNAL RATE (MBd)

CONDITIONS:

1. PRBS 2 -1

2. DATA SAMPLED AT CENTER OF DATA SYMBOL.

3. BER = 10

-6

performance requirements for

various fiber optic interface

standards. The cable parameters

used come from the ISO/IEC

JTC1/SC 25/WG3 Generic

Cabling for Customer Premises

per DIS 11801 document and the

EIA/TIA-568-A Commercial

Building Telecommunications

Cabling Standard per SP-2840.

4. T

= +25 ˚C

5. V = 3.3 V dc

6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.

HFBR-5903, 62.5/125 µm

Figure 5. Transceiver Relative Optical Power

Budget at Constant BER vs. Signaling Rate.

HFBR-5903

50/125 µm

These transceivers can also be

used for applications which

require different Bit Error Rate

(BER) performance. Figure 6

illustrates the typical trade-off

between link BER and the

receivers input optical power

level.

Transceiver Signaling Operating

Rate Range and BER Performance

For purposes of definition, the

symbol (Baud) rate, also called

signaling rate, is the reciprocal

of the shortest symbol time. Data

rate (bits/sec) is the symbol rate

divided by the encoding factor

used to encode the data

0.3 0.5

1.0

1.5

2.0

2.5

FIBER OPTIC CABLE LENGTH (km)

Figure 4. Typical Optical Power Budget at BOL

versus Fiber Optic Cable Length.

(symbols/bit).

1 x 10 -2

1 x 10 -3

Transceiver Jitter Performance

The Agilent 1300 nm

The jitter specifications stated in

the following 1300 nm

transceiver specification tables

are derived from the values in

Table E1 of Annex E. They

represent the worst case jitter

contribution that the trans-

ceivers are allowed to make to

the overall system jitter without

violating the Annex E allocation

example. In practice the typical

contribution of the Agilent trans-

ceivers is well below these

transceivers are designed to

operate per the system jitter

allocations stated in Table E1 of

Annex E of the FDDI PMD and

LCF-PMD standards.

1 x 10 -4

1 x 10 -5

HFBR-5903 SERIES

1 x 10 -6

1 x 10 -7

1 x 10 -8

1 x 10 -9

1 x 10 -10

1 x 10 -11

1 x 10 -12

CENTER OF SYMBOL

The Agilent 1300 nm

transmitters will tolerate the

worst case input electrical jitter

allowed in these tables without

violating the worst case output

jitter requirements of Sections

8.1 Active Output Interface of

the FDDI PMD and LCF-PMD

standards.

-6

-4

-2

RELATIVE INPUT OPTICAL POWER - dB

CONDITIONS:

1. 125 MBd

2. PRBS 2 ⁷-1

3. CENTER OF SYMBOL SAMPLING

4. T_A= +25 ˚C

maximum allowed amounts.

5. V_CC= 3.3 V dc

6. INPUT OPTICAL RISE/FALL TIMES = 1.0/ 2.1 ns.

Recommended Handling Precautions

Agilent recommends that normal

static precautions be taken in

the handling and assembly of

these transceivers to prevent

damage which may be induced

by electrostatic discharge (ESD).

The HFBR-5900 series of

Figure 6. Bit Error Rate vs. Relative Receiver

Input Optical Power.

The Agilent 1300 nm receivers

will tolerate the worst case input

optical jitter allowed in Sections

8.2 Active Input Interface of the

FDDI PMD and LCF-PMD

standards without violating the

worst case output electrical

jitter allowed in Table E1 of

Annex E.

transceivers meet MIL-STD-883C

Method 3015.4 Class 2 products.

Figure 7. Recommended Decoupling and Termination Circuits

Care should be used to avoid

shorting the receiver data or

signal detect outputs directly to

ground without proper current

limiting impedance.

Shipping Container

provide a low inductance

ground for signal return current.

This recommendation is in

keeping with good high

The transceiver is packaged in a

shipping container designed to

protect it from mechanical and

ESD damage during shipment or frequency board layout

storage.

practices. Figures 7 and 8 show

two recommended termination

schemes.

Solder and Wash Process

Compatibility

The transceivers are delivered

with protective process plugs

inserted into the MT-RJ

connector receptacle. This

Board Layout - Decoupling Circuit,

Ground Planes and Termination

Circuits

It is important to take care in

the layout of your circuit board

Board Layout - Hole Pattern

The Agilent transceiver complies

with the circuit board “Common

Transceiver Footprint” hole

pattern defined in the original

multisource announcement

which defined the 2 x 5 package

style. This drawing is repro-

process plug protects the optical to achieve optimum perform-

subassemblies during wave

solder and aqueous wash

processing and acts as a dust

cover during shipping.

ance from these transceivers.

Figure 7 provides a good

example of a schematic for a

power supply decoupling circuit

that works well with these parts. duced in Figure 9 with the

It is further recommended that a addition of ANSI Y14.5M

These transceivers are compat-

ible with either industry

standard wave or hand solder

processes.

continuous ground plane be

provided in the circuit board

compliant dimensioning to be

used as a guide in the mechani-

directly under the transceiver to cal layout of your circuit board.

Figure 8. Alternative Termination Circuits

Board Layout - Art Work

Electrostatic Discharge (ESD)

There are two design cases in

which immunity to ESD damage

is important.

The second case to consider is

static discharges to the exterior

of the equipment chassis con-

taining the transceiver parts. To

the extent that the MT-RJ

connector is exposed to the

outside of the equipment chassis

it may be subject to whatever

ESD system level test criteria

that the equipment is intended

to meet.

The Applications Engineering

group has developed Gerber file

artwork for a multilayer printed

circuit board layout incorporat-

ing the recommendations above.

Contact your local Agilent sales

representative for details.

The first case is during handling

of the transceiver prior to

mounting it on the circuit board.

It is important to use normal

ESD handling precautions for

ESD sensitive devices. These

precautions include using

grounded wrist straps, work

benches, and floor mats in ESD

controlled areas.

Regulatory Compliance

These transceiver products are

intended to enable commercial

system designers to develop

equipment that complies with

the various international

regulations governing certifica-

tion of Information Technology

Equipment. See the Regulatory

Compliance Table for details.

Additional information is

available from your Agilent sales

representative.

7.11

3.56

(0.14)

Ø 1.4 0.1

KEEP OUT AREA

Ø 1.4 0.1

Holes For

Housing

Leads

)

(0.28

(0.055 0.004)

FOR PORT PLUG

Ø 1.4 0.1

(0.276)

(0.055 0.004)

10.16

10.8

(0.425)

13.97

(0.55)

MIN.

(0.4)

3.08

7.59

13.34

)

9.59

(0.121

(0.299)

(0.525)

(0.378)

)

(0.079

1.778

2.29

(0.07)

(0.09)

4.57

(0.118)

(0.18)

Ø 0.81 0.1

(0.032 0.004)

17.78

(0.236)

(1.063)

3.08

(0.121)

7.112

(0.28)

(0.7)

DIMENSIONS IN MILLIMETERS (INCHES)

NOTES:

1. THIS FIGURE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT FOR THE MT-RJ

TRANSCEIVER PLACED AT .550 SPACING.

2. THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO

METAL TRACES OR GROUND CONNECTION IN KEEP-OUT AREAS.

3. 10 PIN MODULE REQUIRES ONLY 16 PCB HOLES, INCLUDING 4 PACKAGE GROUNDING TAB

HOLES CONNECTED TO SIGNAL GROUND.

4. THE SOLDER POSTS SHOULD BE SOLDERED TO CHASSIS GROUND FOR MECHANICAL

INTEGRITY AND TO ENSURE FOOTPRINT COMPATIBILITY WITH OTHER SFF TRANSCEIVERS.

Figure 9. Recommended Board Layout Hole Pattern

Regulatory Compliance Table

Feature

Test Method

Performance

Electrostatic Discharge

(ESD) to the Electrical Pins

Electrostatic Discharge

MIL-STD-883C

Method 3015.4

Variation of

Meets Class 2 (2000 to 3999 Volts).

Withstand up to 2200 V applied between electrical pins.

Typically withstand at least 25 kV without damage when the MT-RJ

ESD) to the MT-RJ Receptacle

Electromagnetic

IEC 801-2

FCC Class B

Connector Receptacle is contacted by a Human Body Model probe.

Transceivers typically provide a 10 dB margin to the noted standard limits

Interference (EMI)

CENELEC CEN55022

when tested at a certified test range with the transceiver mounted to a

VCCI Class 2

circuit card without a chassis enclosure.

Immunity

Variation of IEC 801-3

Typically show no measurable effect from a 10 V/m field swept from 10 to

450 MHz applied to the transceiver when mounted to a circuit card without a

chassis enclosure.

Eye Safety

IEC 825 Issue 1 1993:11

Class 1

Compliant per Agilent testing under single fault conditions.

TUV Certification: LED Class 1

CENELEC EN60825 Class 1

Electromagnetic Interference (EMI)

Immunity

For additional information

Most equipment designs utilizing Equipment utilizing these

regarding EMI, susceptibility,

this high speed transceiver from

Agilent will be required to meet

the requirements of FCC in the

United States, CENELEC

EN55022 (CISPR 22) in Europe

and VCCI in Japan.

transceivers will be subject to

radio-frequency electromagnetic procedures and results on the 1 x

fields in some environments.

These transceivers have a high

immunity to such fields.

ESD and conducted noise testing

9 Transceiver family, please

refer to Applications Note 1075,

Testing and Measuring Electro-

magnetic Compatibility

Performance of the HFBR-510X/

-520X Fiber Optic Transceivers.

Transceiver Reliability and

Performance Qualification Data

The 2 x 5 transceivers have

passed Agilent reliability and

performance qualification

testing and are undergoing

ongoing quality and reliability

monitoring. Details are available

from your Agilent sales

3.8

(0.15 )

10.8 0.1

(0.425 0.004)

(0.039

)

9.8 0.1

(0.386 0.004)

representative.

These transceivers are

manufactured at the Agilent

Singapore location which is an

ISO 9002 certified facility.

0.25 0.1

(0.01 0.004)

(TOP OF PCB TO

14.79

(0.589

13.97

(0.55)

MIN.

Applications Support Materials

Contact your local Agilent

Component Field Sales Office for

information on how to obtain

PCB layouts and evaluation

boards for the 2 x 5 transceivers.

)

BOTTOM OF

OPENING)

DIMENSIONS IN MILLIMETERS (INCHES)

Figure 10. Recommended Panel Mounting

200

180

160

140

120

100

4.40

1.975

3.0

3.5

1.25

4.850

1.5

1.525

0.525

10.0

5.6

2.0

2.5

0.075

1.025

1.00

0.975

0.90

100% TIME

INTERVAL

3.0

3.5

t r/f - TRANSMITTER

OUTPUT OPTICAL

RISE/FALL TIMES - ns

1200

1300

1320

1340

1360

1380

40 0.7

- TRANSMITTER OUTPUT OPTICAL

CENTER WAVELENGTH - nm

0.50

0.725

HFBR-5903 FDDI TRANSMITTER TEST RESULTS

OF λC, ∆λ AND tr/f ARE CORRELATED AND

COMPLY WITH THE ALLOWED SPECTRAL WIDTH

AS A FUNCTION OF CENTER WAVELENGTH FOR

VARIOUS RISE AND FALL TIMES.

0% TIME

INTERVAL

Figure 11. Transmitter Output Optical Spectral

Width (FWHM) vs. Transmitter Output Optical

Center Wavelength and Rise/Fall Times.

0.10

0.025

0.0

0.075

0.025

0.05

1.525

5.6

1.975

4.40

0.525

10.0

4.850

80 500 ppm

TIME - ns

THE HFBR-5903 OUTPUT OPTICAL PULSE SHAPE SHALL FIT WITHIN THE BOUNDARIES OF THE

PULSE ENVELOPE FOR RISE AND FALL TIME MEASUREMENTS.

2.5 x 10^-10BER

Figure 12. Output Optical Pulse Envelope.

1.0 x 10^-12BER

-31.0 dBm

-4

-3

-2

-1

MIN (P _O+ 4.0 dB OR -31.0

dBm)

P_A(P_O+ 1.5 dB <P _A<-31.0

EYE SAMPLING TIME POSITION (ns)

P = MAX (P_SOR -45.0 dBm)

)

(P = INPUT POWER FOR BER

CONDITIONS:

INPUT OPTICAL POWER

1.5 dB STEP INCREASE)

4.0 dB STEP DECREASE)

(

1.T_A= +25 ˚C

2. V_CC= 3.3 V dc

3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.

-45.0 dBm

4. INPUT OPTICAL POWER IS NORMALIZED

CENTER OF DATA SYMBOL.

5. NOTE 19 AND 20 APPLY.

ANS MAX

AS_

MAX

SIGNAL_DETECT(ON)

SIGNAL_DETECT(OFF)

Figure 13. Relative Input Optical Power vs.

Eye Sampling Time Position.

TIME

AS _ MAX - MAXIMUM ACQUISITION TIME (SIGNAL).

AS _ MAX IS THE MAXIMUM SIGNAL _ DETECT ASSERTION TIME FOR THE STATION.

AS _ MAX SHALL NOT EXCEED 100.0 µs. THE DEFAULT VALUE OF AS _ MAX IS 100.0 µs.

ANS MAX - MAXIMUM ACQUISITION TIME (NO SIGNAL).

ANS _ MAX IS THE MAXIMUM SIGNAL _ DETECT DEASSERTION TIME FOR THE STATION.

ANS _ MAX SHALL NOT EXCEED 350 µs. THE DEFAULT VALUE OF AS _ MAX IS

350 µs.

Figure 14. Signal Detect Thresholds and Timing.

Absolute Maximum Ratings

Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter in

isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that limiting values

of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum ratings for extended

periods can adversely affect device reliability.

Parameter

Symbol

Minimum Typical

Maximum Unit

Reference

Storage Temperature

T_S

-40

+100

+260

°C

sec.

Lead Soldering Temperature

Lead Soldering Time

Supply Voltage

T_SOLD

t_SOLD

V_CC

V_I

-0.5

3.6

Data Input Voltage

V_CC

Differential Input Voltage (p-p)

Output Current

V_D

2.0

Note 1

I_O

Recommended Operating Conditions

Parameter

Symbol

Minimum Typical

Maximum Unit

Reference

Ambient Operating Temperature

HFBR-5903/5903E

T_A

+70

°C

Note A

Note B

HFBR-5903A

Supply Voltage

T_A

V_CC

-40

3.135

+85

3.465

°C

Data Input Voltage - Low

Data Input Voltage - High

Data and Signal Detect Output Load

Differential Input Voltage (p-p)

Notes:

V_IL- V_CC

V_IH- V_CC

R_L

-1.810

-1.165

-1.475

-0.880

Note 2

V_D

0.800

A. Ambient Operating Temperature corresponds to transceiver case temperature of 0°C mininum to +85 °C maximum with necessary airflow applied.

Recommended case temperature measurement point can be found in Figure 2.

B. Ambient Operating Temperature corresponds to transceiver case temperature of -40 °C mininum to +100 °C maximum with necessary airflow

applied. Recommended case temperature measurement point can be found in Figure 2.

Transmitter Electrical Characteristics

HFBR-5903/5903E (T = 0°C to +70°C, V = 3.135 V to 3.465 V)

HFBR-5903A (T = -40°C to +85°C, V = 3.135 V to 3.465 V)

Parameter

Symbol

Minimum Typical

Maximum Unit

Reference

Supply Current

I_CC

133

175

Note 3

Power Dissipation

P_DISS

I_IL

0.45

0.60

Note 5a

Data Input Current - Low

Data Input Current - High

-350

-2

µA

I_IH

350

Receiver Electrical Characteristics

HFBR-5903/5903E (T = 0°C to +70°C, V = 3.135 V to 3.465 V)

HFBR-5903A (T = -40°C to +85°C, V = 3.135 V to 3.465 V)

Parameter

Symbol

Minimum Typical

Maximum Unit

Reference

Supply Current

I_CC

120

Note 4

Power Dissipation

P_DISS

0.225

0.415

-1.620

-0.880

2.2

Note 5b

Note 6

Note 7

Note 6

Note 7

Data Output Voltage - Low

Data Output Voltage - High

Data Output Rise Time

V_OL- V_CC

-1.840

-1.045

0.35

V_OH- V_CC

t_r

Data Output Fall Time

t_f

0.35

2.2

Signal Detect Output Voltage - Low

Signal Detect Output Voltage - High

Signal Detect Output Rise Time

Signal Detect Output Fall Time

Power Supply Noise Rejection

V_OL- V_CC

-1.840

-1.045

0.35

-1.620

-0.880

2.2

V_OH- V_CC

t_r

t_f

0.35

2.2

PSNR

Transmitter Optical Characteristics

HFBR-5903/5903E (T = 0°C to +70°C, V = 3.135 V to 3.465 V)

HFBR-5903A (T = -40°C to +85°C, V = 3.135 V to 3.465 V)

Parameter

Symbol

Minimum Typical

Maximum Unit

Reference

Output Optical Power

BOL

P_O

-19

-15.7

-14

0.2

dBm avg

Note 11

62.5/125 µm, NA = 0.275 Fiber

Output Optical Power

EOL

BOL

-20

-22.5

P_O

-20.3

dBm avg

Note 11

Note 12

Note 13

50/125 µm, NA = 0.20 Fiber

Optical Extinction Ratio

EOL

-23.5

0.05

-33

-27

-45

dBm avg

Output Optical Power at

P_O("0")

l_C

Logic Low "0" State

Center Wavelength

1270

1308

147

1380

Note 14

Figure 11

Note 14

Spectral Width - FWHM

- RMS

Figure 11

Optical Rise Time

t_r

0.6

1.9

3.0

0.6

0.69

Note 14/15

Figure 11,12

Note 14/15

Optical Fall Time

t_f

1.6

0.02

Figure 11,12

Note 16

Duty Cycle Distortion Contributed

by the Transmitter

DCD

DDJ

ns p-p

Data Dependent Jitter Contributed

Note 17

Note 18

by the Transmitter

Random Jitter Contributed

by the Transmitter

Receiver Optical and Electrical Characteristics

HFBR-5903/5903E (T = 0°C to +70°C, V = 3.135 V to 3.465 V)

HFBR-5903A (T = -40°C to +85°C, V = 3.135 V to 3.465 V)

Parameter

Symbol

Minimum Typical

Maximum Unit

Reference

Input Optical Power

P_{IN Min}(W)

-33.5

-31

dBm avg

Note 19

Minimum at Window Edge

Input Optical Power

Figure 13

Note 20

P_{IN Min}(C)

-34.5

-31.8

dBm avg

Minimum at Eye Center

Input Optical Power Maximum

Figure 13

Note 19

P_{IN Max}

-14

-11.8

dBm avg

Operating Wavelength

1270

1380

0.4

Duty Cycle Distortion Contributed

DCD

0.02

0.35

1.0

ns p-p

Note 8

Note 9

by the Receiver

Data Dependent Jitter Contributed

DDJ

1.0

ns p-p

by the Receiver

Random Jitter Contributed by the Receiver

P_A

2.14

-33

ns p-p

Note 10

Signal Detect - Asserted

P_D+ 1.5 dB

-45

dBm avg

Note 21, 22

Figure 14

Note 23, 24

Signal Detect - Deasserted

P_D

dBm avg

Figure 14

Signal Detect - Hysteresis

Signal Detect Assert Time

P_A- P_D

1.5

2.4

µs

AS_Max

100

350

Note 21, 22

(off to on)

Signal Detect Deassert Time

Figure 14

Note 23, 24

ANS_Max

µs

(on to off)

Figure 14

Notes:

•

Over the specified operating voltage and

temperature ranges.

With HALT Line State, (12.5 MHz

square-wave), input signal.

At the end of one meter of noted optical

fiber with cladding modes removed.

19. This specification is intended to indicate

the performance of the receiver section of

the transceiver when Input Optical Power

signal characteristics are present per the

following definitions. The Input Optical

Power dynamic range from the minimum

level (with a window time-width) to the

maximum level is the range over which the

receiver is guaranteed to provide output

1. This is the maximum voltage that can be

applied across the Differential Transmitter

Data Inputs to prevent damage to the input

ESD protection circuit.

2. The outputs are terminated with 50 Ω

connected to V -2 V.

The average power value can be converted

to a peak power value by adding 3 dB.

Higher output optical power transmitters

are available on special request. Please

consult with your local Agilent sales

representative for further details.

3. The power supply current needed to

operate the transmitter is provided to

differential ECL circuitry. This circuitry

maintains a nearly constant current flow

from the power supply. Constant current

operation helps to prevent unwanted

electrical noise from being generated and

conducted or emitted to neighboring

circuitry.

data with a Bit Error Rate (BER) better than

-10

or equal to 2.5 x 10

• At the Beginning of Life (BOL)

• Over the specified operating temperature

and voltage ranges

12. The Extinction Ratio is a measure of the

modulation depth of the optical signal. The

data “0” output optical power is compared

to the data “1” peak output optical power

and expressed as a percentage. With the

transmitter driven by a HALT Line State

(12.5 MHz square-wave) signal, the

• Input symbol pattern is the FDDI test

pattern defined in FDDI PMD Annex A.5

with 4B/5B NRZI encoded data that

contains a duty cycle base-line wander

effect of 50 kHz. This sequence causes a

near worst case condition for inter-

symbol interference.

• Receiver data window time-width is 2.13

ns or greater and centered at mid-

symbol. This worst case window time-

width is the minimum allowed

eye-opening presented to the FDDI PHY

PM_Data indication input (PHY input)

per the example in FDDI PMD Annex E.

This minimum window time-width of

2.13 ns is based upon the worst case

FDDI PMD Active Input Interface optical

conditions for peak-to-peak DCD (1.0

ns), DDJ (1.2 ns) and RJ (0.76 ns)

4. This value is measured with the outputs

terminated into 50 Ω connected to

- 2 V and an Input Optical Power level

of -14 dBm average.

average optical power is measured. The

data “1” peak power is then calculated by

adding 3 dB to the measured average

optical power. The data “0” output optical

power is found by measuring the optical

power when the transmitter is driven by a

logic “0” input. The extinction ratio is the

ratio of the optical power at the “0” level

compared to the optical power at the “1”

level expressed as a percentage or in

decibels.

5a. The power dissipation of the transmitter is

calculated as the sum of the products of

supply voltage and current.

5b. The power dissipation of the receiver is

calculated as the sum of the products of

supply voltage and currents, minus the sum

of the products of the output voltages and

currents.

6. This value is measured with respect to V

with the output terminated into

50 Ω connected to V - 2 V.

7. The output rise and fall times are measured

13. The transmitter provides compliance with

the need for Transmit_Disable commands

from the FDDI SMT layer by providing an

Output Optical Power level of < -45 dBm

average in response to a logic “0” input.

This specification applies to either 62.5/

125 µm or 50/125 µm fiber cables.

14. This parameter complies with the FDDI

PMD requirements for the trade-offs

between center wavelength, spectral

width, and rise/fall times shown in

between 20% and 80% levels with the

output connected to V -2 V through 50

Ω.

presented to the receiver.

To test a receiver with the worst case FDDI

PMD Active Input jitter condition requires

exacting control over DCD, DDJ and RJ

jitter components that is difficult to

implement with production test equipment.

The receiver can be equivalently tested to

the worst case FDDI PMD input jitter

conditions and meet the minimum output

data window time-width of 2.13 ns. This is

accomplished by using a nearly ideal input

optical signal (no DCD, insignificant DDJ

and RJ) and measuring for a wider window

time-width of 4.6 ns. This is possible due to

the cumulative effect of jitter components

through their superposition (DCD and DDJ

are directly additive and RJ components

are rms additive). Specifically, when a

nearly ideal input optical test signal is used

and the maximum receiver peak-to-peak

jitter contributions of DCD (0.4 ns), DDJ (1.0

ns), and RJ (2.14 ns) exist, the minimum

window time-width becomes 8.0 ns -0.4 ns -

1.0 ns - 2.14 ns = 4.46 ns, or conservatively

4.6 ns. This wider window time-width of 4.6

ns guarantees the FDDI PMD Annex E

minimum window time-width of 2.13 ns

under worst case input jitter conditions to

the Agilent receiver.

8. Duty Cycle Distortion contributed by the

receiver is measured at the 50% threshold

using an IDLE Line State,

125 MBd (62.5 MHz square-wave), input

signal. The input optical power level is

-20 dBm average. See Application

Information - Transceiver Jitter Section for

furtherinformation.

Figure 11.

15. This parameter complies with the optical

pulse envelope from the FDDI PMD shown

in Figure 12. The optical rise and fall times

are measured from 10% to 90% when the

transmitter is driven by the FDDI HALT Line

State (12.5 MHz square-wave) input signal.

16. Duty Cycle Distortion contributed by the

transmitter is measured at a 50% threshold

using an IDLE Line State,

9. Data Dependent Jitter contributed by

the receiver is specified with the FDDI DDJ

test pattern described in the FDDI PMD

Annex A.5. The input optical power level is

-20 dBm average. See Application Informa-

tion - Transceiver Jitter Section for further

information.

10. Random Jitter contributed by the receiver

is specified with an IDLE Line State, 125

MBd (62.5 MHz square-wave), input signal.

The input optical power level is at maxi-

125 MBd (62.5 MHz square-wave), input

signal. See Application Information -

Transceiver Jitter Performance Section of

this data sheet for further details.

mum “P

(W)”. See Application

IN Min.

Information - Transceiver Jitter Section for

furtherinformation.

17. Data Dependent Jitter contributed by the

transmitter is specified with the FDDI test

pattern described in FDDI PMD Annex A.5.

See Application Information - Transceiver

Jitter Performance Section of this data

sheet for further details.

18. Random Jitter contributed by the

transmitter is specified with an IDLE Line

State, 125 MBd (62.5 MHz square-wave),

input signal. See Application Information -

Transceiver Jitter Performance Section of

this data sheet for further details.

11. These optical power values are measured

with the following conditions:

•

The Beginning of Life (BOL) to the End

of Life (EOL) optical power degradation

is typically 1.5 dB per the industry

convention for long wavelength LEDs.

The actual degradation observed in

Agilent’s

• Transmitter operating with an IDLE Line

State pattern, 125 MBd (62.5 MHz

square-wave), input signal to simulate

any cross-talk present between the

transmitter and receiver sections of the

transceiver.

1300 nm LED products is < 1 dB, as

specified in this data sheet.

20. All conditions of Note 19 apply except that

the measurement is made at the center of

the symbol with no window time-width.

21. This value is measured during the transition

from low to high levels of input optical

power. At Signal Detect Deassert, the

receiver outputs Data Out and Data Out Bar

go to steady PECL levels High and Low

respectively.

22. The Signal Detect output shall be asserted

within 100 µs after a step increase of the

Input Optical Power. The step will be from

a low Input Optical Power, -45 dBm, into

the range between greater than P , and -14

dBm. The BER of the receiver output will

-2

be 10 or better during the time, LS_Max

(15 µs) after Signal Detect has been

asserted. See

Figure 14 for more information.

23. This value is measured during the transition

from high to low levels of input optical

power. The maximum value will occur

when the input optical power is either -45

dBm average or when the input optical

-2

power yields a BER of 10 or larger,

whichever power is higher.

24. Signal detect output shall be de-asserted

within 350 µs after a step decrease in the

Input Optical Power from a level which is

the lower of; -31 dBm or P + 4 dB (P is

the power level at which signal detect was

deasserted), to a power level of

-45 dBm or less. This step decrease will

have occurred in less than 8 ns. The

-2

receiver output will have a BER of 10 or

better for a period of 12 µs or until signal

detect is deasserted. The input data stream

is the Quiet Line State. Also, signal detect

will be deasserted within a maximum of 350

µs after the BER of the receiver output

-2

degrades above 10 for an input optical

data stream that decays with a negative

ramp function instead of a step function.

See Figure 14 for more information. At

Signal Detect Deassert, the receiver

outputs Data Out and Data Out Bar go to

steady PECL levels High and Low

respectively.

www.agilent.com/

semiconductors

For product information and a complete list of

distributors, please go to our web site.

For technical assistance call:

Americas/Canada: +1 (800) 235-0312 or

(408)654-8675

Europe: +49 (0) 6441 92460

China: 10800 650 0017

Hong Kong: (+65) 6271 2451

India, Australia, New Zealand: (+65) 6271 2394

Japan: (+81 3) 3335-8152(Domestic/International), or

0120-61-1280(DomesticOnly)

Korea: (+65) 6271 2194

Malaysia, Singapore: (+65) 6271 2054

Taiwan: (+65) 6271 2654

Data subject to change.

Obsoletes: 5988-4673EN

October 31, 2002

5988-8033EN

HFBR-0560 [ETC]

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