HPL1117-25G [ETC]
1A Low Dropout Fast Response Positive Adjustable Regulator and Fixed 1.8V, 2.5V, 2.85V, 3.3V and 5V; 1A低压降快速响应正可调稳压器和固定1.8V , 2.5V , 2.85V , 3.3V和5V型号: | HPL1117-25G |
厂家: | ETC |
描述: | 1A Low Dropout Fast Response Positive Adjustable Regulator and Fixed 1.8V, 2.5V, 2.85V, 3.3V and 5V |
文件: | 总19页 (文件大小:202K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HPL1117
1A Low Dropout Fast Response Positive Adjustable Regulator and Fixed
1.8V, 2.5V, 2.85V, 3.3V and 5V
Features
General Description
The HPL1117 is a low dropout three-terminal adjust-
able regulators with 1A output current capability. In
order to obtain lower dropout voltage and faster tran-
sient response, which is critical for low voltage ap-
plications , the HPL1117 has been optimized. The
device is available in an adjustable version and fixed
output voltages of 1.8V, 2.5V, 2.85V, 3.3V and 5V.
The output available voltage range of an adjustable
version is from 1.25~10.7V with an input supply be-
low 12V. Dropout voltage is guaranteed at a maxi-
mum of 1.3V at 1A. Current limit is trimmed to ensure
specified output current and controlled short-circuit
current. On-chip thermal limiting provides protection
against any combination of overload that would cre-
ate excessive junction temperatures. The HPL1117
is available in the industry standard 3-pin TO-220, TO-
252, TO-263, and the low profile surface mount SOT-
223 power packages which can be used in applica-
tions where space is limited.
•
•
•
Guaranteed Output Voltage Accuracy within 2%
Fast Transient Response
Guaranteed Dropout Voltage at Multiple
Currents
•
•
•
•
•
•
•
Load Regulation : 0.1% Typ.
Line Regulation : 0.03% Typ.
Low Dropout Voltage : 1.1V Typ. at IOUT =1A
Current Limit : 1A Typ. at TJ=25°C
On-Chip Thermal Limiting : 150°C Typ.
Adjustable Output : 1.25~10.7V
Standard 3-pin TO-220, TO-252, TO-263 and
SOT-223 Power Packages
Applications
Pin Description
Front View for TO-220
•
•
•
Active SCSI Terminators
3
Low Voltage Logic Supplies
VIN
2
1
VOUT
Post Regulator for Switching Power Supply
ADJ/GND
Front View for TO-263
VIN
VOUT
3
2
TAB is VOUT
ADJ/GND
1
Front View for TO-252
VIN
3
TAB IS VOUT
2
1
VOUT
ADJ/GND
1
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Pin Description (Cont.)
Front View for SOT-223
3
2
1
IN
T A B IS V O U T
O U T
A D J /G N D
Ordering and Marking Information
Package Code
HPL1117-
F : TO-220 G : TO-263
Temp. Range
U : TO-252 V : SOT-223
°
Lead Free Code
C : 0 to 70 C
Handling Code
Handling Code
Temp. Range
Package Code
Voltage Code
TU : Tube
Voltage Code
18 : 1.8V
TR : Tape & Reel
25 : 2.5V 28 : 2.85V
33 : 3.3V
50 : 5V
Blank : Adjustable Version
Lead Free Code
L : Lead Free Device
Blank : Orginal Device
XXXXX - Date Code
HPL1117
- Date Code
- Date Code
XXXXX
XXXXX
HPL1117 F/G/U :
HPL1117 V :
XXXXX
HPL1117
XXXXX
18
HPL1117
XXXXX
HPL1117
HPL1117-18F/G/U :
HPL1117-18V :
XXXXX18
XXXXX - Date Code
25
HPL1117
XXXXX
HPL1117
HPL1117-25V :
XXXXX - Date Code
XXXXX - Date Code
XXXXX - Date Code
HPL1117-25F/G/U :
HPL1117-28F/G/U :
HPL1117 -33F/G/U :
XXXXX - Date Code
XXXXX - Date Code
XXXXX25
28
HPL1117
XXXXX
HPL1117
HPL1117-28V :
XXXXX28
33
HPL1117
XXXXX
HPL1117
HPL1117-33V :
XXXXX - Date Code
XXXXX - Date Code
XXXXX33
50
HPL1117
XXXXX
HPL1117
HPL1117-50V :
HPL1117 -50F/G/U :
XXXXX - Date Code
XXXXX50
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Absolute Maximum Ratings
Symbol
Parameter
Rating(Note)
Unit
VI
Input Voltage
HPL1117, HPL1117-50, HPL1117-33
HPL1117-25, HPL1117-18, HPL1117-28
15
9
V
TJ
Operating Junction Temperature Range
Control Section
°C
0 to 125
0 to 150
Power Transistor
TSTG
TL
Storage Temperature Range
-65 to +150
°C
°C
Lead Temperature (Soldering, 10 second)
260
Note : The values here show the absolute maximum rating, and for normal usage please refer the test condition in Electrical
Characteristics Table.
Electrical Characteristics
Unless otherwise noted , these specifications apply over CIN=10uF , COUT=10uF , and TJ=0 to 125°C. Typical
values refer to TJ=25°C.
Symbol
Parameter
Test Conditions
HPL1117
Typ. Max.
Unit
Min.
VREF
Reference Voltage
V
10mA≤ IOUT ≤1A, 1.4V≤(VIN -VOUT) ≤10.75V,
TJ =0~125°C
1.225 1.250 1.275
VOUT
Output Voltage
HPL1117-18
TJ =0~125°C,
1.764 1.800 1.836
2.450 2.500 2.550
2.790 2.850 2.910
0≤ IOUT≤ 1A, 3.1V≤VIN≤9V,
TJ =0~125°C,
0≤ IOUT≤ 1A, 3.8V≤VIN≤9V,
TJ =0~125°C,
0≤ IOUT≤1A, 4.25V≤VIN≤9V,
TJ =0~125°C,
0≤ IOUT≤ 1A, 4.6V≤VIN≤12V,
HPL1117-25
HPL1117-28
HPL1117-33
HPL1117-50
V
3.235 3.300 3.365
4.900 5.000 5.100
TJ =0~125°C,
0≤ IOUT≤ 1A, 6.45V≤VIN≤12V,
REGLINE Line Regulation
HPL1117
0.03
0.2
6
6
6
6
I
I
I
I
I
I
OUT=10mA, 1.5V≤(VIN -VOUT )≤10.75V (Note1)
OUT=0A, 3.5V≤VIN≤9V (Note1)
HPL1117-18
HPL1117-25
HPL1117-28
HPL1117-33
HPL1117-50
1
1
1
1
1
OUT=0A, 4V≤VIN≤9V (Note1)
%mV
OUT=0A, 4.25V≤VIN ≤9V (Note1)
OUT=0A, 4.75V≤VIN ≤12V (Note1)
OUT=0A, 6.45V≤VIN ≤12V (Note1)
6
REGLOAD Load Regulation
(VIN -VOUT)=3V, 0≤ IOUT ≤1A (Note1)
VIN=3.5V, 0≤ IOUT ≤1A (Note1)
VIN =4V, 0≤ IOUT ≤1A (Note1)
HPL1117
HPL1117-18
HPL1117-25
HPL1117-28
HPL1117-33
HPL1117-50
0.1
1
1
1
1
0.4
10
10
10
10
10
%mV
VIN=4.25V, 0≤ IOUT ≤1A (Note1)
VIN=4.75V, 0≤ IOUT ≤1A (Note1)
VIN=6.45V, 0≤ IOUT ≤1A (Note1)
1
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Electrical Characteristics (Cont.)
HPL1117
Typ. Max.
Symbol
Parameter
Test Conditions
Unit
Min.
VD
Dropout Voltage
IOUT=100mA (Note2)
1
1.1
1.2
1.3
IOUT=500mA (Note2)
OUT=1A (Note2)
(VIN -VOUT)=5V, TJ=25°C
1.05
1.1
V
I
ILIMIT Current Limit
1000
mA
IADJ
∆IADJ
IO
Adjust Pin Current (VIN -VOUT)=3V, IOUT=10mA
HPL1117
60
120
5
µA
Adjust Pin Current
Change HPL1117
0.2
10mA≤ IOUT ≤1A,
1.4V≤(VIN -VOUT) ≤10.75V
(VIN -VOUT)=10.75V (Note3)
µA
Minimum Load
1.7
75
mA
dB
Current HPL1117
PSRR Ripple Rejection
fRIPPLE=120Hz, VRIPPLE=1VP-P,
(VIN -VOUT)=3V
60
TR
TS
Thermal Regulation
0.01
0.5
0.02 %/W
%
TJ=25°C, 30ms Pulse
Temperature
Stability
LS
VN
θth
Long -Term Stability
0.3
%
%
TJ =125°C,1000Hrs.
RMS Output Noise
0.003
TJ=25°C,10Hz≤F≤10kHz, (% of VOUT
)
Thermal Resistance Junction to Case, at Tab
Junction to Ambient
Over Temperature
15
50
150
°C/ W
OT
°C
Point
IQ
Quiescent Current
HPL1117-18
HPL1117-25
HPL1117-28
HPL1117-33
HPL1117-50
5.5
5.5
5.5
5.5
5.5
10
10
10
10
10
mA
VIN≤9V
VIN≤9V
VIN≤9V
VIN≤12V
VIN≤12V
Note 1 : See thermal regulation specifications for changes in output voltage due to heating effects. Load line regulations are mea-
sured at a constant junction temperature by low duty cycle pulse testing.
Note 2 : Dropout voltage is specified over the full output current range of the device. Dropout voltage is defined as the minimum input/output
differential measured at the specified output current. Test points and limits are also shown on the Dropout Voltage curve.
Note 3 : Minimum load current is defined as the minimum output current required to maintain regulation.
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Block Diagram
VOUT
VIN
Current
Limit
Thermal
Voltage
Protection
Regulation
ADJ/GND
Application Circuits
1.25V to 10.7V Adjustable Regulator
Improving Ripple Rejection
HPL1117
HPL1117
VIN
IN
OUT
ADJ
VOUT1
VIN
IN
OUT
ADJ
VOUT
R1
R1
121Ω
1%
+
121Ω
10µF
100µ F
C2
150µF
+
+
10µ F
C1*
R2
1k
R2
365Ω
1%
C1
10µF
+
* C1 improves ripple rejection.
XC should be approximately
equal to R1 at ripple frequency
* Needed if device is far from filter capacitors
R1 + R2
VOUT = 1.250V X
R1
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Rev. B.13 - Mar., 2004
HPL1117
Typical Characteristics
Load Transietn Response
Line Transient Response
HPL1117-33
HPL1117-33
5
0.02
0.01
0
6
5
4
3
2
1
0
0.15
0.1
4.5
4
3.5
3
CIN=10µF
COUT=10µF Tantalum
2.5
IOUT=0.1A
0.05
0
CIN=10µF
2
1.5
1
-0.01
-0.02
-0.03
COUT=10µF Tantalum
VIN=5V
0.5
0
-0.05
-100
100
300
500
700
900
-20
30
80
130
180
Time (µS)
Time (µS)
Dropout Voltage vs. Output Current
Output Voltage vs. Input Voltage
HPL1117-33
1.25
1.2
6
5
4
3
2
1
0
1.15
1.1
1.05
1
0.95
0.9
0
0.2
0.4
0.6
0.8
1
0
1
2
3
4
5
6
7
8
9
Output Current (A)
Input Voltage (V)
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Rev. B.13 - Mar., 2004
HPL1117
Typical Characteristics Cont.
Input Current vs. Input Voltage
Current Limit vs. Input Voltage
HPL1117-33
HPL1117-33
2.4
2.2
2
6
5
4
3
2
1
0
1.8
1.6
1.4
1.2
1
0
2
4
6
8
10
12
5
7
9
11
13
Input Voltage (V)
Input Voltage (V)
Output Voltage vs. Temperature
Output Voltage vs. Temperature
2.6
3.4
3.3
3.2
3.1
3
2.5
2.4
2.3
2.2
2.1
2
1.9
1.8
1.7
1.6
2.9
2.8
2.7
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
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Rev. B.13 - Mar., 2004
HPL1117
Typical Characteristics Cont.
Output Voltage vs. Temperature
5.3
Input Current vs. Tmeperature
HPL1117-33
8
7
6
5
4
3
2
5.2
5.1
5
4.9
4.8
4.7
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
Current Limit vs. Temperature
PSRR vs. Frequency
HPL1117-33
HPL1117-33
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
+0
C
adj=22µF
-10
-20
-30
-40
-50
-60
-70
-80
IOUT=0.1A
Vripple=1V
p-p
VIN-VOUT=5V
V
IN-VOUT>=Vdropout
-90
V
IN-VOUT>=3V
-100
10k 20k
50 100 200
500 1k 2k
5k
50k 200k
-50
0
50
100
150
10 20
Temperature (°C)
Frequency (Hz)
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Rev. B.13 - Mar., 2004
HPL1117
Typical Characteristics Cont.
Adjustable Pin Current vs. Temperature
HPL1117-Adj
70
68
66
64
62
60
58
56
54
52
50
-50
-25
0
25
50
75
100 125
Temperature (°C)
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Rev. B.13 - Mar., 2004
HPL1117
Application Information
Rp
Output Voltage
PARASITIC
HPL1117
IN OUT
ADJ
LINE RESISTANCE
The HPL1117 develops a 1.25V reference voltage be-
tween the output and the adjust terminal. By placing
a resistor between these two terminals, a constant
Current is caused to flow through R1 and down through
R2 to set the overall output voltage. Normally this
current is chosen to be the specified minimum load
current of 10mA. For fixed voltage devices R1 and R2
are included in the device.
VIN
R1
RL
CONNECT
R1 TO CASE
R2
CONNECT
R2 TO LOAD
HPL1117
VIN
VOUT
IN
OUT
Figure 2. Connections for Best Load Regulation
ADJ
VREF
R1
R2
Input Capacitor
I
ADJ
60µA
An input capacitor of 10µF or greater is
recommended. Tantalum, or aluminum electrolytic
capacitors can be used for bypassing. Larger Val-
ues will improve ripple rejection by bypassing the in-
put to the regulator.
R2
R1
VOUT = VREF(1+
)+IADJR2
Figure 1. Basic Adjustable Regulator
Load Regulation
Output Capacitor
When the adjustable regulator is used. Load regula-
tion will be limited by the resistance of the wire con-
necting the regulator to the load. The data sheet speci-
fication for load regulation is measured at the output
pin of the device. Best load regulation is obtained
when the top of the resistor divider (R1) is tied di-
rectly to the output pin of the device, not to the load.
For fixed voltage devices the top of R1 is internally
connected to the output, and the ground pin can be
connected to low side of the load. If R1 were con-
nected to the load, RP is multiplied by the divider
ratio, the effective resistance between the regulator
and the load would be:
The HPL1117 requires an output capacitor to maintain
stability and improve transient response. Proper ca-
pacitor selection is important to ensure proper
operation. The HPL1117 output capacitor selection is
dependent upon the ESR (equivalent series resistance)
of the output capacitor to maintain stability. When the
output capacitor is 10uF or greater, the output capaci-
tor should have an ESR less than 1Ω.This will improve
transient response as well as promote stability. A low-
ESR solid tantalum capacitor works extremely well
and provides good transient response and stability over
temperature.
R2
Rp X (1+ ), Rp = Parasitic Line Resistance
R1
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Application Information (Cont.)
Figure 3&4 shows for the TO-252 and SOT-223 the
measured values of θ(J-A) for different copper area
sizes using a 2 layers, 1.6mm, and 6Sq. cm FR-4
PCB with 2oz. copper and a ground plane layer on
the backside area used for heatsinking. It can be
used as a rough guideline in estimating thermal
resistance.
Output Capacitor (Cont.)
Aluminum electrolytics can also be used, as long as
the ESR of the capacitor is <1Ω. The value of the
output capacitor can be increased without limit. Higher
capacitance values help to improve transient response
and ripple rejection and reduce output noise.
Ripple Rejection
50
TA=25°C
The curves for Ripple Rejection were generated us-
ing an adjustable device with the adjust pin bypassed.
With a 22µF bypassing capacitor 75dB ripple rejec-
tion is obtainable at any output level. The impedance
of the adjust pin capacitor, at the ripple frequency,
should be < R1. R1 is normally in the range of 100Ω-
200Ω. The size of the required adjust pin capacitor
is a function of the input ripple frequency. At 120Hz,
with R1=100Ω, the adjust pin capacitor should be
13µF. For fixed voltage devices, and adjustable de-
vices without an adjust pin capacitor, the output ripple
will increase as the ratio of the output voltage to the
reference voltage (VOUT /VREF ).
45
40
35
30
25
0
2
4
6
8
10
12
14
2
Top Copper Area (cm )
Figure 3.
θ(J-A) vs. copper area for the TO-252 package
Thermal Considerations
HPL1117 has thermal protection which limits junction
temperature to 150°C. However, device functionality
is only guaranteed to a maximum junction tempera-
ture of +125°C.
Both the TO-220, TO-252, TO-263 and SOT-223
packages use a copper plane on the PCB and the
PCB itself as a heatsink. To optimize the heat sinking
ability of the plane and PCB, solder the tab of the
package to the plane.
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Application Information (Cont.)
Thermal Considerations (Cont.)
60
TA=25°C
55
50
45
40
35
30
0
2
4
6
8
10
12
14
2
Top Copper Area (cm )
Figure 4.
θ(J-A) vs. copper area for the SOT-223 package
The thermal resistance for each application will be
affected by thermal interactions with other compo-
nents on the board. Some experimentation will be
necessary to determine the actual value.
The power dissipation of HPL1117 is equal to :
PD = (VIN - VOUT) x IOUT
Maximum junction temperature is equal to :
TJUNCTION = TAMBIENT + (PD x θJA)
Note: TJUNCTION must not exceed 125°C
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Package Information
TO-220 ( Reference JEDEC Registration TO-220)
D
Q
b
e
E
b1
e1
L1
L
H1
A
c
J1
F
Millimeters
Dim
Inches
Min.
3.56
1.14
0.51
0.31
14.23
2.29
4.83
9.65
0.51
5.84
2.03
12.7
3.65
3.53
2.54
Max.
4.83
1.78
1.14
1.14
16.51
2.79
5.33
10.67
1.40
6.86
2.92
14.73
6.35
4.09
3.43
Min.
0.140
0.045
0.020
0.012
0.560
0.090
0.190
0.380
0.020
0.230
0.080
0.500
0.143
0.139
0.100
Max.
0.190
0.070
0.045
0.045
0.650
0.110
0.210
0.420
0.055
0.270
0.115
0.580
0.250
0.161
0.135
A
b1
b
c
D
e
e1
E
F
H1
J1
L
L1
R
Q
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Package Informaion
TO-252( Reference JEDEC Registration TO-252)
E
A
b2
C1
L2
D
H
L1
L
b
C
e1
A1
D1
E1
Millimeters
Dim
Inches
Min.
2.18
Max.
2.39
1.27
0.89
5.461
0.58
0.58
6.22
Min.
Max.
0.094
0.050
0.035
0.215
0.023
0.023
0.245
A
A1
b
0.086
0.035
0.020
0.205
0.018
0.018
0.210
0.89
0.508
5.207
0.46
b2
C
C1
D
0.46
5.334
D1
E
5.2 REF
5.3 REF
0.205 REF
0.209 REF
6.35
6.73
0.250
0.265
E1
e1
H
3.96
9.398
0.51
0.64
0.89
5.18
0.156
0.370
0.020
0.025
0.035
0.204
0.410
10.41
L
L1
L2
1.02
0.040
0.080
2.032
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Rev. B.13 - Mar., 2004
HPL1117
Package Information
TO-263 ( Reference JEDEC Registration TO-263)
E
TERMINAL 4
L2
E1
D1
D
L
L3
b2
b
e
e1
A
c2
R
Φ 1
L1
DETAIL "A"ROTED
L4
c
Millimeters
Inches
Min.
Max.
Min.
Max.
Dim
A
b
4.06
0.51
1.14
4.83
1.016
1.651
0.160
0.02
0.190
0.040
0.065
b2
c
0.045
0.38 TYP.
2.54 TYP
0.015 TYP.
0.100 TYP
c2
D
e
e1
L
L1
L2
L3
1.14
8.64
9.65
1.40
9.65
10.54
0.045
0.340
0.380
0.055
0.380
0.415
14.60
2.24
1.02
1.20
15.88
2.84
2.92
1.78
0.575
0.090
0.040
0.050
0.625
0.110
0.112
0.070
Copyright HIPAC Semiconductor, Inc.
15
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Rev. B.13 - Mar., 2004
HPL1117
Package Information
SOT-223( Reference JEDEC Registration SOT-223)
D
A
a
B1
c
H
E
L
K
e
A1
e1
b
B
Dim
Millimeters
Inches
Min.
Max.
1.80
0.08
0.80
3.10
0.32
6.70
3.70
Min.
0.06
Max.
0.07
A
A1
B
B1
c
1.50
0.02
0.60
2.90
0.28
6.30
3.30
0.02
0.11
0.01
0.25
0.13
0.03
0.12
0.01
0.26
0.15
D
E
e
2.3 BSC
4.6 BSC
0.09 BSC
0.18 BSC
e1
H
L
6.70
0.91
1.50
7.30
1.10
2.00
0.26
0.04
0.06
0.29
0.04
0.08
K
0
10
0
10
°
α
°
°
°
13
13
°
β
°
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Physical Specifications
Terminal Material
Lead Solderability
Packaging
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
2500 devices per reel
Reflow Condition (IR/Convection or VPR Reflow)
tp
TP
Critical Zone
TL to TP
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
°
t 25 C to Peak
Time
Classificatin Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Large Body Small Body
Pb-Free Assembly
Large Body
Small Body
Average ramp-up rate
(TL to TP)
3°C/second max.
3°C/second max.
Preheat
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
- Temperature Min (Tsmin)
- Temperature Mix (Tsmax)
- Time (min to max)(ts)
Tsmax to TL
- Temperature(TL)
- Time (tL)
3°C/second max
Peak Temperature(Tp)
183°C
217°C
60-150 seconds
60-150 seconds
Time within 5°C of actual Peak
Temperature(tp)
Ramp-down Rate
225 +0/-5°C
10-30 seconds
240 +0/-5°C
245 +0/-5°C
250 +0/-5°C
10-30 seconds
10-30 seconds 20-40 seconds
6°C/second max.
Time 25°C to Peak Temperature
6°C/second max.
6 minutes max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright HIPAC Semiconductor, Inc.
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Rev. B.13 - Mar., 2004
HPL1117
Package Reflow Conditions
pkg. thickness ≥ 2.5mm
and all bgas
pkg. thickness < 2.5mm pkg. thickness < 2.5mm and pkg.
volume < 350mm3
and pkg. volume ≥ 350mm3
Convection 220 +5/-0°C
VPR 215-219°C
Convection 235 +5/-0°C
VPR 235 +5/-0°C
IR/Convection 220 +5/-0°C
IR/Convection 235 +5/-0°C
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
Method
Description
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
245 C , 5 SEC
°
1000 Hrs Bias @ 125 C
°
168 Hrs, 100 % RH , 121 C
°
-65 C ~ 150 C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
°
°
ESD
Latch-Up
Carrier Tape & Reel Dimension
t
D
P
Po
E
P1
Bo
F
W
Ao
D1
Ko
T2
J
C
A
B
T1
Copyright HIPAC Semiconductor, Inc.
18
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Rev. B.13 - Mar., 2004
HPL1117
Carrier Tape & Reel Dimension
A
B
C
J
T 1
T 2
W
P
E
A p p lic a tio n
1 6 .4 + 0 .3
-0 .2
1 6 + 0 .3
- 0 .1
3 3 0
3
1 0 0
2
1 3
0 . 5
2
0 .5
2 .5 0 .5
8
0 .1
±
±
±
±
±
±
1 .7 5 ± 0 .1
F
D
D 1
P o
P 1
A o
B o
K o
t
T O -2 5 2
7 .5
0 .1
1 .5 + 0 .1 1 .5 0 .2 5 4 .0
0 .1 2 .0
0 .1 6 .8
0 .1 1 0 .4 0 .1 2 .5 0 .1
0 .3 0 .0 5
±
±
±
±
±
±
±
P
±
±
A
B
C
J
T 1
T 2
W
E
A p p lic a tio n
T O -2 6 3
2 4 + 0 .3
- 0 .1
3 8 0
F
3
8 0
2
1 3
0 . 5
2
0 .5
2 4
4
2
0 .3
1 6
0 .1 1 .7 5 0 .1
±
±
±
±
±
±
±
D
D 1
0 .1 1 .5 + 0 .1 1 .5 0 .2 5 4 .0
P o
P 1
A o
0 .1 1 0 .8
B o
K o
t
0 .3 5 0 .0 1
±
11 .5
0 .1 2 .0
0 .1 1 6 .1 0 .1 5 .2 0 .1
±
±
±
±
±
±
W
±
±
3
A
3 3 0
F
B
C
J
T 1
T 2
0 .2
P
E
A p p lic a tio n
S O T -2 2 3
1 2 .7 5
0 .1 5
±
1
6 2 1 .5
2
0 .6
1 2 .4 + 0 .2
P 1
2
1 2
0 .3
8
0 .1
1 .7 5 0 .1
±
±
±
±
±
±
D
D 1
P o
±
A o
B o
7 .5 0 .1
K o
2 .1 0 .1
t
5 .5
0 .0 5 1 .5 + 0 .1
1 .5 + 0 .1 4 .0
0 .1 2 .0
0 .0 5 6 .9
0 .1
0 .3 0 .0 5
±
±
±
±
±
±
Cover Tape Dimensions
Application
TO- 252
TO- 263
Carrier Width
Cover Tape Width
Devices Per Reel
16
24
12
13.3
21.3
9.3
2500
1000
2500
SOT- 223
CONTACT
HIPAC Semiconductor, Inc.
2540 North First Street, Suite 308
San Jose, CA 95131-1016
U.S.A.
Tel:1-408-943-0808
Fax: 1-408-943-0878
E-Mail: info@hipacsemi.com
Copyright HIPAC Semiconductor, Inc.
19
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Rev. B.13 - Mar., 2004
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