IE-703204-G1-EM1 [ETC]
IE-703204-G1-EM1 User＇s Manual | User＇s Manual[09/2003] ; IE- 703204 -G1 -EM1用户手册|用户手册[ 09/2003 ]\n
| 型号： | IE-703204-G1-EM1 |
| 厂家： | 
ETC |
| 描述： | IE-703204-G1-EM1 User＇s Manual | User＇s Manual[09/2003]
|
| 文件： | 总45页 (文件大小：653K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
User’s Manual
IE-703204-G1-EM1
Emulation Board
Target Devices
V850ES/SA2
V850ES/SA3
Document No. U16622EJ1V0UM00 (1st edition)
Date Published September 2003 N CP(K)
2003
Printed in Japan
[MEMO]
User’s Manual U16622EJ1V0UM
2
Windows is either a trademark or a registered trademark of Microsoft Corporation in the United States and/or
other countries.
PC/AT is a trademark of International Business Machines Corporation.
•
The information in this document is current as of March, 2003. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
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appear in this document.
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NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
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or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
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responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
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(Note)
(1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
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(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics
(as defined above).
M8E 02. 11-1
User’s Manual U16622EJ1V0UM
3
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
Electronics product in your application, pIease contact the NEC Electronics office in your country to
obtain a list of authorized representatives and distributors. They will verify:
•
•
•
•
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Device availability
Ordering information
Product release schedule
Availability of related technical literature
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
•
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
[GLOBAL SUPPORT]
http://www.necel.com/en/support/support.html
NEC Electronics Hong Kong Ltd.
Hong Kong
Tel: 2886-9318
NEC Electronics America, Inc. (U.S.)
Santa Clara, California
Tel: 408-588-6000
NEC Electronics (Europe) GmbH
Duesseldorf, Germany
Tel: 0211-65 03 01
800-366-9782
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• United Kingdom Branch
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Tel: 01908-691-133
J03.4
User’s Manual U16622EJ1V0UM
4
INTRODUCTION
Target Readers
Purpose
This manual is intended for users who design and develop application systems
using the V850ES/SA2 and V850ES/SA3 microcontrollers.
The purpose of this manual is to describe the basic specifications of the IE-
703204-G1-EM1 and its proper operation.
Organization
This manual is broadly divided into the following parts.
• Outline
• Cautions
• Part names and functions
• Setup procedure
• Restrictions
How to Read This Manual It is assumed that the reader of this manual has general knowledge in the fields of
electrical engineering, logic circuits, and microcontrollers. Use the IE-703204-G1-EM1
connected to the in-circuit emulator (IE-V850ES-G1). This manual describes the basic
setup procedures and switch settings of the IE-703204-G1-EM1 and IE-V850ES-G1.
For the part names, functions, and configuration parts of the IE-V850ES-G1, refer to the
IE-V850ES-G1 User’s Manual (U16313E) provided separately.
To learn about the basic specifications and operation
→Read this manual in the order listed in CONTENTS.
To learn software settings such as the operation methods, command functions, etc., of
the IE-V850ES-G1 or IE-703204-G1-EM1
→Read the user’s manual of the debugger (sold separately) that is used.
Conventions
Note:
Footnote for item marked with Note in the text
Caution:
Remark:
Information requiring particular attention
Supplementary information
…
Numeral representation: Binary
×××× or ××××B
...
Decimal ××××
...
Hexadecimal ××××H
Prefix representing a power of 2 (address space, memory capacity):
K (kilo):
210 = 1024
M (mega): 220 = 10242
The meanings of terms used in this manual are listed below.
This is the device to be emulated.
Terminology
Target device
Target system
The system (user-built system) to be debugged. This includes the target program and hardware
configured by the user.
Emulation CPU
The CPU that executes the program created by the user in the emulator.
User’s Manual U16622EJ1V0UM
5
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CONTENTS
CHAPTER 1 OUTLINE ........................................................................................................................10
1.1 Product Configuration...........................................................................................................11
1.2 Features (When Connected to IE-V850ES-G1)....................................................................12
1.3 Function Specifications (When Connected to IE-V850ES-G1) ..........................................13
1.4 System Configuration............................................................................................................14
1.5 Contents in Carton.................................................................................................................16
CHAPTER 2 PART NAMES AND FUNCTIONS..................................................................................17
2.1 Part Names and Functions of IE-703204-G1-EM1...............................................................17
2.2 LEDs Controlled by IE-703204-G1-EM1................................................................................19
CHAPTER 3 SETUP PROCEDURE ....................................................................................................20
3.1 Connecting IE-V850ES-G1 and IE-703204-G1-EM1 with Probe .........................................20
3.2 Replacing Resonator .............................................................................................................23
CHAPTER 4 CAUTIONS .....................................................................................................................24
4.1 Connection with Target System ...........................................................................................24
4.2 Characteristics of Target Interface.......................................................................................24
CHAPTER 5 RESTRICTIONS .............................................................................................................34
5.1 Clock Generator .....................................................................................................................34
5.2 Timing of Setting/Releasing Standby Mode........................................................................34
5.3 DMA .........................................................................................................................................34
5.4 Operation During Break.........................................................................................................34
APPENDIX A PACKAGE DRAWINGS................................................................................................35
User’s Manual U16622EJ1V0UM
7
LIST OF FIGURES
Figure No.
Title
Page
1-1
1-2
System Configuration...................................................................................................................................14
Contents in Carton .......................................................................................................................................16
2-1
2-2
Part Names of IE-703204-G1-EM1 ..............................................................................................................17
LEDs Controlled by IE-703204-G1-EM1 ......................................................................................................19
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
Equivalent Circuit A......................................................................................................................................24
Equivalent Circuit B......................................................................................................................................24
Equivalent Circuit C......................................................................................................................................25
Equivalent Circuit D......................................................................................................................................25
Equivalent Circuit E......................................................................................................................................25
Equivalent Circuit F ......................................................................................................................................25
Equivalent Circuit G......................................................................................................................................26
Equivalent Circuit H......................................................................................................................................26
Equivalent Circuit I .......................................................................................................................................26
Equivalent Circuit J.......................................................................................................................................26
Equivalent Circuit K......................................................................................................................................27
Equivalent Circuit L ......................................................................................................................................27
User’s Manual U16622EJ1V0UM
8
LIST OF TABLES
Figure No.
Title
Page
4-1
4-2
Pin Correspondence List (V850ES/SA2 Pin Names)...................................................................................28
Pin Correspondence List (V850ES/SA3 Pin Names)...................................................................................31
User’s Manual U16622EJ1V0UM
9
CHAPTER 1 OUTLINE
The IE-703204-G1-EM1 is an emulation board for the IE-V850ES-G1 in-circuit emulator.
Connected to the IE-V850ES-G1, the IE-703204-G1-EM1 can be used for efficient hardware and software
debugging during system development using the V850ES/SA2 and V850ES/SA3.
This manual describes the basic setup procedure and the switch settings of the IE-V850ES-G1 when connected to
the IE-703204-G1-EM1. For the part names and functions of the IE-V850ES-G1, refer to the separate IE-V850ES-G1
User’s Manual (U16313E).
10
User’s Manual U16622EJ1V0UM
CHAPTER 1 OUTLINE
1.1 Product Configuration
Separately-sold products
In-circuit emulator (IE-V850ES-G1)
The IE-V850ES-G1 can be used as an in-circuit emulator for
the V850ES/SA2 and V850ES/SA3 by installing
the IE-703204-G1-EM1 board.
Emulation board
(IE-703204-G1-EM1)
Separately-sold products
Sockets
General-purpose probes made by TOKYO ELETECH
CORPORATION
SWEX-100SD-1
SWEX-120SE-1
PC interface board
This is a board for connecting the IE-V850ES-G1 to a PC.
More than one such board can be installed using the PC s
expansion slots.
IE-70000-PCI-IF(-A): For PCI bus
IE-70000-CD-IF-A: For PCMCIA socket
,
IE-70000-PCI-IF(-A)
IE-70000-CD-IF-A
11
User’s Manual U16622EJ1V0UM
CHAPTER 1 OUTLINE
1.2 Features (When Connected to IE-V850ES-G1)
• Maximum operating frequency: 20 MHz (2.2 V to 2.7 V)
• The following pins can be masked.
NMI, WAIT, RESET, HLDRQ
• The external dimensions of the IE-703204-G1-EM1 are listed below
Item
Value
External dimensions
Height
Width
Depth
35 mm
205 mm
140 mm
12
User’s Manual U16622EJ1V0UM
CHAPTER 1 OUTLINE
1.3 Function Specifications (When Connected to IE-V850ES-G1)
Item
Specification
Emulation memory capacity
Internal ROM
1 MB
For user memory
Internal ROM
4 MB
Execution/pass detection coverage memory capacity
256 KB
1 MB
External memory
External memory
Internal ROM
Memory access detection coverage memory capacity
1 MB
Branch destination entry count calculation coverage
memory capacity
256 KB
1 MB
External memory
Trace memory capacity
Time measurement function
External logic probe
168 bits × 32 K frames
Internal timers × 3
8-bit external trace possible
Trace/break event setting possible
Event break
Break function
Step execution break
Forced break
Fail-safe break
• Illegal access to peripheral I/O
• Access to guard area
• Write to ROM area
Caution Some functions may not be supported depending on the debugger that is used.
13
User’s Manual U16622EJ1V0UM
CHAPTER 1 OUTLINE
1.4 System Configuration
The system configuration when using the IE-703204-G1-EM1 connected to the IE-V850ES-G1, which itself is
connected to a PC (PC-9800 series or PC/ATTM compatible) is shown below.
Figure 1-1. System Configuration
<7>
<14>
Target system
<9>
<10>
<15>
<1>
<11>
<8>
<6>
ector connection
enlarged view)
<2>
Target system
<14>
<12>
<13>
<4>
<3>
Remarks <1>: PC (PC-9800 series or PC/AT compatible)
<2>: Debugger (sold separately), device file (obtained separately)Note 1
<3>: PC interface board (IE-70000-PCI-IF(-A), IE-70000-CD-IF-A: Sold separately)
<4>: PC interface cable (supplied with IE-V850ES-G1: Sold separately)
<5>: IE-V850ES-G1 (sold separately)
<6>: Emulation board (this product)
<7>: ProbeNote 2 (SWEX-120SE-1: Sold separately)
<8>: ProbeNote 2 (SWEX-100SD-1: Sold separately)
<9>: CSICE121A1312N03Note 2 (sold separately)
<10>: LSPACK121A1312N01Note 2 (sold separately)
<11>: CSSOCKET121A1312N01Note 2 (sold separately) or CSSOCKET121A1312N01NNote 2 (sold separately)
(CSSOCKET121A1312N01S1Note 2 (sold separately) can be used for stacking.)
CSSOCKET121A1312N01N is a type with no guide pins.
<12>: YQPACK100SDNote 2 (supplied with this product)
14
User’s Manual U16622EJ1V0UM
CHAPTER 1 OUTLINE
<13>: NQPACK100SDNote 2 (supplied with this product)
<14>: YQGUIDENote 2 (supplied with this product)
<15>: Power supply cable (supplied with IE-V850-G1: Sold separately)
Notes 1. The device file can be downloaded from the NEC Electronics website. (URL: http://www.necel.com/micro)
2. These are products of TOKYO ELETECH CORPORATION.
For further information, contact Daimaru Kogyo Co., Ltd.
Tokyo Electronics Department (TEL: +81-3-3820-7112)
Osaka Electronics Department (TEL: +81-6-6244-6672)
15
User’s Manual U16622EJ1V0UM
CHAPTER 1 OUTLINE
1.5 Contents in Carton
The IE-703204-G1-EM1 package contains the IE-703204-G1-EM1 emulation board, a guarantee card, a packing
list, this manual, and an accessory bag. Check whether the accessory bag contains the items listed below. If you find
any missing or damaged items, contact an NEC Electronics sales representative or distributor.
Figure 1-2. Contents in Carton
<1> IE-703204-G1-EM1
<4> Packing list
<3> Guaranteed card
<2> Accessory bag
<1> IE-703204-G1-EM1 × 1
<2> Accessory bag × 1
<3> Guarantee card × 1
<4> Packing list × 1
Check whether the accessory bag contains the following items in addition to this manual and the packing list (× 1).
(a) 7-pin header (for resonator replacement): × 1
(b) NQPACK100SD (for mounting board):
YQPACK100SD (for mounting probe):
HQPACK100SD (for mounting IC):
YQ-GUIDE (guide pin):
× 1
× 1
× 1
× 4
(c) Screws/washers:
6 sets (6 screws + 6 washers are included)
16
User’s Manual U16622EJ1V0UM
CHAPTER 2 PART NAMES AND FUNCTIONS
This chapter describes the part names and functions of the IE-703204-G1-EM1.
For the part names and functions of the IE-V850ES-G1, refer to the IE-V850ES-G1 User’s Manual (U16313E).
2.1 Part Names and Functions of IE-703204-G1-EM1
Figure 2-1. Part Names of IE-703204-G1-EM1
(3) OSC1 (main clock)
(4) OSC2 (subclock)
1
1
(2) Socket for connecting SWEX-120SE-1
(1) Socket for connecting SWEX-100SD-1
17
User’s Manual U16622EJ1V0UM
CHAPTER 2 PART NAMES AND FUNCTIONS
(1) Socket for connecting SWEX-100SD-1
Connect the SWEX-100SD-1 when using the IE-703204-G1-EM1 as the emulator of the V850ES/SA2.
(2) Socket for connecting SWEX-120SE-1
Connect the SWEX-120SE-1 when using the IE-703204-G1-EM1 as the emulator of the V850ES/SA3.
(3) OSC1 (main clock)
This is the socket in which the resonator that generates the main clock is mounted. Use this socket when
replacing the resonator for the main clock. For details, refer to 3.2 Resonator Replacement.
(4) OSC2 (subclock)
This is the socket in which the resonator that generates the subclock is mounted. The frequency of the subclock
is fixed to 32.768 kHz, so the resonator for subclock cannot be replaced.
18
User’s Manual U16622EJ1V0UM
CHAPTER 2 PART NAMES AND FUNCTIONS
2.2 LEDs Controlled by IE-703204-G1-EM1
Some of the LEDs mounted in the IE-V850ES-G1 are controlled by the IE-703204-G1-EM1.
For the LEDs that are controlled by the IE-V850ES-G1, refer to the IE-V850ES-G1 User’s Manual (U16313E).
Figure 2-2. LEDs Controlled by IE-703204-G1-EM1
Reset LED
Target VDD supply voltage <1>
Target VDD supply voltage <2>
TARGET
POWER
(1) Reset LED
The status of the RESET signal connected to the target system is indicated as follows.
Lit (ON):
The target system is connected and the RESET signal is active (GND level).
Unlit (OFF): Either the target system is not connected, or the RESET signal is inactive (VDD level).
(2) Target VDD supply voltage <1>
The status of the VDD signal connected to the target system is indicated as follows.
(This LED indicates the status of pin 11 during V850ES/SA2 emulation, and the status of the F3 pin during
V850ES/SA3 emulation.)
Lit (ON):
The target system is connected, and voltage is being applied to the VDD pin.
Unlit (OFF): Either the target system is not connected, or voltage is not being applied to the VDD pin.
(3) Target VDD supply voltage <2>
The status of the VDD signal connected to the target system is indicated as follows.
(This LED indicates the status of pin 19 during V850ES/SA2 emulation, and the status of the H2 pin during
V850ES/SA3 emulation.)
Lit (ON):
The target system is connected and voltage is being applied to the VDD pin.
Unlit (OFF): Either the target system is not connected, or voltage is not being applied to the VDD pin.
19
User’s Manual U16622EJ1V0UM
CHAPTER 3 SETUP PROCEDURE
This chapter describes how to connect the IE-703204-G1-EM1 to related products and how to replace the
resonator.
3.1 Connecting IE-V850ES-G1 and IE-703204-G1-EM1 with Probe
The following shows the procedure to connect the IE-V850ES-G1 and IE-703204-G1-EM1 with the probe.
<1> Pull off the front cover of the IE-V850ES-G1.
<2> Raise the frame of the IE-V850ES-G1 as shown.
20
User’s Manual U16622EJ1V0UM
CHAPTER 3 SETUP PROCEDURE
<3> With the main board and the IE-703204-G1-EM1 aligned as shown, insert three connectors on each side.
At this time align the board so that the socket (YQSOCKET) to connect the prove faces towards the probe
exit side.
Insert the probe (SWEX-100SD-1 or SWEX-120SE-1) in the socket corresponding to the target device (refer
to the following figure).
Socket to connect SWEX-120SE-1
(for V850ES/SA3)
Socket to connect SWEX-100SD-1
(for V850ES/SA2)
21
User’s Manual U16622EJ1V0UM
CHAPTER 3 SETUP PROCEDURE
<4> Slowly lower the frame of the IE-V850ES-G1.
<5> Replace the front cover of the IE-V850ES-G1.
22
User’s Manual U16622EJ1V0UM
CHAPTER 3 SETUP PROCEDURE
3.2 Replacing Resonator
The IE-703204-G1-EM1 does not support clock oscillation by the resonator on the target system. Therefore, to
change the main clock frequency, replace the resonator mounted in OSC1 (main clock) on the IE-703204-G1-EM1
with a resonator with the desired frequency. After shipment, the following oscillators are mounted as oscillators for
generating each clock.
Item
Setting
OSC1 (main clock)
OSC2 (subclock)
20 MHz oscillator
32.768 kHz oscillator
To change the main clock frequency, mount the resonator and capacitor on the included 7-pin header as shown
and substitute it for the 7-pin header already mounted on OSC1 (main clock).
Open
1
2
3
4
5
6
7
7-pin header
1
2
3
4
5
6
7
OSC1 (main clock)
7-pin socket
Open
X1
X2
µPD70F3204Y
(Emulation CPU)
The frequency of the subclock is fixed to 32.768 kHz, so the resonator for the subclock cannot be replaced. The
IE-703204-G1-EM1 does not support clock oscillation by the resonator on the target system. Therefore, operation
between the resonator on the target system and the oscillator in the target device cannot be emulated using the IE-
703204-G1-EM1.
23
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
The following must be observed when using the IE-703204-G1-EM1.
4.1 Connection with Target System
Turn off power to the IE-V850ES-G1 before connecting the IE-703204-G1-EM1 to the target system.
4.2 Characteristics of Target Interface
The target interface (signals connecting the in-circuit emulator and the target system) functionally operates as if an
actual device is connected, however, the characteristics may be different than those of the actual device. The target
interface of the IE-703204-G1-EM1 is one of those shown in Figures 4-1 to 4-12. The target interface processing of
each target device is shown in Tables 4-1 and 4-2.
Figure 4-1. Equivalent Circuit A
Target system side
IE system side
µ
Port
pin
PD70F3204Y
Emulation CPU
Figure 4-2. Equivalent Circuit B
Same
potential
Target system side
IE system side
as VDD
3.6 V
VCCA
VCCB
EP1K100FC484
(FPGA)
P174AVC16245
(Voltage level shifter)
A
B
24
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Figure 4-3. Equivalent Circuit C
Target system side
IE system side
Port
pin
µ
PD70F3204Y
Emulation CPU
Same
potential
as VDD
3.6 V
VCCA
VCCB
P174AVC16245
(Voltage level shifter)
EP1K100FC484
A
B
(FPGA)
Figure 4-4. Equivalent Circuit D
Same
Same
potential
as VDD
potential
as VDD
3.6 V
Target system side
IE system side
10 kΩ
VCCA
VCCB
User
reset
pin
P174AVC16245
(Voltage level shifter)
µ
PC393G2
(Comparator)
A
B
Figure 4-5. Equivalent Circuit E
Same
potential
Target system side
IE system side
as VDD
3.6 V
VCCA
VCCB
µ
AVREF0 PD70F3204Y
AVREF1 Emulation CPU
G6H-2F
(Relay)Note
P174AVC16245
(Voltage level shifter)
A
B
Note Conducts only when the target system is connected.
Figure 4-6. Equivalent Circuit F
Target system side
IE system side
µ
PC393G2
(Comparator)
II-
100 Ω
1 MΩ
25
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Figure 4-7. Equivalent Circuit G
Same
potential
Target system side
IE system side
as VDD
3.6 V
VCCA
VCCB
µ
AVREF0 PD70F3204Y
AVREF1 Emulation CPU
G6H-2F
P174AVC16245
(Voltage level shifter)
(Relay)Note
A
B
Note Conducts only when the target system is connected.
Figure 4-8. Equivalent Circuit H
Same
potential
Target system side
IE system side
as VDD
3.6 V
VCCA
VCCB
EP1K100FC484
(FPGA)
P174AVC16245
(Voltage level shifter)
II-
A
B
1 MΩ
Figure 4-9. Equivalent Circuit I
Target system side
Same
potential
as VDD
IE system side
PD70F3204Y
µ
Emulation CPU
AVDD
EVDD
Open
Open
AVDD
EVDD
N.C.
Open
Figure 4-10. Equivalent Circuit J
Target system side
IE system side
PD70F3204Y
µ
Emulation CPU
N.C.
N.C.
Open
Open
26
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Figure 4-11. Equivalent Circuit K
Target system side
IE system side
PD70F3204Y
µ
Emulation CPU
AVSS
SS
AVSS
SS
V
V
EVSS
EVSS
Figure 4-12. Equivalent Circuit L
Target system side
IE system side
PD70F3204
µ
Emulation CPU
1
7
Open
X1
X2
X1
X2
Open
Open
XT1
XT2
32.768 kHz
27 pF
27 pF
Open
1
7
XT1
XT2
1 MΩ
27
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Table 4-1. Pin Correspondence List (V850ES/SA2 Pin Names) (1/3)
V850ES/SA2
Pin No.
Target Interface Name
Processing in In-Circuit
(V850ES/SA2 Pin Names)
Emulator
Emulation circuit E
Emulation circuit I
Emulation circuit K
Emulation circuit A
Emulation circuit A
Emulation circuit E
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit K
Emulation circuit L
Emulation circuit L
Emulation circuit D
Emulation circuit L
Emulation circuit L
Emulation circuit G
Emulation circuit K
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit K
Emulation circuit I
Emulation circuit B
Emulation circuit B
Emulation circuit B
1
AVREF0
2
AVDD
3
AVSS
4
P80/ANO0
P81/ANO1
AVREF1
5
6
7
P00/NMI
8
P30/SI1/RXD0
P31/SO1/TXD0
P32/SCK1
VDD
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
VSS
X1
X2
RESET
XT1
XT2
VDD
VSS
P90/A0
P91/A1
P92/A2/INTP5
P93/A3/INTP6
P94/A4/TO2
P95/A5/TO3
P96/A6/TO4
P97/A7/TO5
P98/A8/RXD1
P99/A9/TXD1
P910/A10/SI2
P911/A11/SO2
P912/A12/SCK2
P913/A13/SI3
P914/A14/SO3
P915/A15/SCK3
EVSS
EVDD
PCS0/CS0
PCS1/CS1
PCS2/CS2
28
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Table 4-1. Pin Correspondence List (V850ES/SA2 Pin Names) (2/3)
V850ES/SA2
Pin No.
Target Interface Name
Processing in In-Circuit
(V850ES/SA2 Pin Names)
Emulator
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit K
Emulation circuit I
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
PCS3/CS3
PCM0/WAIT
PCM1/CLKOUT
PCM2/HLDAK
PCM3/HLDRQ
PCT0/WR0
PCT1/WR1
PCT4/RD
PCT5
PCT6/ASTB
PCT7
PDL0/AD0
PDL1/AD1
PDL2/AD2
PDL3/AD3
PDL4/AD4
PDL5/AD5/FLMD1
PDL6/AD6
PDL7/AD7
PDL8/AD8
PDL9/AD9
IC/FLMD0
EVSS
EVDD
PDL10/AD10
PDL11/AD11
PDL12/AD12
PDL13/AD13
PDL14/AD14
PDL15/AD15
PDH0/A16
PDH1/A17
PDH2/A18
PDH3/A19
PDH4/A20
PDH5/A21
P40/SI0
P41/SO0/SDA
P42/SCK0/SCL
P43/INTP00/TI0/TCLR0
29
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Table 4-1. Pin Correspondence List (V850ES/SA2 Pin Names) (3/3)
V850ES/SA2
Pin No.
Target Interface Name
Processing in In-Circuit
(V850ES/SA2 Pin Names)
Emulator
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
P44/INTP01/TO0
P45/INTP10/TI1/TCLR1
P46/INTP11/TO1
P01/INTP0/TI2
P02/INTP1/TI3
P03/INTP2/TI4
P04/INTP3/TI5
P05/INTP4
P711/ANI11
P710/ANI10
P79/ANI9
P78/ANI8
P77/ANI7
P76/ANI6
P75/ANI5
P74/ANI4
P73/ANI3
P72/ANI2
P71/ANI1
P70/ANI0
30
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Table 4-2. Pin Correspondence List (V850ES/SA3 Pin Names) (1/3)
V850ES/SA3
Pin No.
Target Interface Name
Processing in In-Circuit
(V850ES/SA3 Pin Names)
Emulator
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit B
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit B
Emulation circuit I
Emulation circuit E
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit B
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit B
Emulation circuit A
Emulation circuit K
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit B
Emulation circuit A
Emulation circuit A
Emulation circuit B
Emulation circuit H
Emulation circuit A
Emulation circuit E
A1
P70/ANI0
P71/ANI1
P73/ANI3
A2
A3
A4
P713/ANI13
P76/ANI6
A5
A6
P78/ANI8
A7
P711/ANI11
P04/INTP3/TI5
PCD2
A8
A9
A10
A11
A12
A13
B1
P45/INTP10/TI1/TCLR1
P43/INTP00/TI0/TCLR0
P41/SO0/SDA
PDH5/A21
AVDD
B2
AVREF0
B3
P72/ANI2
B4
P712/ANI12
P75/ANI5
B5
B6
P77/ANI7
B7
P710/ANI10
PCD3
B8
B9
P02/INTP1/TI3
P46/INTP11/TO1
P42/SCK0/SCL
P40/SI0
B10
B11
B12
B13
C1
PDH4/A20
P80/ANO0
AVSS
C2
C3
P74/ANI4
C4
P714/ANI14
P715/ANI15
P79/ANI9
C5
C6
C7
P05/INTP4[/ADTRG]
P03/INTP2/TI4
PCD1
C8
C9
C10
C11
C12
C13
D1
P01/INTP0/TI2
P44/INTP01/TO0
PDH3/A19
PDH7/A23
P81/ANO1
AVREF1
D2
31
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Table 4-2. Pin Correspondence List (V850ES/SA3 Pin Names) (2/3)
V850ES/SA3
Pin No.
Target Interface Name
Processing in In-Circuit
(V850ES/SA3 Pin Names)
Emulator
Emulation circuit A
Emulation circuit J
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit A
Emulation circuit A
Emulation circuit A
Emulation circuit B
Emulation circuit H
Emulation circuit B
Emulation circuit K
Emulation circuit L
Emulation circuit F
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit D
Emulation circuit L
Emulation circuit L
Emulation circuit K
Emulation circuit B
Emulation circuit I
Emulation circuit K
Emulation circuit G
Emulation circuit L
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit A
Emulation circuit C
Emulation circuit C
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit A
Emulation circuit C
Emulation circuit A
Emulation circuit B
Emulation circuit B
D3
P00/NMI
N.C.
D4
D11
D12
D13
E1
PDH0/A16
PDH2/A18
PDH1/A17
P30/SI1/RXD0
P31/SO1/TXD0
P32/SCK1
PDL14/AD14
PDH6/A22
PDL15/AD15
VSS
E2
E3
E11
E12
E13
F1
F2
X1
F3
VDD
F11
F12
F13
G1
PDL11/AD11
PDL13/AD13
PDL12/AD12
RESET
G2
XT1
G3
X2
G11
G12
G13
H1
EVSS
PDL10/AD10
EVDD
VSS
H2
VDD
H3
XT2
H11
H12
H13
J1
PDL8/AD8
MODE/FLMD0
PDL9/AD9
P20/SI4
J2
P91/A1
J3
P90/A0
J11
J12
J13
K1
PDL5/AD5/FLMD1
PDL7/AD7
PDL6/AD6
P22/SCK4
P92/A2/INTP5
P21/SO4
PCM1/CLKOUT
PDL4/AD4
K2
K3
K11
K12
32
User’s Manual U16622EJ1V0UM
CHAPTER 4 CAUTIONS
Table 4-2. Pin Correspondence List (V850ES/SA3 Pin Names) (3/3)
V850ES/SA3
Pin No.
Target Interface Name
Processing in In-Circuit
(V850ES/SA3 Pin Names)
Emulator
Emulation circuit B
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit I
Emulation circuit B
Emulation circuit B
Emulation circuit H
Emulation circuit H
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit K
Emulation circuit H
Emulation circuit H
Emulation circuit B
Emulation circuit B
Emulation circuit H
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit C
Emulation circuit H
Emulation circuit H
Emulation circuit B
Emulation circuit B
Emulation circuit H
Emulation circuit B
Emulation circuit B
Emulation circuit B
Emulation circuit B
K13
L1
PDL3/AD3
P93/A3/INTP6
P94/A4/TO2
P911/A11/SO2
P914/A14/SO3
P915/A15/SCK3
EVDD
L2
L3
L4
L5
L6
L7
PCS0/CS0
PCS2/CS2
PCM4
L8
L9
L10
L11
L12
L13
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
N1
PCT2
PCT0/WR0
PDL1/AD1
PDL2/AD2
P95/A5/TO3
P97/A7/TO5
P99/A9/TXD1
P913/A13/SI3
EVSS
PCS5
PCS4
PCM0/WAIT
PCM2/HLDAK
PCT3
PCT4/RD
PCT7
PDL0/AD0
P96/A6/TO4
P98/A8/RXD1
P910/A10/SI2
P912/A12/SCK2
PCS7
N2
N3
N4
N5
N6
PCS6
N7
PCS1/CS1
PCS3/CS3
PCM5
N8
N9
N10
N11
N12
N13
PCM3/HLDRQ
PCT1/WR1
PCT5
PCT6/ASTB
33
User’s Manual U16622EJ1V0UM
CHAPTER 5 RESTRICTIONS
The IE-703204-G1-EM1 has the following restrictions.
5.1 Clock Generator
(1) Resonator to be connected
Oscillation by the resonator on the target system is not supported. Therefore, clock oscillation operation on
the target system cannot be emulated with the in-circuit emulator.
(2) Emulation of oscillation stabilization time after reset has been released
In the target device for emulation, oscillation stabilization time is inserted after reset has been released;
however, it is not inserted in the in-circuit emulator.
(3) Operation clock after reset
In the target device for emulation, the operation clock after reset is fXX/8; however, there may be a period in
which the clock is not initialized to fXX/8 with the in-circuit emulator (depending on the timing of reset release).
5.2 Timing of Setting/Releasing Standby Mode
The timing of setting/releasing the standby mode is different between the target device and the in-circuit emulator.
The difference is within 1 clock when standby mode is set, and 2 or 3 clocks when it is released.
5.3 DMA
The status of the DCHC0 to DCHC3 registers of the DMA function vary when read; however, these registers
cannot be displayed by the I/O register browser of the debugger.
5.4 Operation During Break
In the in-circuit emulator, peripheral functions operate during a break, so there may be a difference between the
operations of the in-circuit emulator and target device.
(However, while the in-circuit emulator is in the break status, the counter of the watchdog timer stops.)
34
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(1) NQPACK100SD (unit: mm)
TOP VIEW
21.0
0.5 X 24 = 12.0
R2.2
–
C 1.5
0.5
5.8
0.3
3
Slit width
φ
3 – 1.0
+ 0.1
– 0
2.5
14.0
2.5
SIDE VIEW
0.18
0.5
15.0
0.5
BOTTOM VIEW
17.0
9.0
φ
4 – 2.0 Projection height 1.8
Remark NQPACK100SD is a product of TOKYO ELETECH CORPORATION.
35
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(2) YQPACK100SD (unit: mm)
TOP VIEW
16.6
0.5 X 24 = 12.0
4 – 2.2
φ
0.5
5.8
φ
3 – 1.0
10.9
4 – R 2.2
13.3
15.7
4 – R 3.2
18.1
SIDE VIEW
0.3
0.25 X 0.3
0.25
0.4
BOTTOM VIEW
0.2
C 1.5
13.4
Remark YQPACK100SD is a product of TOKYO ELETECH CORPORATION.
36
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(3) HQPACK100SD (unit: mm)
TOP VIEW
16.6
0.5 X 24 = 12.0
4
–
0.5
5.8
φ
2.2
φ
3 – 1.0
R 2.2
R 3.2
SIDE VIEW
0.23
0.58
BOTTOM VIEW
0.2
C 1.5
13.4
Remark HQPACK100SD is a product of TOKYO ELETECH CORPORATION.
37
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(4) CSICE121A1312N03 (unit: mm)
TOP VIEW
23
16.6
0.4X29=11.6
0.4
C2
Pin 1 side
φ
3.3
φ
4- 2.2
12.1
14.7
17.3
19.9
Part hole
SIDE VIEW
φ
1.03
φ
0.32
BOTTOM VIEW
0.8X12=9.6
0.8
CSICE121A1312N03
φ
121-land diameter : 0.5
φ
Resist diameter : 0.5
N
A
1
13
CSI-PWB-121A1312N01
MADE IN JAPAN TET
4.3
Remark CSICE121A1312N03 is a product of TOKYO ELETECH CORPORATION.
38
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(5) LSPACK121A1312N01 (unit: mm)
TOP VIEW
29
22.65
0.8X12 = 9.6
0.8
LSPACK121A
TET MADE IN JAPAN
SIDE VIEW
BOTTOM VIEW
Remark LSPACK121A1312N01 is a product of TOKYO ELETECH CORPORATION.
39
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(6) CSSOCKET121A1312N01 (unit: mm)
TOP VIEW
0.8X12=9.6
4
0.8
C1
Pin 1 side
SIDE VIEW
φ
φ
0.25
0.65
φ
0.7
Remark CSSOCKET121A1312N01 is a product of TOKYO ELETECH CORPORATION.
40
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(7) CSSOCKET121A1312N01N (unit: mm)
TOP VIEW
0.8X12=9.6
4
0.8
C1
Pin 1 side
SIDE VIEW
φ
φ
0.25
0.65
Remark CSSOCKET121A1312N01N is a product of TOKYO ELETECH CORPORATION.
41
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(8) CSSOCKET121A1312N01S1 (unit: mm)
TOP VIEW
0.8X12=9.6
4
0.8
C1
Pin 1 side
SIDE VIEW
φ
φ
0.25
0.65
Remark CSSOCKET121A1312N01S1 is a product of TOKYO ELETECH CORPORATION.
42
User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(9) CSSOCKET121A1312N01 (foot pattern) (unit: mm)
External dimensions of LSPACK
23
External dimensions of CSSOCKET
12
0.8X12=9.6
C1
0.8
4
Pin 1 side
φ
3- 0.8 0.0ꢀ
φ
121-pad diameter:
4
Through hole: Finished diameter
Remarks 1. After CSSOCKET has been fixed on the board by soldering, it is recommended to solder the
guide pin of the connector from the lower side of the board or to fix the portion around the
connector with resin for reinforcement.
2. The soldering reflow conditions are the same as for the CSPACK.
Remark CSSOCKET121A1312N01 is a product of TOKYO ELETECH CORPORATION.
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User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(10) SWEX-100SD-1 (unit: mm)
TOP VIEW
(48)
(295 8)
(48)
CN4
TET
SG
FG
SG
FG
SWEX-100SD1
100
IC1
76
1
75
51
25
Target
f
26
50
FG
SG
FG
SG
MADE IN JAPAN
TET
JAPAN
CN2
(20)
(20)
Red
Black
(5)
(45)
Ground Wire
Remark SWEX-100SD-1 is a product of TOKYO ELETECH CORPORATION.
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User’s Manual U16622EJ1V0UM
APPENDIX A PACKAGE DRAWINGS
(11) SWEX-120SE-1 (unit: mm)
TOP VIEW
(55.5)
(55.5)
(295 8)
CN4
SG
FG
FG
SWEX-144SD-1
TET 144
109
1
108
73
36
f
Target
37
72
CN2
FG
SG
TET
JAPAN
FG
MADE IN JAPAN
SIDE VIEW
(24)
(24)
Red
Black
(5)
(45)
Ground Wire
Remark SWEX-120SE-1 is a product of TOKYO ELETECH CORPORATION.
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User’s Manual U16622EJ1V0UM
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