IPS21C-D-G-LF [ETC]

Precision Feedback Controllers Fixed and PTAT references; 精密反馈控制器固定和PTAT引用
IPS21C-D-G-LF
型号: IPS21C-D-G-LF
厂家: ETC    ETC
描述:

Precision Feedback Controllers Fixed and PTAT references
精密反馈控制器固定和PTAT引用

控制器
文件: 总12页 (文件大小:94K)
中文:  中文翻译
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Power Management IPS20 and IPS21  
IN-PLUG® series: IPS20 and IPS21  
Precision Feedback Controllers  
Fixed and PTAT references  
REV5  
INTRODUCTION  
DESCRIPTION  
FEATURES  
Dual precision regulators for SMPS voltage and  
current control  
IN-PLUG® IPS20 & IPS21 Integrated Circuits are  
low-voltage current sensing feedback controllers used  
in Switch Mode Power Supplies to control load-side  
current and voltage. They have been designed to limit  
the power dissipated in the sensing circuitry for high  
output current applications that require current  
limiting. They also provide excellent loop stability  
and superb transient response. They both incorporate a  
4V shunt regulator for maximum flexibility to power  
the chip.  
Output currents up to 50A  
Output voltage down to 1.2V  
54mV or 100mV current sensing voltage  
1.19V voltage reference  
Operates with grounded optocoupler  
4V shunt regulator for VCC supply  
APPLICATIONS  
Fast chargers for power tools and other  
applications  
The IPS20 and IPS21 only differ by the characteristics  
of the current sensing references.  
Battery eliminators  
Industrial and bench-type power supplies  
Distributed power systems  
The IPS20 incorporates a trimmed 54mV reference  
with a positive temperature coefficient which closely  
matches that of a PCB copper trace. This copper trace  
sensing method can be used inexpensively with very  
low associated power losses.  
PIN CONFIGURATION: DIP-8 / SOIC-8  
The IPS21 incorporates a temperature compensated  
100mV reference for more conventional resistors.  
Both controllers feature the same voltage regulator  
section with a trimmed temperature stable voltage  
reference of 1.19V. This allows the output voltage of  
the SMPS to be set to any value down to about 1.2V.  
VCC  
VS  
1
8
GND  
OUT (-)  
IS  
IPS20  
IPS21  
VCOMP  
OPTO  
ICOMP  
4
5
The IPS20 and IPS21 are suitable for any SMPS and  
any make of SMPS controllers, including flyback,  
forward, PFC and DC/DC solutions.  
These flyback controllers work best in complement  
with the IN-PLUG® family of IPS1x flyback  
controllers, IPS10x PFC controllers and IPS20x Push-  
Pull controllers.  
ORDERING INFORMATION  
For part number, packaging, and ordering  
information, please refer to the second-to-last page of  
this datasheet.  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
1 / 12  
Power Management IPS20 and IPS21  
FUNCTIONAL BLOCK DIAGRAM  
4V Shunt Regulator  
8
1
GND  
VCC  
Trimmed  
Current Sensing  
50mV PTAT  
100mV Temp.Stable  
Trimmed 1.25V  
Temp. Stable  
Bandgap Regulator  
7
6
OUT (-)  
IS  
2
VS  
VOLTAGE  
ERROR  
AMPLIFIER  
CURRENT  
ERROR  
AMPLIFIER  
3
OPTOCOUPLER  
CURRENT-SOURCE  
CONTROL  
5
VCOMP  
ICOMP  
4
OPTO  
IPS20 / IPS21  
PIN DESCRIPTION  
PIN  
Description  
IC positive supply pin.  
1- VCC  
The chip behaves like a 4 volt zener diode referenced to GND  
Voltage sensing pin.  
2- VS  
This is the inverting input of the voltage error amplifier. The positive input of the amplifier is connected  
to an internal trimmed 1.20V voltage reference. An external voltage divider connected to this point sets  
the output voltage. This pin is also used for voltage loop compensation when required.  
Voltage loop compensation pin.  
3- VCOMP  
This is the output of the voltage error amplifier. The voltage loop compensation network, when required,  
is connected between this point and VS pin. Please note that this pin is not a zero-impedance node (1KΩ  
nominal).  
Optocoupler driver pin.  
4- OPTO  
This pin drives and external optocoupler connected to GND. A current-mode drive is used for maximum  
noise rejection.  
Current loop compensation pin. (similar to VCOMP)  
5- ICOMP  
This is the output of the current error amplifier. The current loop compensation network, when required,  
is connected between this point and the IS pin. Please note that this is not a zero-impedance point (1KΩ  
nominal).  
Current sensing pin.  
6- IS  
This pin is the inverting input of the current sense amplifier. The positive input of the amplifier is  
connected to an internal trimmed reference. The sensing threshold is 50mV PTAT (IPS20) or 100mV  
constant (IPS21). This pin should be connected through a resistor to the external current sensing resistor.  
Negative output pin.  
7- OUT (-)  
8- GND  
This pin is the negative side of the 1.20V trimmed voltage reference. It should be connected to the  
negative output of the SMPS.  
Ground pin.  
This is the most negative IC pin. The first output decoupling capacitor should return to it. Do not confuse  
this pin with the IS pin and the OUT(-) pin which are described above.  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
2 / 12  
Power Management IPS20 and IPS21  
TYPICAL FEEDBACK CIRCUITRY WITH CONTROL OF PRIMARY FLYBACK CONVERTER  
L1  
D1  
IN+  
DC or Rectified AC  
IN+  
OUT+  
SCHOTTKY  
+
+
OUTPUT  
C5  
R3  
RV1  
RV2  
C6  
TX1  
FLYBACK  
U1  
CONVERTER  
1
2
3
4
8
7
6
5
VCC  
VSENSE OUT(-)  
VCOMP IS  
GND  
OUT-  
OPTO ICOMP  
C1  
R1  
C3  
C4  
IPS20/21  
C2  
R2  
R4  
U2  
RISENSE  
SecondaryGND  
OPTOCOUPLER  
Fig. 1  
1) Current limiting:  
The current limiting is adjustable through RISENSE  
2) Regulated Voltage:  
The regulated voltage is adjustable through RV1 and RV2  
3) Compensation  
The voltage-control trans-conductance operational amplifier can be fully compensated. Both of its compensation  
pins are directly accessible for external compensation components.  
The suitable compensation network is shown in Fig.1. It consists of a capacitor C1 and a resistor R1in series,  
connected in parallel with another capacitor C2.  
The current-control trans-conductance operational amplifier can be fully compensated. Both of its compensation  
pins are directly accessible for external compensation components.  
The suitable compensation network is shown in Fig.1. It consists of a resistor R2 and a capacitor  
C2 in series, in parallel with a capacitor C3. Resistor R4 provides the input impedance that the compensation  
network works with. Capacitor C4, with R4, implements a small amount of filtering.  
Determination of Vout (Output Voltage):  
Vout = VSENSE x (RV1+RV2)/ RV2  
(Nominal VSENSE = 1.19V)  
Determination of Ilimit (Current Limit):  
Ilimit = IS threshold / RISENSE  
Nominal IS threshold :  
IPS20= 54mV  
IPS21= 100mV  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
3 / 12  
Power Management IPS20 and IPS21  
IN-PLUG® IPS20 and IPS21  
FUNCTIONAL DESCRIPTION  
IPS20 and IPS21 are highly integrated feedback solutions for Switch Mode Power Supplies applications requiring  
constant voltage and constant current mode. They were especially designed to reduce the power dissipated in the  
load-side current sensing resistor of power supplies with high output current They provide precise voltage and  
current regulation that can be fully and independently adjusted. They source the current necessary to drive a ground-  
referred optocoupler connected to the line side controller.  
They both incorporate the same trimmed temperature compensated 1.2V reference to set the output voltage. They  
only differ by the characteristics of the current sensing references. The IPS20 features a trimmed 50mV reference  
with a positive temperature coefficient which closely matches that of a PCB copper trace. This copper trace sensing  
method can be used inexpensively with very low associated power losses. The IPS21 incorporates a constant 100mV  
reference for more conventional resistors.  
Both the output voltage and current sense can be independently adjusted through respectively RV1/RV2 and  
RISENSE (FIG.1) This information is presented to the IPS20/21 controller, which drives the optocoupler through the  
OPTO current-mode output pin.  
The shunt regulator operates like a zener diode, keeping the chip supply voltage at about 4 volts. At start-up, when  
the 4 volts are reached, the controller starts normal operation. The overall chip consumption in this case is about 600  
μA.  
If the IPS20 or IPS21 Vcc is connected to the converter output voltage, then under start-up or short-circuit  
conditions, the IPS20/21 isn’t supplied with a high enough voltage. This is due to the fact that the chip has its power  
supply line in common with the power supply line of the system. Therefore, the current limitation can only be  
ensured by the primary PWM module, that should be chosen accordingly.  
If the primary current limitation is considered not to be precise enough for the application, then a sufficient supply  
for the IPS20/21 has to be ensured under any condition. It would then be necessary to add some circuitry to supply  
the chip with a separate power line.  
FIG.2 OUTPUT VOLTAGE VERSUS OUTPUT CURRENT  
The schematic in Figure 3 below shows how to realize a low-cost power supply for the IPS20/21 (with no additional  
winding). Please pay attention to the fact that in the particular case presented here, this low-cost power supply can  
reach voltages as high as twice the voltage of the regulated line.  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
4 / 12  
Power Management IPS20 and IPS21  
AUXILLIARY POWER SUPPLY  
This simple circuitry allows to supply the chip with a separate power line. In case of short-circuit, when Vout+ <  
Vcc, the chip still keeps working properly and limits the output current to its maximum targeted value.  
VOUT+  
D2  
Auxilliary Power Supply  
TR1  
DIODE  
+ C2  
R1  
C3  
U1  
VCC  
VSENSE OUT(-)  
VCOMP IS  
D1  
1
2
3
4
8
7
6
5
GND  
SCHOTTKY  
OPTO ICOMP  
IPS20/21  
+ C1  
R2  
VOUT-  
DERIVATIVE OF AAI’s PATENTED SNUBBER NETWORK  
This technique powers the feedback controller under all circumstances including short-circuits and is especially  
suitable for flyback, PFC and forward converters.  
D1  
VOUT+  
snubber network  
TR1  
SCHOTTKY  
C1  
R1  
+
D2  
C3  
U1  
+
1
2
3
4
8
7
6
5
VCC  
VSENSE OUT(-)  
VCOMP IS  
GND  
C4  
D3  
OPTO ICOMP  
+
IPS20/21  
C2  
R2  
VOUT-  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
5 / 12  
Power Management IPS20 and IPS21  
ELECTRICAL CHARACTERISTICS  
ABSOLUTE MAXIMUM RATING  
Characteristics  
Value  
140  
UNITS  
mA  
IPS 20 and IPS21 Max ICC (4V shunt regulator)  
Opto sourcing current with external resistor  
Operating junction temperature  
20  
mA  
- 40 to 150  
- 55 to 150  
260  
°C  
Storage temperature range  
Lead temperature (3 mm from case for 5 sec.)  
PARAMETER  
Supply, Bias  
TEST CONDITIONS  
PARAMETERS  
UNITS  
MIN.  
3.8  
TYP.  
4
MAX.  
4.2  
Shunt regulator voltage  
Shunt regulator dynamic  
resistance (see figure 1)  
Shunt regulator max peak  
repetitive current  
ICC = 1 to 30 mA  
1 to 50 mA  
V
Ω
-
1
3
-
-
100  
-
-
mA  
μΑ  
Min ICC to ensure operation  
(internal current)  
600  
Voltage Regulation  
I
OPTO = 500 μA  
Zin=10KΩ  
VSENSE threshold (note1)  
1.17  
-
1.19  
+/- 3  
1.21  
+/- 6  
V
VSENSE threshold variation with  
temperature  
IOPTO= 500 μA, -40°C to +85°C  
mV  
(see figure 2)  
Output impedance of VCOMP  
Voltage gain to VCOMP  
Unity gain bandwidth  
-
-
-
-
-
1
-
-
KΩ  
dB  
(see figure 7)  
(see figure 7)  
115  
500  
82  
-
KHz  
Phase margin in unity gain  
VSENSE Input current  
-
Degrees  
μA  
1.0  
Transconductance from VSENSE  
to OPTO  
@ VCC = 2.5V  
(see figure 5)  
@ VCC = 5V  
-
4
-
-
-
-
mA/mV  
mA  
Max OPTO output sourcing  
current without ext. resistor  
1.2  
10  
(see figure 5)  
@ VCC = 2.5V  
(see figure 3)  
Max OPTO output sourcing  
current with ext. resistor  
-
mA  
Current Limiting  
ICC = 1 mA  
ISENSE threshold (IPS20)  
52  
-
54  
0.16  
99  
56  
-
mV  
mV /°C  
mV  
(see figure 3)  
ISENSE threshold variation with  
temperature (IPS20)  
ICC = 1 mA, -40°C to +85°C  
(see figure 3)  
ICC = 1 mA  
ISENSE threshold (IPS21)  
97  
-
101  
-
(see figure 4)  
ISENSE threshold variation with  
temperature (IPS21)  
ICC = 1 mA, -40°C to +85°C  
(see figure 4)  
3
μV/°C  
Output impedance of ICOMP  
Voltage gain to ICOMP  
-
-
1
-
-
ΚΩ  
(see figure 8)  
138  
dB  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
6 / 12  
Power Management IPS20 and IPS21  
Unity gain bandwidth to ICOMP  
Phase margin in unity gain  
ISENSE Input current  
(see figure 8)  
-
-
-
2
-
-
MHz  
Degrees  
uA  
54  
-1.0  
Transconductance from ISENSE  
to OPTO  
(see figure 6a & 6b)  
IPS20: 6a, IPS21: 6b  
-
60  
-
mA/mV  
Max OPTO output sourcing  
current without ext. resistor  
@ VCC = 1.30V  
(see figure 5)  
@ VCC = 2.5V  
(see figure 5)  
1.2  
10  
-
-
-
-
mA  
mA  
Max OPTO output sourcing  
current with ext. resistor  
Note1: Tighter tolerances to 0.5% available upon request.  
Note2: All values are @ 25°C unless otherwise specified.  
Note3: Electrical parameters, although guaranteed, are not all 100% tested in production.  
Figure 1: IPS20 and IPS21 4V Shunt Regulator Icc  
300  
250  
200  
150  
100  
50  
0
0
1
2
3
4
5
6
Shunt Voltage (V)  
Figure 2: IPS20 & IPS21 Trimmed 1.20V Reference  
1.2  
1.195  
1.19  
1.185  
1.18  
1.175  
1.17  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
Temp (°C)  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
7 / 12  
Power Management IPS20 and IPS21  
Figure 3: IPS20 Ref. with copper temperature drift compensation  
70  
65  
60  
55  
50  
45  
40  
-40  
-20  
0
20  
40  
60  
80  
100  
Temperature (°C)  
Figure 4: IPS21 100mV Reference  
100  
99.5  
99  
98.5  
98  
97.5  
97  
-50  
-30  
-10  
10  
30  
50  
70  
90  
110  
130  
Temperature (°C)  
Figure 5: Transfer function of the voltage regulation  
2
1.8  
1.6  
1.4  
1.2  
1
0.8  
0.6  
0.4  
0.2  
0
1.185  
1.186  
1.187  
1.188  
1.189  
1.19  
Vsense (V)  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
8 / 12  
Power Management IPS20 and IPS21  
Figure 6a: Transfer Function of the IPS20 Current Regulation  
2.2  
2
1.8  
1.6  
1.4  
1.2  
1
0.8  
0.6  
0.4  
0.2  
0
-0.2  
47.5  
48  
48.5  
49  
49.5  
50  
50.5  
51  
ISENSE (mV)  
Figure 6b: Transfer function of the IPS21 current regulation  
2
1.8  
1.6  
1.4  
1.2  
1
0.8  
0.6  
0.4  
0.2  
0
98.5 98.6 98.7 98.8 98.9 99 99.1 99.2 99.3 99.4 99.5  
Isense (mV)  
Fig 7: Open loop gain of VSENSE amplifier without compensation  
140  
120  
100  
80  
60  
40  
20  
0
-20  
0.001  
0.01  
0.1  
1
10  
100  
1000  
10000  
100000  
1000000  
Frequency (Hz)  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
9 / 12  
Power Management IPS20 and IPS21  
Fig 8: Open loop gain of Isense amplifier without compensation  
160  
140  
120  
100  
80  
60  
40  
20  
0
-20  
-40  
0.001  
0.01  
0.1  
1
10  
100  
1000  
10000  
100000  
1000000  
10000000  
Frequency (Hz)  
APPLICATION INFORMATION  
The IPS20 and IPS21 chips are intended for use as voltage feedback control and current limiting on the secondary  
side of switching power supplies.  
Powering the chip (Pin 1 - VCC and Pin 8 - GND)  
The VCC pin acts like a 4 volt zener. This is a different chip-power concept than the IPS25, a self-powered feedback  
controller, optimized for output currents below 1A (see IPS25 datasheet for details). The GND pin is the lowest  
voltage the chip sees. What this means is that in a typical “positive output voltage with current sense resistor”  
application, the GND pin DOES NOT go to the negative output pin of the power supply, rather it goes to the  
“transformer side” of the current-sense resistor. No input voltage should be greater than VCC or less than GND. It is  
recommended as good engineering practice to have a decoupling capacitor from VCC-to GND of 10uF. The intended  
design implementation for powering the chip is to have a resistor from VCC to either the output voltage or a separate  
supply.This resistor should be sized such that at minimum supply voltage (and subtracting 4 volts for the VCC  
voltage), there is enough current to operate the chip (3mA) plus supply the optoisolator.  
Tips for lab experiments  
The IPS20/21 are fabricated in a low-voltage IC process (lower than the IPS25). This means that they can be  
damaged with pin voltages greater than 7 volts. When testing designs using an IPS20/21, it is typical to perform  
debug with a laboratory current-limited external power supply attached to the VCC pin. This external supply should  
be set for around 5 volts and 10 milliamps. It is possible to damage an IPS20/21 if one of these lab supplies is set for  
(say) 12 volts and 10 milliamps, the lab supply is powered-on, and then the lab supply is connected to the IPS20/21,  
because the VCC voltage will be 12 volts (in this example) until the IPS20/21 starts conducting current and  
discharges any output capacitance in the lab supply.  
Note that the overcurrent performance of a power supply using an IPS20/21 will be different based on whether the  
chip is powered by the output (where the VCC supply will be collapsing) versus from an independent supply. The  
user should be sure to check that the output voltage and current characteristics during overcurrent conditions meet  
his/her specific needs. During startup and short-circuit conditions, the IPS20/21 may not have enough supply voltage  
to operate. In this situation, the output current limitation must come from the primary side PWM module, and must  
be designed accordingly.  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
10 / 12  
Power Management IPS20 and IPS21  
VSENSE (Pin 2), VCOMP (Pin 3)  
The internal voltage reference for voltage feedback is 1.19 volts. The output voltage being sensed/regulated should  
have a voltage divider to 1.19 volts connected to pin 2. For good voltage feedback loop performance, no capacitor  
should be connected from pin 2 to ground. The recommended series-RC component values from pin 2 to pin 3 to  
roll-off the loop gain are 10k ohms and 68nF.  
OPTO (Pin 4)  
The OPTO pin is a current source (unlike a shunt regulator like the TL431, which is a current sink). The intended  
connection for the voltage feedback network is to connect the OPTO pin to the anode of the photodiode in an  
optoisolator, with the cathode of the photodiode connected to ground. The IPS20/21 use very little current to operate,  
but the user is reminded that the OPTO current being sourced comes through the VCC pin.  
ICOMP (Pin 5) and IS (Pin 6)  
The current sense resistor connects between IS and GND. For a positive output power supply, IS is the negative  
output pin. The internal voltage reference for current limiting (50 millivolts for IPS20, 100 millivolts for IPS21) is  
referenced to GND. The recommended component values from pin 5 to pin 6 to roll-off the loop gain are a series 10k  
ohms and 220pF, in parallel with 68nF. To reduce susceptability to noise spikes, an additional RC filter network  
might be desireable from IS to GND (refer to the Typical Application Schematic Figure 1 above).  
OUT(-) (Pin 7)  
The negative side of the internal voltage reference for voltage feedback is connected here. For a typical application  
with a positive output voltage and a current sense resistor, this pin connects to the more-negative pin of the output  
voltage. This configuration allows the voltage feedback to compensate for the voltage drop across the current sense  
resistor (which will vary with load).  
EVALUATION BOARD  
There is an evaluation board (AAEV2021) available for the IPS20 and IPS21 feedback controllers. Contact AAI  
Marketing for more details. There are also benchmark/reference designs available that include AAI Flyback  
Controllers, and Application Notes.  
PACKAGE DIMENSIONS AND MARKING  
The IPS20 and IPS21 are available in plastic 8-pin DIP and plastic 8-pin SOIC packages. Refer to the latest version  
of specification AAPS001 (ASIC Advantage’s “Package Numbering, Marking, and Outline Standard”, available at  
www.asicadvantage.com) for specific information concerning the package dimensions and package marking.  
Part Number/Tape&Reel  
Part Number/Tube  
Package  
Temperature Range  
IPS20C-D-G-LF  
IPS21C-D-G-LF  
NA  
8-Pin PDIP  
Commercial  
0°C to +70°C  
-40°C to +85°C  
0°C to +70°C  
-40°C to +85°C  
IPS20I-D-G-LF  
IPS21I-D-G-LF  
NA  
8-Pin PDIP  
8-Pin SOIC  
8-Pin SOIC  
Industrial  
Commercial  
Industrial  
IPS20C-SO-G-LF-TR  
IPS21C-SO-G-LF-TR  
IPS20C-SO-G-LF  
IPS21C-SO-G-LF  
IPS20I-SO-G-LF-TR  
IPC21I-SO-G-LF-TR  
IPS20I-SO-G-LF  
IPC21I-SO-G-LF  
© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
11 / 12  
Power Management IPS20 and IPS21  
The following is a brief overview of certain terms and conditions of sale of product. For a full and complete copy of  
all the General Terms and Conditions of Sale, visit our webpage http://www.asicadvantage.com/terms.htm.  
LIMITED WARRANTY  
The product is warranted that it will conform to the applicable specifications and be free of defects for one year.  
Buyer is responsible for selection of, use of and results obtained from use of the product. Buyer indemnifies and  
holds ASIC Advantage, Inc. harmless for claims arising out of the application of ASIC Advantage, Inc.’s products to  
Buyer’s designs. Applications described herein or in any catalogs, advertisements or other documents are for  
illustrative purposes only.  
CRITICAL APPLICATIONS  
Products are not authorized for use in critical applications including aerospace and life support applications. Use of  
products in these applications is fully at the risk of the Buyer. Critical applications include any system or device  
whose failure to perform can result in significant injury to the user.  
LETHAL VOLTAGES  
Lethal voltages could be present in the applications. Please comply with all applicable safety regulations.  
INTELLECTUAL PROPERTY RIGHTS AND PROPRIETARY DATA  
ASIC Advantage, Inc. retains all intellectual property rights in the products. Sale of products does not confer on  
Buyer any license to the intellectual property. ASIC Advantage, Inc. reserves the right to make changes without  
notice to the products at any time. Buyer agrees not to use or disclose ASIC Advantage Inc.’s proprietary  
information without written consent.  
TRADEMARKS AND PATENTS  
- IN-PLUG® is a registered trademark of ASIC Advantage, Inc.  
- AAI’s modified snubber network is patented under the US Patent # 6,233,165. IN-PLUG® Customers are granted  
a royalty-free licence for its utilization, provision the parts are purchased factory direct or from an authorized agent.  
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When AAI accepts to design and manufacture IN-PLUG® products to Buyer’s designs or specifications, buyer has  
certain obligations to provide defense in a suit or proceeding claiming infringement of a patent, copyright or  
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TITLE AND DELIVERY  
All shipments of goods shall be delivered ExWorks, Sunnyvale, CA, U.S.A. Title in the goods shall not pass to Buyer  
until ASIC Advantage, Inc. has received in full all amounts owed by Buyer.  
LATEST DATASHEET UPDATES  
For the latest datasheet updates, visit our web page: http://www.in-plug.com/datasheets.htm.  
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ASIC Advantage INC.  
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© Copyright 2006-2009 - ASIC Advantage, Inc.  
AADS00001/AA743  
- Revision 5– Dec 2008  
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