L9824 [ETC]

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型号：	L9824
厂家：	ETC
描述：	驱动器接口集成电路光电二极管 CD
文件：	总11页 (文件大小：232K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

L9824

OCTAL PARALLEL LOW SIDE DRIVER

ADVANCE DATA

OPERATING DC SUPPLY VOLTAGE RANGE

5V TO 25V

SUPPLY OVERVOLTAGE PULSEUP TO 40V

VERY LOW STANDBY QUIESCENT CUR-

RENT 100µA

EIGHTBITPARALLELSTRUCTURE WITHME-

MORY FEATURE

BIDIRECTIONAL INPUTS-OUTPUTS

µC COMPATIBLEINPUTLEVELSWITHTHRE-

SHOLD HYSTERESIS

INTERNAL 4.5V REFERENCE DEFINING THE

OUTPUT HIGH LEVELS

EIGHT HIGH CURRENT OUTPUTS FOR DC

CURRENTS UP TO 350mA WITH ON RESI-

STANCE LESS THAN 3Ω (typ. 1,5Ω)

OUTPUT SHORT CIRCUIT PROTECTION

WITH TIME DELAY CHARACTERISTICS FOR

DRIVING LAMPS

MULTIPOWER BCD TECHNOLOGY

DIP20

SO20

ORDERING NUMBERS : L9824 (DIP20)

L9824D (SO20)

DESCRIPTION

The L9824 is an octal parallel input power interface

circuit in the Multipower BCD technology with bidi-

rectional inputs and outputs and the output status

monitoring.

THERMAL OVERLOAD PROTECTION

BLOCK DIAGRAM

February 1995

1/11

This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

L9824

PIN CONNECTION (top view)

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V_S

V_OUT

dV_OUT/dt

I_{OUT DC}

I_{OUT P}(*)

I_S

Supply Voltage

Output Voltage

Int. Clamped to Vs

100

Output Voltage Transient

DC Output Current

V/µs

±350

Peak Output Current (T/t_p≥ 100, t_p= 4ms)

DC Current at V_S

±2

– 1.5

V_{D IN}

V_EN

Input Voltage

– 0.3 to 7 (**)

– 40 to 150

– 65 to 150

Enable Input Voltage

V_TR

Transfer Input Voltage

T_j

Operating Junction Temperature

Storage Temperature

°C

T_stg

P_max

Power Dissipation (T_amb= 80°C)

DIP20

SO20

875

420

(*) Schaffner pulses type 1 and 2

(**) For V_S< 6.7V the device can be supplied through the internal ESD diodes from inputs to V_S.

THERMAL DATA

Symbol

Rth j-amb Thermal Resistance Junction-ambient

T_jMaximum Junction Temperature

Parameter

DIP20

80°C/W

150°C/W

SO20

Max.

165°C/W

150°C/W

MAX

2/11

L9824

ELECTRICAL CHARACTERISTICS (5V ≤ V_S≤ 25V (40V @ t < 400ms), – 40°C ≤ T_j≤ 125°C unless oth-

erwise specified)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

V_DINL

V_DINH

Input Voltage LOW

Input Voltage HIGH

V_E= L, V_TR= L

1.0

(input-mode) ¹⁾

V_E= L, V_TR= H

(output-mode)

3.0

7.0

V_DOUTL

V_DOUTH

Output Voltage LOW

Output Voltage HIGH

V_E= L, V_TR= H

(output-mode)

0.4

5.0

4.0

I_DIN

Input Current

V_E= L, V_TR= L

(input-mode) ¹⁾

– 10

µA

V_ENL

V_ENH

V_TRL

V_TRH

I_EN.TR

V_EHY

V_THY

R_OUT

Enable Voltage LOW

1.0

7.0

1.0

7.0

Enable Voltage HIGH

3.0

Transfer Voltage LOW

Transfer Voltage HIGH

3.0

– 1

200

Enable, Transfer Input Current

Enable Threshold Hysteresis

Transfer Threshold Hysteresis

0 < V_E.TR< 5V

µA

Output Resistance

R_OUT-characteristic

See fig. 2

Out = L

0 < I_OUT≤ 350mA

V_S≥ 8V

V_S= 6.5V

V_S= 5.0V

1.5

0.5

3.0

Ω

KΩ

I_SC

Output Short Current

I_OUTSC-characteristic (See fig. 3) T_SCL= 20ms

8V ≤ V_S= V_out≤ 25V

0.36

1.2

V_OUT

Output Voltage

Out = H

I_OUT= 0.35A (DC)

I_OUT= 1A (pulsed)

V_S+ 0.5

V_S+ 2.0

V_S+ 2

V_S+ 4

ΣI_OUTL1

Output Leakage Current per

Channel

Out = H, – 40 ≤ T_j≤ 85°C

V_OUT= 16V

100

µA

C_OUT

Output Capacitance

Out = H,

V_OUT= 5V

120

_OUT= 15V

I_Q

Quiescent Current

5V ≤ V_S≤ 16V; I_DOUT= 0

– 40 ≤ T_j≤ 85°C

V_E= H, V_TR= H

V_TR= L

STANDBY MODE

TRANSFER-, HOLD MODE

READ MODE

100

200

400

µA

V_E= L, V_TR= H

I_Q

Quiescent Current

V_S= 25V

V_S= 40V @ t ≤ 400ms

I_SCOP

Additional Short Circuit

Operating Current Per Channel

V_EN= L, V_DIN= L

V_TR= L, I_OUT= I_SC

I_O+500

3.5

µA

V_OM

_SCL(2)

Output Monitor Threshold

2.5

Duration of Low Short Current

Limiting

I_OUT= I_SCL

Note : 1. V_D...arebidirectional datainputs or outputs depending on the V_E, V_TRstatus.

3/11

L9824

ELECTRICAL CHARACTERISTICS (continued)

Symbol

Parameter

Test Conditions

See fig. 1

Min.

Typ.

Max.

100

Unit

µs

t_nON

ON-delay Time (5)

R_L= 1KΩ

t_nOFF (3) OFF-delay Time (5)

t_sON ON-delay Time (6)

t_sOFF (3) OFF-delay Time (6)

t_DON Data ON - Delay Time (7)

t_DOFF (3) Data OFF - Delay Time (7)

µs

_ON-t_OFF

t_f

Delay Time Difference

Filter Time (8)

Except STANDBY MODE

µs

0.7

µs

Notes : 2. If the output current exceeds the high short current threshold I_SCan internal timer is started. If after the time period of T_TSCthe current

limiting is still active the overload condition is recognized and this output is switchedoff. To restart the output the TRANSFER MODE

has to be chosen and the corresponding input voltage V_DINmust become HIGH to reset the internal overload latch.

3. Becausethe output capacitance is the drain-source capacitance of the power switch the risetime of the outputs depends of the used

supply voltage V_S, the load resistor R_Land the output capacitance C_OUTand can be calculated with the following equation :

T_d= τ In 10 (reaching 90% of V_S) τ = R_Lx C_OUTx K (4) K = 1.5

This additional delay time T_dmust be added to t_OFF

4. Because the drain source capacitance of the output transistor is voltage dependent, it is necessary to multiply C_OUT(specified at the

maximum V_OUT) with a correction factor K to obtain the average output capacitance C_OUT

5. Delay time between all modes except STANDBYMODE.

6. Delay time between STANDBY MODE and any other mode and vice versa.

7. Data delay time when TRANSFER MODE is chosen.

8. Explanation see page 6.

Critical mode variations occur when both mode

MODE CHANGE DIAGRAM

inputs change their state simultaneously. This is

representedby the diagonal arrows in the mode

changediagram.

To avoid thata filter is implementedin the TM si-

gnal path. A suitable filter time t_fis chosen to be

well beyondthe mode comparator delays.

FILTERING TIMING

4/11

L9824

As a consequenceof the filter functionthe follo-

wing features are given respectively has to be

considered (refer to timing above):

For a delay between RM and HM up to t_d< tmin

the parasitic TM will be supressed.

ThereforethechangefromTMtoanyothermode

causes an additional delay t_fthat is the internal

filter time.

The parasiticSMtime istoo shorttoinfluencethe

outputs and is hence negligible.

To obtain the transfer function surely both mode

inputs be ”Low” for at least t_{TM fmax}.

TRUTH TABLE FOR THE CONTROL INPUTS

Enable V_E

Transfer V_TR

Mode Symbol

Function Mode

READ MODE (output monitoring)

TRANSFER MODE (input data transferred to output)

HOLD MODE (output corresponds to the data latch)

STANDBY MODE (all outputs open)

Figure 1 : Timing Diagram with Function Modes.

Figure 2 : Maximum R_OUT- Characteristics.

Figure 3 : Typical Short Current

Characteristics.

DSON

Region

SCL

RON

t(ms)

D95AT168

I_TH: Exceeding the threshold activates the current limitation

circuit and timer.

_RON: Must be longer than 20ms because for shorter times even

currents higher than ITH do not trigger the current limitation.

5/11

L9824

Figure 4 : Test Circuit.

FUNCTIONAL DESCRIPTIONS

OUTPUT BLOCK

This device wasdeveloped specially forautomotive

applications to drive different loads like relais,

lamps, databusesor actuatorswith verylow current

consumption.

TRANSFER FROM DATA INPUT TO POWER

OUTPUT.

The DATA pins are used bidirectionally. The main

path is the non inverting transfer of a digital signal

fromthe DATApin tothepoweroutput(TRANSFER

MODE). The data pass the input latch that works

alsoasa memoryin theHOLD MODE. Theyremain

stored until the TRANSFER MODE is selected to

write in new data.

The L9824 contains eight identical channels each

with a separate DATA input/output and the power

output. In each channel the memory function, the

outputshort circuit function and the diagnostic fun-

ction is realized.

This meansthatinallothermodesthememory con-

tent will not be changedexcept the output short cir-

cuit protection was activemore than the checktime

of 42.5ms.In this case in allmodes the storage flip-

flop will be set to hold the output for protectioninto

the Off-state. By activating the READ MODE in this

position it is possible to detectshort-circuit load.

The common part determines the function modes

throughENABLE and TRANSFER inputs whereas

thereferencepartbiasesallcurrentsourcesandge-

nerates the threshold voltages and the stabilized

supply voltage for the whole CMOS-logic.

A special thermal protection, ESD-protected in-

puts/DATApins and a particular outputshort circuit

characteristic prevent a damage or the destruction

of the device.

To switch on the output again, the external control

processorhas toselectthe TRANSFERMODE and

to changethe inputsignalatthecorrespondingdata

terminaltoHIGHtoset thestorageflip-flopandthen

to write in LOW. An additionalreading of this chan-

nel output (selecting the READ MODE after the

mentionedchecktime)showswhetherthe short-cir-

cuit is still present.

Referring to the block diagram it can be seen that

each channel works independent and contains all

necessary functions described in the following

points.

6/11

L9824

TRANSFER FROM POWER OUTPUT TO DATA

OUTPUT.

frombothinputcomparatorswhichdeterminethelo-

gic threshold and hysteresis drive the mode logic

that distributesthe right data to all output blocks.

The opposite signal path (READING MODE) from

theoutput to the DATAterminals is used for thedia-

gnosticfunctionto monitor the outputstatus.Output

voltages greater than 3.5V lead to ”HIGH” state at

the DATA terminals. The HIGH level is typical 4.5V

and internally stabilized. For ”LOW” level the satu-

ration voltage of N-Channel MOS transistor is rele-

vant.

TRANSFER, HOLD and READ MODE are explai-

ned before. The remaining STANDBY MODE swit-

ches the clock oscillator and all outputs off and

reducethequiescentcurrentbelow100µA. Thisme-

ans that only the both mode comparators and the

bandgapregulatorare active. The input data stored

beforewill be not changed.

SHORT-CIRCUIT PROTECTION.

OSCILLATOR PART.

For the use oflamps a particular short-current char-

acteristicis implementedanditis drawn infig. 3. Be-

cause of the low resistance of lamps during the

ON-phasethe current limit is fortypical 2.5ms about

the double as for the second current limiting phase.

Detecting a short circuit condition means that the

channeloutputremains low in any condition for the

check time T_CH= T_TSCH+ T_SCLindependentof the

status of the inputs.

The clock oscillator contains an on-chip capacitor

andrequiresthereforeno externalcomponents.The

oscillation frequency is approximately in the range

of 50kHz. This oscillator signal is devidedby a 7 bit-

counter which createsthe two frequenciesfor the ti-

ming of all short current control circuits in each

output block.

VOLTAGE REFERENCE.

Thesetimeperiodsaregeneratedfrom twofrequen-

cies 400Hz/6.4kHzcoming from the common oscil-

lator part. If the current limiting is active after the

check period an overload is recognized and the re-

garding channel is switched off and the DATA flip-

flop is also reset as explainedearlier.

Themainreferencecellis abandgapcontrolledvery

lowdrop voltageregulator.Allthresholdvoltagesfor

the input comparators, the diagnostic comparators

andthethermal overloadcomparatorsaswell asthe

referencevoltage for the CMOS supply buffers are

derived from one resistor devider.

Inorder to savesupplycurrentaspecialshort-circuit

protection is used that needs no quiescent current

during the ON-state as long as no overload is pre-

sent at the output. Because of this special circuit

configuration the output current must exceed a gi-

venthresholdto activatethecurrent regulationloop.

Becauseofthelow currentcapabilityofthe regulator

two buffers are used to supply the CMOS logic for

every four channels. These voltage followers work

like a current multiplier at a very low quiescentcur-

rent.Aclamping circuit preventsthattheCMOS bre-

akdownvoltage will be reached.

This current threshold I_THis determined by the ON-

resistance R_DSONof the outputDMOS and the mi-

nimum operatingsupplyvoltageV_Sminof thelimiting

circuit and can be easily calculatedin the following

way :

CURRENT REFERENCE + POWER–ON RESET.

The twotemperaturecompensatedcurrent linesare

generated directly from the bandgap voltage and

are switched off by the mode logic to save supply

current. Athirdunswitchedcurrentlinebiasesthein-

put comparators and CMOS buffers.

I_TH= V_Smin/R_DSON= 4V/1.5Ω = 2.7A (typical value

at T_j= 25°C)

During supply voltage rise, power-on reset circuit

providesa definedstatusofall latchesin the CMOS

logic. From a supplyvoltage of about 4V on it ena-

bles the wholelogic and thedevice canwork. Below

4Valllatchesareset toholdtheoutputsintotheOFF

state.

When the outputis shortedfor instanceto V_Sama-

ximum peakcurrentwill occurforashortdurationup

to the limiting circuit is switched on and the settling

time is over. Under worst case conditions (T_j= –

40°C), V_S= 16V, where R_DSONis lowest) the peak

current can reach 7A with a duration of 1µs at V_out

= 15V and 4A with a duration of 20µs at V_out= 5V.

PROTECTION CIRCUITS

ESD–PROTECTION.

COMMON PARTS

MODE CONTROL.

By the”TRANSFER” and ”ENABLE” input, working

modes can be selected as shown in the truthtable

intheupperpart offig. 1. The controlsignalscoming

Bothinputcomparators(ENABLE,TRANSFER)are

ESD protectedandinclude zenerdiodes thatclamp

the gatesof the internal MOSFETs to minimal 15V.

Seconddiodes clamp theseinputs to V_Sif the sup-

ply voltage is lower than 0.6V below the zener volt-

age.

7/11

L9824

The eight ”DATA” terminals hasthe same ESD pro-

tectionstructure as the comparator inputs.

At a chip temperatureof about 160°C the device is

switched OFF. This stateis similar to the STANDBY

MODE. Afterthe temperatureremains underappro-

ximately 135°C the element is switched ON. Ther-

malshut-downdoesnotinfluenceanylogicbecause

it switches only the gates of all outputDMOS-tran-

sistors directly to ground.

SHORT CURRENT LIMITING.

The detailed function explanation is given in a for-

mer section where the output block is described.

Generallyitcan besupplementarysaidthatthis kind

of protection determines the limits within the safe

operatingarea of the used DMOS structure.

APPLICATION HINTS

The big chiparea and the heatcapacityof silicon al-

lowforshort durationspeakcurrentsuptofive times

the maximum DC current that occur under certain

conditions as expoundedabove.

– Precausions by external components must be

provided to avoid damage of the device (it‘s in

any case not allowed to exceed the maximum

ratings given on page 2).

THERMAL SHUTDOWN.

Because of the symmetry and the big size of chip

twothermaloverloadprotectioncircuits wereplaced

on each side ofthe chip where the outputstructures

are concentrated to ensure minimum thermal gra-

dients to the thermal sensors.

– For open load detection it is recommended to

use external components to fix the desired

status (depending on the temperature the in-

ternal open load status can vary from ”H” to

”L” caused by leakage currents)

Figure 5: Application Diagram

8/11

L9824

DIP20 PACKAGE MECHANICAL DATA

inch

TYP.

DIM.

MIN.

0.254

1.39

TYP.

MAX.

MIN.

0.010

0.055

MAX.

1.65

0.065

1.000

0.45

0.25

0.018

0.010

25.4

8.5

2.54

0.335

0.100

0.900

22.86

7.1

0.280

0.155

3.93

3.3

0.130

1.34

0.053

9/11

L9824

SO20 PACKAGE MECHANICAL DATA

inch

TYP.

DIM.

MIN.

TYP.

MAX.

2.65

0.3

MIN.

MAX.

0.104

0.012

0.096

0.019

0.013

0.1

0.004

2.45

0.49

0.32

0.35

0.23

0.014

0.009

0.5

0.020

45 (typ.)

12.6

13.0

0.496

0.394

0.512

0.419

10.65

1.27

0.050

0.450

11.43

7.4

0.5

7.6

0.291

0.020

0.299

0.050

0.030

1.27

0.75

8 (max.)

10/11

L9824

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for

the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its

use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifica-

tions mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information pre-

viously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or

systems without express written approval of SGS-THOMSON Microelectronics.

SGS-THOMSON Microelectronics GROUP OF COMPANIES

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11/11

L9824 [ETC]

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