LESD5L3.3T1G [ETC]
LESD5L3.3T1G LRC; LESD5L3.3T1G LRC
| 型号： | LESD5L3.3T1G |
| 厂家： | 
ETC |
| 描述： | LESD5L3.3T1G LRC |
| 文件： | 总4页 (文件大小：379K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LESHAN RADIO COMPANY, LTD.
LESD5L3.3T1G
Transient Voltage
Suppressors
LESD5L3.3T1G
ESD Protection Diodes with Ultra−Low
Capacitance
1
The ESD5L is designed to protect voltage sensitive components that
require ultra−low capacitance from ESD and transient voltage events.
Excellent clamping capability, low capacitance, low leakage, and fast
response time, make these parts ideal for ESD protection on designs
where board space is at a premium. Because of its low capacitance, it is
suited for use in high frequency designs such as USB 2.0 high speed and
antenna line applications.
2
SOD– 523
Specification Features:
• Ultra Low Capacitance 0.5 pF
• Low Clamping Voltage
1
2
• Small Body Outline Dimensions:
0.047″ x 0.032″ (1.20 mm x 0.80 mm)
• Low Body Height: 0.024″ (0.6 mm)
• Stand−off Voltage: 5 V
PIN 1. CATHODE
2. ANODE
• Low Leakage
• Response Time is Typically < 1.0 ns
• IEC61000−4−2 Level 4 ESD Protection
• This is a Pb−Free Device
Ordering information
Shipping
Device
Marking
3L
3000/Tape&Reel
LESD5L5.0T1G
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
Epoxy Meets UL 94 V−0
LEAD FINISH: 100% Matte Sn (Tin)
QUALIFIED MAX REFLOW TEMPERATURE:
Device Meets MSL 1 Requirements
260°C
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
IEC 61000−4−2 (ESD)
Contact
Air
10
15
kV
Total Power Dissipation on FR−5 Board
°P °
D
200
mW
(Note 1) @ T = 25°C
A
Storage Temperature Range
Junction Temperature Range
T
−55 to +150
−55 to +125
260
°C
°C
°C
stg
T
J
Lead Solder Temperature − Maximum
(10 Second Duration)
T
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
1/4
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LESHAN RADIO COMPANY, LTD.
LESD5L3.3T1G
ELECTRICAL CHARACTERISTICS
A
(T = 25°C unless otherwise noted)
I
Symbol
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
I
F
I
PP
V
C
PP
V
RWM
Working Peak Reverse Voltage
V
C
V
V
BR RWM
I
Maximum Reverse Leakage Current @ V
V
R
RWM
I
R
I
T
V
F
V
BR
Breakdown Voltage @ I
Test Current
T
I
T
F
I
Forward Current
I
PP
V
F
Forward Voltage @ I
F
P
Peak Power Dissipation
Capacitance @ V = 0 and f = 1.0 MHz
pk
Uni−Directional TVS
C
R
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted, V = 1.0 V Max. @ I = 10 mA for all types)
A
F
F
V
(V)
C
V
RWM
I
R
(mA)
V (V) @ I
BR T
@ I = 1 A
PP
(V)
@ V
(Note 2)
(Note 3)
I
T
C (pF)
V
C
RWM
Per IEC61000−4−2
Device
Marking
(Note 4)
Max
Max
1.0
Min
mA
Typ
0.5
Max
Max
Device
LESD5L3.3T1G
3L
3.3
5.0
1.0
0.9
9.5
Figures 1 and 2
See Below
2. V is measured with a pulse test current I at an ambient temperature of 25°C.
BR
T
3. Surge current waveform per Figure 5.
4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Figure 2. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Negative 8 kV Contact per IEC61000−4−2
2/4
86-755-83468588 www.fazhanIC.com
LESHAN RADIO COMPANY, LTD.
LESD5L3.3T1G
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
I
peak
Test
Voltage
(kV)
First Peak
Current
(A)
100%
90%
Current at
30 ns (A)
Current at
60 ns (A)
Level
1
2
3
4
2
4
6
8
7.5
15
4
8
2
4
6
8
I @ 30 ns
22.5
30
12
16
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
Oscilloscope
ESD Gun
TVS
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
t
r
PEAK VALUE I
@ 8 ms
RSM
90
80
70
60
50
40
30
20
PULSE WIDTH (t ) IS DEFINED
P
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I /2 @ 20 ms
RSM
t
P
10
0
0
20
40
t, TIME (ms)
60
80
Figure 5. 8 X 20 ms Pulse Waveform
3/4
86-755-83468588 www.fazhanIC.com
LESHAN RADIO COMPANY, LTD.
LESD5L3.3T1G
SOD−523
NOTES:
−X−
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M,
1982.
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
−Y−
B
MILLIMETERS
INCHES
NOM
0.047
0.032
0.024
0.012
1
2
DIM
A
B
C
D
J
K
S
MIN
1.10
0.70
0.50
0.25
0.07
0.15
1.50
NOM
1.20
0.80
0.60
0.30
0.14
0.20
1.60
MAX
MIN
MAX
0.051
0.035
0.028
0.014
1.30
0.90
0.70
0.35
0.043
0.028
0.020
0.010
D 2 PL
M
0.08 (0.003)
T
X
Y
0.20 0.0028 0.0055 0.0079
0.25
1.70
0.006
0.059
0.008
0.063
0.010
0.067
C
−T−
SEATING
PLANE
K
J
S
SOLDERING FOOTPRINT*
1.40
0.0547
0.40
0.0157
0.40
mm
inches
0.0157
ǒ
Ǔ
SCALE 10:1
4/4
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