MBI5024GP [ETC]

16 constant-current output channels Staggered delay of output;
MBI5024GP
型号: MBI5024GP
厂家: ETC    ETC
描述:

16 constant-current output channels Staggered delay of output

文件: 总18页 (文件大小:263K)
中文:  中文翻译
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Datasheet  
MBI5024  
Macroblock  
Features  
Small Outline Package  
· 16 constant-current output channels  
· Constant output current invariant to load voltage change:  
Constant output current range:  
3-45mA@VDD=5V;  
3-30mA@VDD=3.3V  
GF: SOP24L-300-1.00  
· Excellent output current accuracy:  
between channels: ±1.5% (typ.) and ±2.5% (max.)  
between ICs: ±1.5% (typ.) and ±3% (max.)  
· Output current adjusted through an external resistor  
Shrink SOP  
· Fast response of output current, OE (min.): 70ns with good uniformity  
between output channels  
GP/GPA: SSOP24L-150-0.64  
· Staggered delay of output  
· 25MHz clock frequency  
· Schmitt trigger input  
· 3.3V/ 5V supply voltage  
· Pb-free & Green Package  
Current Accuracy  
Conditions  
Between Channels  
Between ICs  
<±2%  
<±3%  
IOUT=25mA@VDS=0.7V  
IOUT=3mA~30mA@VDS=0.7V; VDD=3.3V  
IOUT=3mA~45mA@VDS=0.7V; VDD=5.0V  
<±2.5%  
<±3%  
Product Description  
With PrecisionDrive technology, MBI5024 is designed for LED displays which require to operate at low current  
and to match the luminous intensity of each channel. It provides supply voltage and accepts CMOS logic input at  
3.3V and 5.0V to meet the trend of low power consumption. MBI5024 contains a serial buffer and data latches  
which convert serial input data into parallel output format. At MBI5024 output stage, sixteen regulated current ports  
are designed to provide uniform and constant current sinks for driving LEDs within a large range of VF variations.  
MBI5024 provides users with great flexibility and device performance while using MBI5024 in their system design  
for LED display applications, e.g. LED panels. It accepts an input voltage range from 3V to 5.5V and maintains a  
constant current up from 3mA to 45mA determined by an external resistor, Rext, which gives users flexibility in  
controlling the light intensity of LEDs. MBI5024 guarantees to endure maximum 17V at the output port. The high  
clock frequency, 25 MHz, also satisfies the system requirements of high volume data transmission.  
ÓMacroblock, Inc. 2008  
Floor 6-4, No.18, Pu-Ting Rd., Hsinchu, Taiwan 30077, ROC.  
TEL: +886-3-579-0068, FAX: +886-3-579-7534 E-mail: info@mblock.com.tw  
- 1 -  
April 2008, VA.02  
MBI5024  
Block Diagram  
OUT0  
OUT14 OUT15  
OUT1  
IO Regulator  
R-EXT  
VDD  
16-bit Output Driver  
OE  
LE  
16  
16-bit Output Latch  
16  
GND  
16-bit Shift Register  
SDO  
SDI  
CLK  
Terminal Description  
Pin Configuration  
Pin No.  
Pin Name  
Function  
24  
23 R-EXT  
SDO  
21 OE  
20  
19 OUT14  
18 OUT13  
17 OUT12  
GND  
SDI  
CLK  
LE  
OUT0  
OUT1  
OUT2  
OUT3  
OUT4  
1
2
3
4
5
6
7
8
9
VDD  
Ground terminal for control logic and current  
sink  
1
GND  
22  
OUT15  
2
3
SDI  
Serial-data input to the shift register  
Clock input terminal for data shift on rising  
edge  
CLK  
OUT11  
OUT10  
OUT9  
16  
15  
14  
13  
OUT5 10  
OUT6 11  
OUT7  
Data strobe input terminal  
12  
OUT8  
Serial data is transferred to the output latch  
when LE is high. The data is latched when  
LE goes low.  
4
LE  
OUT0 ~OUT15  
OE  
MBI5024 GF\GP  
5~20  
21  
Constant current output terminals  
Output enable terminal  
OUT14  
OUT15  
OE  
SDO  
R-EXT  
VDD  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
OUT13  
OUT12  
OUT11  
OUT10  
OUT9  
OUT8  
OUT7  
OUT6  
OUT5  
OUT4  
OUT3  
OUT2  
1
2
3
4
5
6
7
8
9
When (active) low, the output drivers are  
enabled; when high, all output drivers are  
turned OFF (blanked).  
GND  
SDI  
CLK  
LE  
OUT0 11  
OUT1  
Serial-data output to the following SDI of  
next driver IC. SDO signal change on rising  
edge of CLK.  
10  
22  
SDO  
12  
Input terminal used to connect an external  
resistor for setting up output current for all  
output channels  
MBI5024 GPA  
23  
24  
R-EXT  
VDD  
3.3V/5V supply voltage terminal  
April 2008, VA.02  
- 2 -  
MBI5024  
Equivalent Circuits of Inputs and Outputs  
LE terminal  
terminal  
OE  
VDD  
VDD  
IN  
IN  
CLK, SDI terminal  
SDO terminal  
VDD  
VDD  
OUT  
IN  
April 2008, VA.02  
- 3 -  
MBI5024  
Timing Diagram  
N = 0  
1
3
4
5
6
7
8
9
10 11  
12  
13  
14 15  
CLK  
SDI  
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0  
LE  
OE  
D0  
OFF  
ON  
OUT0  
OUT1  
OFF  
ON  
D1  
D2  
OFF  
ON  
OUT2  
OUT3  
OFF  
ON  
OFF  
ON  
OUT15  
SDO  
D15  
D15  
: dont care  
Truth Table  
CLK  
LE  
H
L
SDI  
Dn  
SDO  
Dn-15  
Dn-14  
Dn-13  
Dn-13  
Dn-13  
OE  
L
OUT0OUT 7OUT15  
Dn .. Dn - 7 .Dn - 15  
L
Dn+1  
Dn+2  
Dn+3  
Dn+4  
No Change  
H
X
L
Dn + 2 .Dn - 5 .Dn - 13  
L
Dn + 2 .Dn - 5 .Dn - 13  
X
H
Off  
April 2008, VA.02  
- 4 -  
MBI5024  
Maximum Ratings  
Characteristic  
Symbol  
VDD  
Rating  
0~7.0  
Unit  
V
Supply Voltage  
Input Voltage  
VIN  
-0.4~VDD+0.4  
+90  
V
Output Current  
IOUT  
mA  
V
Sustaining Voltage at OUT Port  
GND Terminal Current  
VDS  
-0.5~+17.0  
+1000  
IGND  
mA  
GFtype  
GPtype  
GPAtype  
GFtype  
GPtype  
GPAtype  
2.35  
Power Dissipation  
(On PCB, Ta=25°C)  
PD  
W
1.76  
1.76  
53.28  
Thermal Resistance  
(On PCB, Ta=25°C)  
Rth(j-a)  
°C/W  
70.90  
70.90  
Operating Temperature  
Storage Temperature  
Topr  
Tstg  
-40~+85  
-55~+150  
°C  
°C  
April 2008, VA.02  
- 5 -  
MBI5024  
Electrical Characteristics (VDD= 5.0V)  
Characteristics  
Supply Voltage  
Symbol  
Condition  
Min.  
Typ.  
Max.  
Unit  
VDD  
-
4.5  
5.0  
5.5  
V
Sustaining Voltage at OUT  
Ports  
VDS  
IOUT  
-
-
-
17.0  
45  
V
OUT0 ~OUT15  
Refer to Test Circuit for  
Electrical Characteristics  
3
mA  
Output Current  
IOH  
SDO  
-
-
-1.0  
1.0  
mA  
mA  
V
IOL  
SDO  
-
-
H level  
Input Voltage  
VIH  
VIL  
Ta =-40~85ºC  
Ta =-40~85ºC  
VDS=17.0V  
IOL=+1.0mA  
IOH=-1.0mA  
0.7*VDD  
-
VDD  
0.3*VDD  
0.5  
L
l
e
v
e
l
GND  
-
V
Output Leakage Current  
IOH  
-
-
-
-
μA  
V
VOL  
VOH  
IOUT1  
0.4  
SDO  
Output Voltage  
4.6  
-
-
-
V
Output Current 1  
VDS=1.0V  
Rext=6000  
3.1  
-
mA  
IOL=3.1mA  
VDS=1.0V  
dIOUT1  
IOUT2  
Rext=6000  
Rext=720  
Rext=720  
-
-
-
±1.5  
25.8  
±1.5  
±2.5  
-
%
mA  
%
Current Skew  
Output Current 2  
VDS=1.0V  
IOL=25.8mA  
VDS=1.0V  
dIOUT2  
±
2
.
0
Current Skew  
Output Current vs.  
Output Voltage Regulation  
Output Current vs.  
Supply Voltage Regulation  
%/dVDS  
%/dVDD  
VDS within 1.0V and 3.0V  
VDD within 4.5V and 5.5V  
-
-
±
0
.
1
-
%/V  
%/V  
-
±
1
.
0
Pull-up Resistor  
RIN(up)  
250  
500  
500  
2.4  
4.3  
5.7  
4.6  
6.0  
800  
800  
5.0  
7.0  
9.0  
8.5  
9.5  
KΩ  
KΩ  
OE  
Pull-down Resistor  
RIN(down)  
IDD(off) 1  
IDD(off) 2  
IDD(off) 3  
IDD(on) 1  
IDD(on) 2  
250  
LE  
-
-
-
-
-
Rext=Open, OUT0 ~ OUT15 =Off  
Rext=1860Ω, OUT0 ~OUT15 =Off  
Rext=744Ω, OUT0 ~ OUT15 =Off  
Rext=1860Ω, OUT0 ~OUT15 =On  
Rext=744Ω, OUT0 ~ OUT15 =On  
OFF  
Supply  
Current  
mA  
O
N
April 2008, VA.02  
- 6 -  
MBI5024  
Electrical Characteristics (VDD= 3.3V)  
Characteristics  
Supply Voltage  
Symbol  
Condition  
Min.  
Typ.  
Max.  
Unit  
VDD  
-
3.0  
3.3  
4.5  
V
Sustaining Voltage at OUT  
Ports  
VDS  
IOUT  
-
-
-
17.0  
30  
V
OUT0 ~ OUT15  
Refer to Test Circuit for  
Electrical Characteristics  
3
mA  
Output Current  
IOH  
SDO  
-
-
-1.0  
1.0  
mA  
mA  
V
IOL  
SDO  
-
-
H level  
Input Voltage  
VIH  
VIL  
Ta=-40~85ºC  
Ta=-40~85ºC  
VDS=17.0V  
IOL=+1.0mA  
IOH=-1.0mA  
0.7*VDD  
-
VDD  
0.3*VDD  
0.5  
L
l
e
v
e
l
GND  
-
V
Output Leakage Current  
IOH  
-
-
-
-
μA  
V
VOL  
VOH  
IOUT1  
0.4  
SDO  
Output Voltage  
2.9  
-
-
-
V
Output Current 1  
VDS=1.0V  
Rext=6000  
3.1  
-
mA  
IOL=3.1mA  
VDS=1.0V  
dIOUT1  
IOUT2  
Rext=6000  
Rext=720  
Rext=720  
-
-
-
±1.5  
25.8  
±1.5  
±2.5  
-
%
mA  
%
Current Skew  
Output Current 2  
VDS=1.0V  
IOL=25.8mA  
VDS=1.0V  
dIOUT2  
±
2
.
0
Current Skew  
Output Current vs.  
Output Voltage Regulation  
Output Current vs.  
Supply Voltage Regulation  
%/dVDS  
%/dVDD  
VDS within 1.0V and 3.0V  
VDD within 3.0V and 4.5V  
-
-
±
0
.
1
-
%/V  
%/V  
-
±
1
.
0
Pull-up Resistor  
RIN(up)  
250  
500  
500  
1.8  
4.0  
5.2  
4.5  
5.5  
800  
800  
5.0  
7.0  
8.5  
7.0  
8.5  
KΩ  
KΩ  
OE  
Pull-down Resistor  
RIN(down)  
IDD(off) 1  
IDD(off) 2  
IDD(off) 3  
IDD(on) 1  
IDD(on) 2  
250  
LE  
-
-
-
-
-
Rext=Open, OUT0 ~ OUT15 =Off  
Rext=6200Ω, OUT0 ~OUT15 =Off  
Rext=744Ω, OUT0 ~ OUT15 =Off  
Rext=6200Ω, OUT0 ~OUT15 =On  
Rext=744Ω, OUT0 ~ OUT15 =On  
OFF  
Supply  
Current  
mA  
O
N
Test Circuit for Electrical Characteristics  
IDD  
VDD  
IOUT  
VDD  
OUT0  
OE  
.
.
.
.
IIH,IIL  
VDS  
CLK  
LE  
OUT15  
SDI  
SDO  
GND  
R -EXT  
VIH,VIL  
Iref  
April 2008, VA.02  
- 7 -  
MBI5024  
Switching Characteristics (VDD= 5.0V)  
Characteristics  
CLK- OUT2n  
Symbol  
Condition  
Min.  
Typ.  
Max.  
Unit  
-
-
-
-
-
-
-
-
-
-
-
-
-
50  
35  
50  
35  
50  
35  
20  
90  
75  
90  
75  
90  
75  
70  
55  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tpLH1  
CLK- OUT2n + 1  
LE- OUT2n  
70  
tpLH2  
Propagation Delay Time  
55  
LE- OUT2n + 1  
OE -OUT2n  
(L to H)  
70  
tpLH3  
tpLH  
55  
OE -OUT2n + 1  
CLK-SDO  
40  
110  
95  
CLK- OUT2n  
CLK- OUT2n + 1  
LE- OUT2n  
tpHL1  
110  
95  
tpHL2  
Propagation Delay Time  
LE- OUT2n + 1  
OE -OUT2n  
(H to L)  
VDD=5.0 V  
VDS=1.0 V  
VIH=VDD  
VIL=GND  
Rext=930  
VL=4.5 V  
RL=162  
CL=10 pF  
110  
95  
tpHL3  
OE -OUT2n + 1  
CLK-SDO  
-
20  
20  
70  
30  
5
20  
40  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tpHL  
CLK  
LE  
tw(CLK)  
tw(L)  
-
-
-
-
Pulse Width  
tw(OE)  
100  
-
-
OE  
Hold Time for LE  
-
t
t
h(L)  
Setup Time for LE  
Hold Time for SDI  
Setup Time for SDI  
Maximum CLK Rise Time  
Maximum CLK Fall Time  
SDO Rise Time  
-
-
su(L)  
th(D)  
tsu(D)  
tr  
5
-
-
3
-
-
-
-
500  
-
-
500  
tf  
-
10  
10  
40  
55  
-
-
-
-
tr,SDO  
tf,SDO  
tor  
SDO Fall Time  
-
Output Rise Time of Output Ports  
Output Fall Time of Output Ports  
-
-
tof  
* Among output channels exist 15ns delay time between odd number OUT2n + 1 (e.g.:Bit1/Bit3/Bit5)and even  
number OUT2n (ex: Bit0/Bit2/Bit4). MBI5024 has a built-in staggered circuit to perform delay mechanism, by  
which the even and odd output ports will be turned on at a different time so that the instant current from the power  
line will be lowered.  
April 2008, VA.02  
- 8 -  
MBI5024  
Switching Characteristics (VDD= 3.3V)  
Characteristics  
Symbol  
Condition  
Min.  
Typ.  
Max.  
Unit  
-
-
-
-
-
-
-
-
-
-
-
-
-
50  
35  
70  
55  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
CLK- OUT2n  
tpLH1  
CLK- OUT2n + 1  
LE- OUT2n  
50  
70  
tpLH2  
Propagation Delay Time  
(L to H)  
35  
55  
LE- OUT2n + 1  
OE -OUT2n  
50  
70  
tpLH3  
tpLH  
35  
55  
OE -OUT2n + 1  
CLK-SDO  
20  
40  
115  
100  
115  
100  
105  
90  
135  
120  
135  
120  
125  
110  
CLK- OUT2n  
CLK- OUT2n + 1  
LE- OUT2n  
tpHL1  
tpHL2  
Propagation Delay Time  
(H to L)  
LE- OUT2n + 1  
OE -OUT2n  
VDD=3.3 V  
VDS=1.0 V  
VIH=VDD  
VIL=GND  
Rext=930  
VL=4.5 V  
RL=162  
CL=10 pF  
tpHL3  
OE -OUT2n + 1  
CLK-SDO  
-
20  
20  
100  
30  
5
20  
40  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tpHL  
CLK  
LE  
tw(CLK)  
tw(L)  
-
-
-
-
Pulse Width  
tw(OE)  
130  
-
-
OE  
Hold Time for LE  
-
t
t
h(L)  
Setup Time for LE  
Hold Time for SDI  
Setup Time for SDI  
Maximum CLK Rise Time  
Maximum CLK Fall Time  
SDO Rise Time  
-
-
su(L)  
th(D)  
tsu(D)  
tr  
5
-
-
3
-
-
-
-
500  
-
-
500  
tf  
-
10  
10  
40  
60  
-
-
-
-
tr,SDO  
tf,SDO  
tor  
SDO Fall Time  
-
Output Rise Time of Output Ports  
Output Fall Time of Output Ports  
-
-
tof  
Test Circuit for Switching Characteristics  
IDD  
VDD  
IOUT  
VDD  
VIH,VIL  
OUT0  
OE  
.
.
CLK  
Function  
.
LE  
OUT15  
Generator  
RL  
CL  
SDI  
SDO  
GND  
R -EXT  
Logic Input  
Waveform  
VL  
5V  
0V  
CL  
Iref  
tr=tf=10ns  
April 2008, VA.02  
- 9 -  
MBI5024  
Timing Waveform  
tW(CLK)  
50%  
50%  
50%  
CLK  
SDI  
tsu(D)  
th(D)  
50%  
50%  
50%  
SDO  
LE  
tW(L)  
tpLH, tpHL  
50%  
50%  
th(L)  
tsu(L)  
LOW = OUTPUTS ENABLED  
OE  
HIGH = OUTPUT OFF  
LOW = OUTPUT ON  
50%  
OUTn  
tpLH1, tpHL1  
tpLH2, tpHL2  
tW(OE)  
50%  
OE  
50%  
tpLH3  
tpHL3  
90%  
50%  
%
90%  
50%  
10%  
OUTn  
tor  
tof  
April 2008, VA.02  
- 10 -  
MBI5024  
Application Information  
Constant Current  
To design LED displays, MBI5024 provides nearly no variations in current from channel to channel and from IC to  
IC. This can be achieved by:  
1) The maximum current variation between channels is less than ±2.5%, and that between ICs is less than ±3%.  
2) In addition, the current characteristic of output stage is flat and users can refer to the figure as shown below. The  
output current can be kept constant regardless of the variations of LED forward voltages (VF). This performs as  
a perfection of load regulation.  
MBI5024 IOUT vs. VDS at Various Rext ,VDD=5.0V  
IOUT(mA)  
50  
40  
30  
20  
10  
0
0
0.5  
1
1.5  
2
2.5  
3
VDS(V)  
MBI5024 IOUT vs. VDS at Various Rext,VDD=3.3V  
IOUT(mA)  
40  
30  
20  
10  
0
0
0.5  
1
1.5  
2
2.5  
3
VDS(V)  
April 2008, VA.02  
- 11 -  
MBI5024  
Adjusting Output Current  
The output current of each channel (IOUT) is set by an external resistor, Rext. The relationship between IOUT and Rext  
is shown in the following figure.  
Also, the output current can be calculated from the equation:  
VR-EXT=1.24VIOUT=VR-EXT *(1/Rext)x15; Rext =(VR-EXT/IOUT)x15  
MBI5024 Rext vs. IOUT  
IOUT(mA)  
50  
40  
30  
20  
10  
0
0
1000  
2000  
3000  
4000  
5000  
6000  
Rext(Ω)  
Where Rext is the resistance of the external resistor connected to R-EXT terminal and VR-EXT is the voltage of R-EXT  
terminal. The magnitude of current (as a function of Rext) is around 25mA at 744Ω and 10mA at 1860Ω.  
April 2008, VA.02  
- 12 -  
MBI5024  
Soldering Process of Pb-free & GreenPackage*  
Macroblock has defined "Pb-Free & Green" to mean semiconductor products that are compatible with the current  
RoHS requirements and selected 100% pure tin (Sn) to provide forward and backward compatibility with both the  
current industry-standard SnPb-based soldering processes and higher-temperature Pb-free processes. Pure tin is  
widely accepted by customers and suppliers of electronic devices in Europe, Asia and the US as the lead-free  
surface finish of choice to replace tin-lead. Also, it is backward compatible to standard 215ºC to 240ºC reflow  
processes which adopt tin/lead (SnPb) solder paste. However, in the whole Pb-free soldering processes and  
materials, 100% pure tin (Sn), will all require up to 260oC for proper soldering on boards, referring to J-STD-020C  
as shown below.  
Temperature ()  
300  
+0℃  
255℃  
240℃  
260  
-5℃  
℃±5℃  
250  
200  
150  
100  
245  
217  
30s max  
Ramp-down  
Average ramp-up  
rate= 0.7/s  
6
/s (max)  
100s max  
Peak Temperature 245~260< 10s  
Average ramp-up  
rate = 0.4/s  
Average ramp-up  
rate= 3.3/s  
50  
25  
0
0
50  
100  
150  
200  
250  
300  
Time (sec)  
----Maximum peak temperature  
Recommended reflow profile  
Acc. J-STD-020C  
*Note1: For details, please refer to Macroblocks Policy on Pb-free & Green Package.  
April 2008, VA.02  
- 13 -  
MBI5024  
Package Power Dissipation (PD)  
The maximum allowable package power dissipation is determined as PD(max)=(TjTa)/Rth(j-a). When 16 output  
channels are turned on simultaneously, the actual package power dissipation is  
PD(act)=(IDDxVDD)+(IOUTxDutyxVDSx16). Therefore, to keep PD(act)PD(max), the allowable maximum output current  
as a function of duty cycle is:  
IOUT={[(TjTa)/Rth(j-a) ](IDDxVDD)}/VDS /Duty/16, where Tj=150°C.  
IOUT vs. Duty Cycle@ Rth(j-a)=70.90 /W  
IOUT vs. Duty Cycle@ Rth(j-a)=53.28 /W  
Max. IOUT(mA)  
50  
Max. IOUT(mA)  
50  
40  
30  
20  
10  
0
40  
30  
20  
10  
0
VDS=1V@Ta=25  
VDS=1V@Ta=85℃  
VDS=2V@Ta=25  
VDS=2V@Ta=85℃  
VDS=1V@Ta=25  
VDS=1V@Ta=85  
VDS=2V@Ta=25  
VDS=2V@Ta=85  
10% 20% 30% 40% 50% 60% 70% 80% 90% 100%  
10% 20% 30% 40% 50% 60% 70% 80% 90% 100%  
Duty Cycle  
Duty Cycle  
MBI5024GF  
MBI5024GP/GPA  
Condition: IOUT=50mA, 16 output channels  
Device Type  
GF  
Rth(j-a) (°C/W)  
53.28  
GP/GPA  
70.90  
The maximum power dissipation, PD(max)=(TjTa)/Rth(j-a), decreases as the ambient temperature increases.  
MBI5024 Maximum Power Dissipation at Various Ambient Temperature  
Power Dissipation (W)  
4.0  
3.5  
GF Type: Rth=53.28  
GP Type: Rth=70.90  
GPA Type: Rth=70.90  
/W  
/W  
/W  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
Safe Operation Area  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
Ambient Temperature (°C)  
April 2008, VA.02  
- 14 -  
MBI5024  
Load Supply Voltage (VLED)  
MBI5024 are designed to operate with VDS ranging from 0.4V to 0.8V (depending on IOUT=3~45mA) considering the  
package power dissipating limits. VDS may be higher enough to make PD(act) >PD(max) when VLED=5V and  
VDS=VLEDVF, in which VLED is the load supply voltage. In this case, it is recommended to use the lowest possible  
supply voltage or to set an external voltage reducer, VDROP  
A voltage reducer lets VDS=(VLEDVF)VDROP  
Resistors or Zener diode can be used in the applications as shown in the following figures.  
.
.
Voltage Supply  
Voltage Supply  
(VLED  
)
VLED  
VDrop  
VDrop  
VF  
VDS  
VF  
VDS  
MBI5024  
MBI5024  
Switching Noise Reduction  
LED driver ICs are frequently used in switch-mode applications which always behave with switching noise due to  
the parasitic inductance on PCB. To eliminate switching noise, refer to Application Note for 8-bit and 16-bit LED  
Drivers- Overshoot.  
April 2008, VA.02  
- 15 -  
MBI5024  
Package Outline  
MBI5024GF Outline Drawing  
MBI5024GP \ GPA Outline Drawing  
Note: The unit for the outline drawing is mm.  
April 2008, VA.02  
- 16 -  
MBI5024  
Product Top-mark Information  
The first row of printing  
Part number  
ID number  
MBIXXXX  ○○  
The second row of printing  
Or  
XXXXXXXX  
MBIXXXX    
Manufacture  
Device Version Code  
Code  
Package Code  
Product No.  
Process Code  
G: Green and Pb-free  
Product Revision History  
Datasheet version  
Device version code  
Refer to the Official Datasheet  
MBI5024 Datasheet- VA.02-CN  
B
*MBI5024 is ONLY sold in China. This English document is an unofficial supplement of MBI5024 Datasheet-  
VA.02-CN. For any change of MBI5024 in the future, Macroblock will only make changes on the official MBI5024  
Datasheet.  
Product Ordering Information  
Part Number  
Pb-free & Green”  
Package Type  
Weight (g)  
MBI5024GF  
MBI5024GP  
MBI5024GPA  
SOP24L-300-1.00  
SSOP24L-150-0.64  
SSOP24L-150-0.64  
0.28  
0.11  
0.11  
April 2008, VA.02  
- 17 -  
MBI5024  
Disclaimer  
Macroblock reserves the right to make changes, corrections, modifications, and improvements to their products and  
documents or discontinue any product or service without notice. Customers are advised to consult their sales  
representative for the latest product information before ordering. All products are sold subject to the terms and  
conditions supplied at the time of order acknowledgement, including those pertaining to warranty, patent  
infringement, and limitation of liability.  
Macroblocks products are not designed to be used as components in device intended to support or sustain life or  
in military applications. Use of Macroblocks products in components intended for surgical implant into the body, or  
other applications in which failure of Macroblocks products could create a situation where personal death or injury  
may occur, is not authorized without the express written approval of the Managing Director of Macroblock.  
Macroblock will not be held liable for any damages or claims resulting from the use of its products in medical and  
military applications.  
All text, images, logos and information contained on this document is the intellectual property of Macroblock.  
Unauthorized reproduction, duplication, extraction, use or disclosure of the above mentioned intellectual property  
will be deemed as infringement.  
April 2008, VA.02  
- 18 -  

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