NID9N05.REV3.PDF [ETC]
NID9N05CL/D ;
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NID9N05CL
Power MOSFET
9 Amps, 52 Volts
N-Channel, Logic Level, Clamped
MOSFET w/ ESD Protection in a
DPAK Package
http://onsemi.com
Benefits
9 AMPERES
52 V CLAMPED
RDS(on) = 90 mW (Typ.)
• High Energy Capability for Inductive Loads
• Low Switching Noise Generation
Features
Drain
(Pins 2, 4)
• Diode Clamp Between Gate and Source
• ESD Protection - HBM 5000 V
• Active Over-Voltage Gate to Drain Clamp
M
PWR
Overvoltage
Protection
• Scalable to Lower or Higher R
DS(on)
Gate
(Pin 1)
• Internal Series Gate Resistance
R
G
Applications
ESD Protection
• Automotive and Industrial Markets:
Solenoid Drivers, Lamp Drivers, Small Motor Drivers
Source
(Pin 3)
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Symbol
Value
52-59
±12
Unit
Vdc
Vdc
A
Drain-to-Source Voltage Internally Clamped
Gate-to-Source Voltage - Continuous
V
DSS
MARKING
DIAGRAM
V
GS
Drain Current - Continuous @ T = 25°C
Drain Current - Single Pulse (tp = 10 ms)
I
9.0
35
A
D
YWW
1
3
I
DM
2
X
4
DPAK
CASE 369A
STYLE 2
Total Power Dissipation @ T = 25°C
P
D
28.8
W
A
D9N05CL
Operating and Storage Temperature Range
T , T
-55 to
175
°C
J
stg
1
2
3
4
= Gate
D9N05CL = Device Code
= Drain
= Source
= Drain
Single Pulse Drain-to-Source Avalanche En-
E
AS
160
mJ
Y
WW
= Year
= Work Week
ergy - Starting T = 125°C
J
(V = 50 V, I
DD
= 1.5 A, V = 10 V, R =
D(pk)
GS G
25 W)
Thermal Resistance - Junction-to-Case
- Junction-to-Ambient (Note 1)
- Junction-to-Ambient (Note 2)
R
R
R
5.2
72
100
°C/W
°C
q
JC
JA
JA
q
q
ORDERING INFORMATION
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from Case for 10 Sec.
T
260
Device
NID9N05CLT4
NID9N05CL
Package
DPAK
Shipping
L
2500/Tape & Reel
75 Units/Rail
2
1. When surface mounted to an FR4 board using 1″ pad size, (Cu area 1.127 in )
2. When surface mounted to an FR4 board using minimum recommended pad
DPAK
2
size, (Cu area 0.412 in )
Semiconductor Components Industries, LLC, 2003
1
Publication Order Number:
March, 2003 - Rev. 3
NID9N05CL/D
NID9N05CL
MOSFET ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Characteristic
OFF CHARACTERISTICS
Symbol
Min
Typ
Max
Unit
Drain-to-Source Breakdown Voltage (Note 3)
V
(BR)DSS
(V = 0 Vdc, I = 1.0 mAdc)
52
-
55
-10
59
-
Vdc
mV/°C
GS
D
Temperature Coefficient (Negative)
Zero Gate Voltage Drain Current
I
mAdc
DSS
(V = 40 Vdc, V = 0 Vdc)
-
-
-
-
10
25
DS
GS
(V = 40 Vdc, V = 0 Vdc, T = 125°C)
DS
GS
J
Gate-Body Leakage Current
(V = ±8 Vdc, V = 0 Vdc)
I
mAdc
GSS
-
-
-
±10
-
GS
DS
(V = ±14 Vdc, V = 0 Vdc)
±22
GS
DS
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
V
GS(th)
(V = V , I = 100 mAdc)
1.3
-
1.75
-4.5
2.5
-
Vdc
mV/°C
DS
GS
D
Threshold Temperature Coefficient (Negative)
Static Drain-to-Source On-Resistance (Note 3)
R
mW
DS(on)
(V = 4.0 Vdc, I = 1.5 Adc)
-
-
-
70
153
175
-
181
364
1210
-
GS
D
(V = 3.5 Vdc, I = 0.6 Adc)
GS
D
(V = 3.0 Vdc, I = 0.2 Adc)
GS
D
(V = 12 Vdc, I = 9.0 Adc)
90
GS
D
(V = 12 Vdc, I = 12 Adc)
67
95
-
GS
D
Forward Transconductance (Note 3) (V = 15 Vdc, I = 9.0 Adc)
g
FS
-
24
-
Mhos
pF
DS
D
DYNAMIC CHARACTERISTICS
Input Capacitance
C
-
-
-
-
-
-
155
60
250
iss
(V = 40 Vdc, V = 0 V,
DS
GS
Output Capacitance
Transfer Capacitance
Input Capacitance
C
100
oss
f = 10 kHz)
C
25
40
-
rss
C
175
70
pF
iss
(V = 25 Vdc, V = 0 V,
DS
GS
Output Capacitance
Transfer Capacitance
C
-
oss
f = 10 kHz)
C
30
-
rss
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NID9N05CL
MOSFET ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Characteristic
SWITCHING CHARACTERISTICS (Note 4)
Turn-On Delay Time
Symbol
Min
Typ
Max
Unit
t
t
t
t
t
t
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
130
500
1300
1150
200
500
2500
1800
120
275
1600
1100
4.5
200
ns
d(on)
Rise Time
t
r
750
(V = 10 Vdc, V = 40 Vdc,
GS
DD
I
D
= 9.0 Adc, R = 9.0 W)
G
Turn-Of f Delay Time
Fall Time
2000
d(off)
t
f
1850
Turn-On Delay Time
Rise Time
-
ns
ns
d(on)
t
r
-
(V = 10 Vdc, V = 15 Vdc,
GS
DD
I
D
= 1.5 Adc, R = 2 kW)
G
Turn-Of f Delay Time
Fall Time
-
d(off)
t
f
-
Turn-On Delay Time
Rise Time
-
d(on)
t
r
-
(V = 10 Vdc, V = 15 Vdc,
GS
DD
I
D
= 1.5 Adc, R = 50 W)
G
Turn-Of f Delay Time
Fall Time
-
d(off)
t
f
-
Gate Charge
Q
T
Q
1
Q
2
Q
T
Q
1
Q
2
7.0
nC
nC
(V = 4.5 Vdc, V = 40 Vdc,
GS
I
DS
1.2
-
-
-
-
-
= 9.0 Adc) (Note 3)
D
2.7
Gate Charge
3.6
(V = 4.5 Vdc, V = 15 Vdc,
GS
I
DS
1.0
= 1.5 Adc) (Note 3)
D
2.0
SOURCE-DRAIN DIODE CHARACTERISTICS
Forward On-Voltage
(I = 4.5 Adc, V = 0 Vdc) (Note 3)
V
SD
-
-
-
0.86
0.845
0.725
1.2
-
-
Vdc
ns
S
GS
(I = 4.0 Adc, V = 0 Vdc)
S
GS
(I = 4.5 Adc, V = 0 Vdc, T = 125°C)
S
GS
J
Reverse Recovery Time
t
rr
-
-
-
-
700
200
500
6.5
-
-
-
-
(I = 4.5 Adc, V = 0 Vdc,
S
GS
t
a
dI /dt = 100 A/ms) (Note 3)
s
t
b
Reverse Recovery Stored Charge
ESD CHARACTERISTICS
Q
mC
RR
Electro-Static Discharge Capability
Human Body Model (HBM)
Machine Model (MM)
ESD
5000
500
-
-
-
-
V
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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3
NID9N05CL
18
16
14
12
10
8
18
16
6 V
V
= 10 V
GS
T
= -55°C
T = 25°C
J
J
8 V
14
6.5 V
T = 25°C
5 V
T = 100°C
J
J
12
4.6 V
10
4.2 V
8
4 V
3.8 V
6
6
4
3.2 V
4
3.4 V
2.8 V
2
0
2
0
V
DS
≥ 10 V
0
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
V
GS
, GATE-T O-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.4
0.35
0.3
0.5
0.4
I
= 4.5 A
D
T = 25°C
J
T = 25°C
V
GS
= 4 V
J
0.25
0.2
0.3
0.2
0.1
0
0.15
0.1
V
GS
= 12 V
0.05
0
2
4
6
8
10
12
0
2
4
6
8
10
12
14
16
18
V
GS
, GATE-T O-SOURCE VOLTAGE (VOLTS)
I , DRAIN CURRENT (AMPS)
D
Figure 3. On-Resistance versus
Gate-to-Source Voltage
Figure 4. On-Resistance versus Drain Current
and Gate Voltage
2.5
1,000,000
100,000
10,000
I
V
= 9 A
D
V
GS
= 0 V
= 12 V
GS
2
T = 150°C
J
1.5
T = 100°C
J
1
1000
100
0.5
-50 -25
0
25
50
75 100 125 150 175
20
25
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
DS
30
35
40
45
50
T , JUNCTION TEMPERATURE (°C)
J
V
Figure 5. On-Resistance Variation with
Temperature
Figure 6. Drain-to-Source Leakage Current
versus Voltage
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4
NID9N05CL
500
400
300
200
Frequency = 10 kHz
T = 25°C
J
V
GS
= 0 V
C
iss
C
oss
100
0
C
rss
0
10
20
30
40
50
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
5
4
3
2
50
40
10,000
1000
100
Q
T
V
= 40 V
= 9 A
= 10 V
DD
I
D
V
V
GS
GS
Q
Q
gs
gd
30
20
t
d(off)
t
f
t
r
I
= 9 A
T = 25°C
D
J
V
DS
10
0
1
0
t
d(on)
0
1
2
3
4
5
1
10
100
Q , TOTAL GATE CHARGE (nC)
g
R , GATE RESISTANCE (OHMS)
G
Figure 8. Gate-To-Source and Drain-To-Source
Voltage versus Total Charge
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN-T O-SOURCE DIODE CHARACTERISTICS
10
V
GS
= 0 V
T = 25°C
J
8
6
4
2
0
0.4
0.6
0.8
1.0
1.2
V
SD
, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
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5
NID9N05CL
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non-linearly with an
increase of peak current in avalanche and peak junction
temperature.
the maximum simultaneous drain-to-source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (T ) of 25°C.
C
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance -
General Data and Its Use.”
Switching between the off-state and the on-state may
traverse any load line provided neither rated peak current
Although many E- FETs can withstand the stress of
drain- to- source avalanche at currents up to rated pulsed
current (I ), the energy rating is specified at rated
DM
(I ) nor rated voltage (V ) is exceeded and the
continuous current (I ), in accordance with industry custom.
DM
DSS
D
transition time (t ,t ) do not exceed 10 µs. In addition the total
power averaged over a complete switching cycle must not
The energy rating must be derated for temperature as shown
in the accompanying graph (Figure 12). Maximum energy at
r f
exceed (T
- T )/(R ).
currents below rated continuous I can safely be assumed to
J(MAX)
C
θJC
D
A Power MOSFET designated E-FET can be safely used
in switching circuits with unclamped inductive loads. For
equal the values indicated.
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6
NID9N05CL
SAFE OPERATING AREA
100
10
V
= 12 V
GS
10 µs
100 µs
SINGLE PULSE
T
C
= 25°C
1 ms
dc
10 ms
1
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1
1
10
100
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
10
D = 0.5
0.2
0.1
P
(pk)
1
R
(t) = r(t) R
θ
JC
θ
JC
0.05
0.01
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
t
1
1
t
2
T
J(pk)
- T = P
R
θ
(t)
JC
C
(pk)
SINGLE PULSE
0.0001
DUTY CYCLE, D = t /t
1
2
001
0.00001
0.001
0.01
0.1
1
10
t, TIME (s)
Figure 12. Thermal Response
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7
NID9N05CL
PACKAGE DIMENSIONS
DPAK
CASE 369A-13
ISSUE AB
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
SEATING
PLANE
-T-
2. CONTROLLING DIMENSION: INCH.
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
E
V
MIN
5.97
6.35
2.19
0.69
0.84
0.94
MAX
6.35
6.73
2.38
0.88
1.01
1.19
A
B
C
D
E
F
0.235
0.250
0.086
0.027
0.033
0.037
0.250
0.265
0.094
0.035
0.040
0.047
4
2
Z
A
K
S
1
3
G
H
J
0.180 BSC
4.58 BSC
U
0.034
0.018
0.102
0.040
0.023
0.114
0.87
0.46
2.60
1.01
0.58
2.89
K
L
0.090 BSC
2.29 BSC
F
J
R
S
U
V
Z
0.175
0.020
0.020
0.030
0.138
0.215
0.050
−−−
4.45
0.51
0.51
0.77
3.51
5.46
1.27
−−−
L
H
0.050
−−−
1.27
−−−
D 2 PL
M
G
STYLE 2:
PIN 1. GATE
2. DRAIN
0.13 (0.005)
T
3. SOURCE
4. DRAIN
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NID9N05CL/D
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