NP32N055HHE [ETC]
TRANSISTOR | MOSFET | N-CHANNEL | 55V V(BR)DSS | 32A I(D) | TO-251AA ; 晶体管| MOSFET | N沟道| 55V V( BR ) DSS | 32A I( D) | TO- 251AA\n型号: | NP32N055HHE |
厂家: | ETC |
描述: | TRANSISTOR | MOSFET | N-CHANNEL | 55V V(BR)DSS | 32A I(D) | TO-251AA
|
文件: | 总8页 (文件大小:409K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP32N055HHE, NP32N055IHE
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
ORDERING INFORMATION
These products are N-Channel MOS Field Effect
PART NUMBER
PACKAGE
TO-251
Transistors designed for high current switching applications.
NP32N055HHE
NP32N055IHE
TO-252
FEATURES
• Channel temperature 175 degree rated
• Super low on-state resistance
RDS(on) = 25 mΩ MAX. (VGS = 10 V, ID = 16 A)
• Low Ciss : Ciss = 1100 pF TYP.
• Built-in gate protection diode
(TO-251)
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Drain to Source Voltage
VDSS
VGSS
ID(DC)
ID(pulse)
PT
55
20
V
V
Gate to Source Voltage
Drain Current (DC)
32
100
1.2
66
A
Drain Current (Pulse) Note1
Total Power Dissipation (TA = 25 °C)
Total Power Dissipation (TC = 25 °C)
Single Avalanche Current Note2
Single Avalanche Energy Note2
Channel Temperature
A
W
W
(TO-252)
PT
IAS
26 / 21 / 7
6.7 / 44 / 49 mJ
175 °C
–55 to + 175 °C
A
EAS
Tch
Storage Temperature
Tstg
Notes 1. PW ≤ 10 µ s, Duty cycle ≤ 1 %
2. Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V → 0 V (See Figure 4.)
THERMAL RESISTANCE
Channel to Case
Rth(ch-C)
Rth(ch-A)
2.27
125
°C/W
°C/W
Channel to Ambient
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
The mark # shows major revised points.
Document No.
Date Published March 2001 NS CP(K)
Printed in Japan
D14155EJ3V0DS00 (3rd edition)
1999
©
NP32N055HHE, NP32N055IHE
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
Drain to Source On-state Resistance
Gate to Source Threshold Voltage
Forward Transfer Admittance
Drain Leakage Current
Gate to Source Leakage Current
Input Capacitance
SYMBOL
RDS(on)
VGS(th)
| yfs |
IDSS
TEST CONDITIONS
VGS = 10 V, ID = 16 A
MIN. TYP. MAX.
UNIT
mΩ
V
19
3.0
12
25
VDS = VGS, ID = 250 µA
VDS = 10 V, ID = 16 A
VDS = 55 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
VDS = 25 V
2.0
6
4.0
S
10
10
µA
µA
pF
pF
pF
ns
IGSS
Ciss
1100 1600
Output Capacitance
Coss
Crss
VGS = 0 V
180
95
16
11
29
10
21
6
270
170
35
Reverse Transfer Capacitance
Turn-on Delay Time
f = 1 MHz
td(on)
tr
td(off)
tf
ID = 16 A
Rise Time
VGS(on) = 10 V
VDD = 28 V
27
ns
Turn-off Delay Time
58
ns
Fall Time
RG = 1 Ω
24
ns
Total Gate Charge
QG
ID = 32 A
32
nC
nC
nC
V
Gate to Source Charge
Gate to Drain Charge
QGS
QGD
VF(S-D)
trr
VDD = 44 V
VGS = 10 V
8
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
IF = 32 A, VGS = 0 V
IF = 32 A, VGS = 0 V
di/dt = 100 A/µs
1.0
40
57
ns
Qrr
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
D.U.T.
V
V
GS
R
L
RG
= 25 Ω
90%
90%
V
GS
Wave Form
V
GS(on)
10%
90%
0
R
G
PG.
PG.
50 Ω
V
DD
V
DD
V
GS = 20→0V
DS
V
DS
V
0
GS
BVDSS
10% 10%
V
DS
Wave Form
0
I
AS
VDS
τ
I
D
t
d(on)
t
r
t
d(off)
tf
VDD
t
on
toff
τ = 1 µs
Duty Cycle ≤ 1 %
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
= 2 mA
I
G
RL
PG.
50 Ω
V
DD
2
Data Sheet D14155EJ3V0DS
NP32N055HHE, NP32N055IHE
TYPICAL CHARACTERISTICS (TA = 25 °C)
Figure2. TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
Figure1. DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
70
60
50
40
30
20
10
0
100
80
60
40
20
0
0
25 50 75 100 125 150 175 200
0
25 50 75 100 125 150 175 200
- Case Temperature - ˚C
TC - Case Temperature - ˚C
TC
#
Figure4. SINGLE AVALANCHE ENERGY
DERATING FACTOR
Figure3. FORWARD BIAS SAFE OPERATING AREA
1000
60
50
40
30
20
49 mJ
I
D(pulse)
1 ms
44 mJ
100
I
D(DC)
I
AS = 7 A
PowerDDiCssipation
Limited
21 A
26 A
10
1
10
0
6.7 mJ
T
C
= 25˚C
Single Pulse
0.1
0.1
1
10
100
25
50
75
100
125
150
175
V
DS
-
Drain to Source Voltage - V
Starting Tch - Starting Channel Temperature - ˚C
Figure5. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
Rth(ch-A) = 125 ˚C/W
100
10
Rth(ch-C) = 2.27 ˚C/W
1
0.1
0.01
Single Pulse
TC
= 25˚C
µ
10
1 m
10 m
100 m
1
10
100
1000
100
µ
PW - Pulse Width - s
3
Data Sheet D14155EJ3V0DS
NP32N055HHE, NP32N055IHE
Figure7. DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
Figure6. FORWARD TRANSFER CHARACTERISTICS
120
100
80
100
Pulsed
Pulsed
V
GS =10 V
10
T
A
= −55˚C
25˚C
75˚C
150˚C
175˚C
60
1
0.1
40
20
0
V
DS = 10 V
0.01
1
2
3
4
5
6
7
8
0
1.0
2.0
3.0
4.0
5.0 6.0
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
Figure9. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
Figure8. FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
100
40
Pulsed
30
10
T
A
= 175˚C
75˚C
I = 16 A
D
20
10
0
1
0.1
25˚C
−55˚C
0.01
0.01
0
0.1
1
10
100
2
4
6
8
10 12 14 16 18 20
VGS - Gate to Source Voltage - V
ID - Drain Current - A
Figure10. DRAIN TO SOURCE ON-STATE
Figure11. GATE TO SOURCE THRESHOLD VOLTAGE vs.
CHANNEL TEMPERATURE
RESISTANCE vs. DRAIN CURRENT
80
70
60
50
40
30
20
10
0
Pulsed
V
GµS
ID
D=S =25V0
A
4.0
3.0
2.0
V
GS = 10 V
1.0
0
0
1
10
100
−50
0
50
100
150
ID - Drain Current - A
Tch - Channel Temperature - ˚C
4
Data Sheet D14155EJ3V0DS
NP32N055HHE, NP32N055IHE
Figure13. SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
1000
100
Pulsed
40
VGS = 10 V
30
20
VGS = 10 V
10
VGS = 0 V
1
10
0
I
D
= 16 A
150
ch - Channel Temperature - ˚C
0.1
100
0
50
−50
0
0.5
1.0
1.5
T
VSD
- Source to Drain Voltage - V
Figure14. CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
Figure15. SWITCHING CHARACTERISTICS
1000
100
10000
V
GS = 0 V
f = 1 MHz
tf
C
iss
1000
td(off)
Coss
td(on)
tr
10
1
100
10
Crss
0.1
1
10
100
0.1
1
10
100
ID
- Drain Current - A
VDS - Drain to Source Voltage - V
Figure16. REVERSE RECOVERY TIME vs.
DRAIN CURRENT
Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS
80
16
14
12
10
8
1000
100
di/dt = 100 A/µs
GS = 0 V
V
60
V
DD = 44 V
28 V
11 V
V
GS
40
20
6
10
1
4
VDS
2
ID
= 32 A
28 32
0
0
4
8
12 16 20 24
- Gate Charge - nC
0.1
1.0
10
100
Q
G
IF
- Drain Current - A
5
Data Sheet D14155EJ3V0DS
NP32N055HHE, NP32N055IHE
PACKAGE DRAWINGS (Unit : mm)
1)TO-251 (MP-3)
2)TO-252 (MP-3Z)
2.3 0.2
6.5 0.2
5.0 0.2
0.5 0.1
2.3 0.2
6.5 0.2
5.0 0.2
0.5 0.1
1.1 0.2
1.1 0.2
0.9 MAX.
2.3 TYP.
0.8 MAX.
2.3 TYP.
+0.2
−0.1
+0.2
0.8 TYP.
0.5
0.5
−0.1
2.3 TYP.
2.3 TYP.
EQUIVALENT CIRCUIT
Drain
Body
Diode
Gate
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
6
Data Sheet D14155EJ3V0DS
NP32N055HHE, NP32N055IHE
[MEMO]
7
Data Sheet D14155EJ3V0DS
NP32N055HHE, NP32N055IHE
•
The information in this document is current as of March, 2001. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
•
•
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
third parties by or arising from the use of NEC semiconductor products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
patents, copyrights or other intellectual property rights of NEC or others.
•
•
•
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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