NTH089B3 [ETC]

Crystal Clock Oscillator; 晶体时钟振荡器


型号：	NTH089B3
厂家：	ETC
描述：	Crystal Clock Oscillator 晶体时钟振荡器振荡器晶体时钟
文件：	总3页 (文件大小：121K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SaRonix

Crystal Clock Oscillator

3.3V, LVCMOS / HCMOS, Tri-State

NTH / NCH Series

Technical Data

Frequency Range:

0.5 MHz to 106.25 MHz

Frequency Stability:

20, 25, 50 or 100 ꢀꢀm over all conditions: caliꢁration

tolerance, oꢀerating temꢀerature, inꢀut voltage change,

load change, 30 day aging, shock and viꢁration.

Temperature Range:

Oꢀerating:

Storage:

0 to +70°C or -40 to +85°C, See Part Numꢁering Guide

-55 to +125°C

Supply Voltage:

Recommended Oꢀerating:

3.3V 10ꢂ

Supply Current:

20mA max, 0.5 to 30 MHz

25mA max, 30+ to 50 MHz

30mA max, 50+ to 80 MHz

35mA max, 80+ to 106.25 MHz

ACTUAL SIZE

Description

Output Drive:

HCMOS

Symmetry:

45/55ꢂ max 0.5 to 70 MHz max

40/60ꢂ max @ 50ꢂ V

4ns max 0.5 to 50 MHz, 20ꢂ to 80ꢂ V

3ns max 50+ to 80 MHz

1.5ns max 80+ to 106.25 MHz

A crystal controlled, low current, low

jitter and high frequency oscillator with

ꢀrecise rise and fall times demanded in

networking aꢀꢀlications. The tri-state

function on the NTH enaꢁles the outꢀut

to go high imꢀedance. Device is ꢀack-

aged in a 14 or an 8-ꢀin DIP comꢀatiꢁle

resistance welded, all metal grounded

case to reduce EMI. True SMD DIL14

versions for IR reflow are availaꢁle, se-

lect oꢀtion "S" in ꢀart numꢁer ꢁuilder.

See seꢀarate data sheet for SMD ꢀackage

dimensions.

Rise and Fall Times:

Logic 0:

Logic 1:

Load:

10ꢂ V

90ꢂ V

max

min

50ꢀF, 0.5 to 50 MHz

30ꢀF, 50+ to 70 MHz

15ꢀF, 70+ to 106.25 MHz

8ꢀs max

Period Jitter RMS:

Mechanical:

Shock:

Solderaꢁility:

MIL-STD-883, Method 2002, Condition B

MIL-STD-883, Method 2003

Terminal Strength:

Viꢁration:

Solvent Resistance:

Resistance to Soldering Heat:

MIL-STD-883, Method 2004, Conditions A & C

MIL-STD-883, Method 2007, Condition A

MIL-STD-202, Method 215

Applications & Features

• ADSL, DSL

MIL-STD-202, Method 210, Condition A, B or C

• DS3, ES3, E1, STS-1, T1

• Ethernet Switch, Gigaꢁit Ethernet

• Fiꢁre Channel Controller

• MPEG

• Network Processors

• Voice Over Packet

Environmental:

Gross Leak Test:

Fine Leak Test:

Thermal Shock:

MIL-STD-883, Method 1014, Condition C

MIL-STD-883, Method 1014, Condition A2

MIL-STD-883, Method 1011, Condition A

MIL-STD-883, Method 1004

Moisture Resistance:

• 32 Bit Microꢀrocessors

• Tri-State outꢀut on NTH

• LVCMOS / HCMOS comꢀatiꢁle

• Availaꢁle uꢀ to 106.25 MHz

Output Waveform

CMOS

Logic 1

80% V

50% V

20% V

Logic 0

SYMMETRY

DS-159 REV D

141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894

SaRonix

Crystal Clock Oscillator

3.3V, LVCMOS / HCMOS,

NTH / NCH Series

Technical Data

Package Details

Part Numbering Guide

FULL SIZE PACKAGE

NTH

3 - 40.0000 (T)

21.0

max

NTH = Pin 1: Tri state, LVCMOS

NCH = Pin 1: N/C, LVCMOS

Packing Method

0.91

.0ꢀ6

max

.825

(T) = Tape & Reel for SMD versions,

full reel increments only, 200pcs (full

size) or 250pcs (half size)

Blank = Bulk

5.08

.200

max

Symmetry

0 = 40/60% max, 0 to 70°C

2 = 40/60% max, -40 to 85°C

A = 45/55% max, 0 to 70°C, 70 MHz max

.46 .08

.018 .00ꢀ

6.ꢀ5 0.51

0.25 0.02

15.24 .1ꢀ

.600 .005

C = 45/55% max, -40 to 85°C, 70 MHz max

Frequency (MHz)

3.3V Supply

Pin 1

Tri-State - NTH

N/C - NCH

Pin 7

GND

Frequency Range

ꢀ = 0.5 to 6 MHz

6 = 6+ to 24 MHz

8 = 24+ to 106.25 MHz

Stability Tolerance

C = 100ppm

B = 50ppm

A = 25ppm, 0 to +70°C only

AA = 20ppm, 0 to +70°C only

Package

0 = Full Size, Thru-Hole

9 = Half Size, Thru-Hole

K = Full Size, Gull Wing

J = Half Size, Gull Wing

1ꢀ.0

.510

max

N = Half Size, Gull Wing, Spanked Leads

S = Full Size, True SMD Adaptor (see separate data sheet for dimensions)

(4) Glass

Insulators

7.75

.ꢀ05

Pin 14

+ꢀ.ꢀ VDC

max

Pin 8 Output

Standard Marking Format**

Includes Date Code, Frequency & Part Number

Tri-State Logic Table (NTH only)

SARONIX

XTAL OSC

Pin 1 Input

Logic 1 or NC

Logic 0 or GND

Pin 8 (5) Output

Oscillation

Required Input Levels on Pin 1:

Logic 1 = 2.2V min

Logic 0 = 0.8V max

High Impedance

Denotes Pin 1

Output:

Internal Pullup Resistance

Control Input:

Oscillation @ V , 2.2V min

High Impedance @ V , 0.8V max

50KΩ min

Disable Output Delay: 100ns max

HALF SIZE PACKAGE

1ꢀ.0

max

.510

0.91

.0ꢀ6

max

5.08

.200

Test Circuit

max

6.ꢀ5 0.51

0.25 0.02

.46 .08

.018 .00ꢀ

TEST

POINT

Pin 1

7.62 .20

.ꢀ00 .008

Pin 4

GND

Tri-State - NTH

N/C - NCH

Pin 14 (8)

Pin 8 (5)

VDD

OSCILLATOR

GND

OUT

1.5

120°

.059

1ꢀ.0

.510

max

= 50pF, 0.5 to 50 MHz

= ꢀ0pF, 50+ to 70 MHz

= 15pF, 70+ to 106.25 MHz

(Note A)

V M

7.62 .20

.ꢀ00 .008

POWER

SUPPLY

120°

Pin 1 (1)*

Pin 7 (4)

Pin 8

+ꢀ.ꢀ VDC

Pin 5

Output

1.7

.067

6.0

.2ꢀ6

TRI-STATE INPUT (NTH only)

Standard Marking Format**

Includes Date Code, Frequency & Part Number

NOTE A: C includes probe and fixture capacitance

*( ) Indicates pin numbers for half-size package

SARONIX

Denotes Pin 1

All specifications are subject to change without notice.

DS-159 REV D

**Exact location of items may vary

SaRonix 141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894

SaRonix

True SMDAdaptor - 7.57mm High

Technical Data

REV A

SaRonix 141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894

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