P2003EVG [ETC]
P-Channel Logic Level Enhancement Mode Field Effect Transistor; P沟道逻辑电平增强模式场效应晶体管
| 型号： | P2003EVG |
| 厂家： | 
ETC |
| 描述： | P-Channel Logic Level Enhancement Mode Field Effect Transistor |
| 文件： | 总5页 (文件大小：293K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
P-Channel Logic Level Enhancement
P2003EVG
SOP-8
NIKO-SEM
Mode Field Effect Transistor
Lead-Free
D
PRODUCT SUMMARY
4
:GATE
V(BR)DSS
-30
RDS(ON)
ID
5,6,7,8 :DRAIN
1,2,3 :SOURCE
G
-9A
20mΩ
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Drain-Source Voltage
SYMBOL
VDS
LIMITS
UNITS
-30
±20
V
V
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current1
Power Dissipation
VGS
TC = 25 °C
TC = 70 °C
-9
ID
IDM
-8
A
-50
TC = 25 °C
TC = 70 °C
2.5
PD
W
1.3
Operating Junction & Storage Temperature Range
Tj, Tstg
-55 to 150
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
RθJ
TYPICAL
MAXIMUM
UNITS
Junction-to-Case
25
50
°C / W
°C / W
c
Junction-to-Ambient
RθJA
1Pulse width limited by maximum junction temperature.
2Duty cycle ≤ 1%
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
LIMITS
MIN TYP MAX
PARAMETER
SYMBOL
TEST CONDITIONS
UNIT
STATIC
GS = 0V, ID = -250µA
DS = VGS, ID = -250µA
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
V(BR)DSS
VGS(th)
IGSS
-30
V
V
-1
-1.5
-3
V
VDS = 0V, VGS = ±20V
VDS = -24V, VGS = 0V
±100 nA
-1
µA
-10
Zero Gate Voltage Drain Current
On-State Drain Current1
IDSS
VDS = -20V, VGS = 0V, TJ = 125 °C
ID(ON)
RDS(ON)
gfs
VDS = -5V, VGS = -10V
VGS = -4.5V, ID = -7A
-50
A
25
15
24
35
Drain-Source On-State
Resistance1
mΩ
20
VGS = -10V, ID = -9A
Forward Transconductance1
VDS = -10V, ID = -9A
S
OCT-20-2004
1
P-Channel Logic Level Enhancement
P2003EVG
SOP-8
NIKO-SEM
Mode Field Effect Transistor
Lead-Free
DYNAMIC
Input Capacitance
Ciss
1610
V
GS = 0V, VDS = -15V, f = 1MHz
pF
nC
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge2
Gate-Source Charge2
Gate-Drain Charge2
Turn-On Delay Time2
Rise Time2
Coss
Crss
Qg
410
200
17
5
24
VDS = 0.5V(BR)DSS, VGS = -10V,
ID = -9A
Qgs
Qgd
td(on)
tr
6
5.7
10
18
VDS = -15V, RL = 1Ω
nS
Turn-Off Delay Time2
td(off)
ID ≅ -1A, VGS = -10V, RGS = 6Ω
Fall Time2
tf
5
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
Pulsed Current3
Forward Voltage1
IS
-2.1
-4
A
V
ISM
VSD
IF = -1A, VGS = 0V
-1.2
1Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％.
2Independent of operating temperature.
3Pulse width limited by maximum junction temperature.
REMARK: THE PRODUCT MARKED WITH “P2003EVG”, DATE CODE or LOT #
Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.
OCT-20-2004
2
P-Channel Logic Level Enhancement
P2003EVG
SOP-8
NIKO-SEM
Mode Field Effect Transistor
Lead-Free
Body Diode Forward Voltage Variation with Source Current and Temperature
100
V GS= 0V
10
T
A= 125° C
1
25° C
0.1
-55° C
0.01
0.001
0.0001
0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD - Body Diode Forward Voltage(V)
OCT-20-2004
3
P-Channel Logic Level Enhancement
P2003EVG
SOP-8
NIKO-SEM
Mode Field Effect Transistor
Lead-Free
OCT-20-2004
4
P-Channel Logic Level Enhancement
P2003EVG
SOP-8
NIKO-SEM
Mode Field Effect Transistor
Lead-Free
SOIC-8(D) MECHANICAL DATA
mm
mm
Typ.
0.715
0.254
0.22
4°
Dimension
Dimension
Min.
Typ.
4.9
Max.
5.0
Min.
0.5
Max.
0.83
0.25
A
B
C
D
E
F
4.8
3.8
H
I
3.9
4.0
0.18
5.8
6.0
6.2
J
0.38
0.445
1.27
1.55
0.175
0.51
K
L
M
N
0°
8°
1.35
0.1
1.75
G
0.25
OCT-20-2004
5
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