P3057LCG [ETC]

N-Channel Logic Level Enhancement Mode Field Effect Transistor; N沟道逻辑电平增强模式场效应晶体管


型号：	P3057LCG
厂家：	ETC
描述：	N-Channel Logic Level Enhancement Mode Field Effect Transistor N沟道逻辑电平增强模式场效应晶体管晶体晶体管场效应晶体管
文件：	总4页 (文件大小：207K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

N-Channel Logic Level Enhancement

Mode Field Effect Transistor

P3057LCG

SOT-89

NIKO-SEM

Lead-Free

PRODUCT SUMMARY

1. GATE

V_(BR)DSS

R_DS(ON)

I_D

2. DRAIN

3. SOURCE

50mΩ

ABSOLUTE MAXIMUM RATINGS (T_C= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

UNITS

Gate-Source Voltage

V_GS

±20

T_C= 25 °C

Continuous Drain Current

Pulsed Drain Current¹

Power Dissipation

I_D

T_C= 100 °C

I_DM

P_D

T_C= 25 °C

T_C= 100 °C

1.2

Operating Junction & Storage Temperature Range

Lead Temperature (¹/₁₆” from case for 10 sec.)

T_j, T_stg

T_L

-55 to 150

275

°C

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

TYPICAL

MAXIMUM

UNITS

°C / W

Junction-to-Case

R_θJC

R_θJA

Junction-to-Ambient

160

¹Pulse width limited by maximum junction temperature.

²Duty cycle ≤ 1%

ELECTRICAL CHARACTERISTICS (T_C= 25 °C, Unless Otherwise Noted)

LIMITS

PARAMETER

SYMBOL

TEST CONDITIONS

STATIC

_GS= 0V, I_D= 250µA

_DS= V_GS, I_D= 250µA

UNIT

MIN TYP MAX

Drain-Source Breakdown Voltage

Gate Threshold Voltage

Gate-Body Leakage

V_(BR)DSS

V_GS(th)

I_GSS

0.8 1.2

2.5

V_DS= 0V, V_GS= ±20V

V_DS= 20V, V_GS= 0V

±250 nA

µA

Zero Gate Voltage Drain Current

I_DSS

V_DS= 20V, V_GS= 0V, T_J= 125 °C

250

On-State Drain Current¹

I_D(ON)

R_DS(ON)

g_fs

V_DS= 10V, V_GS= 10V

V_GS= 4.5V, I_D= 3A

115

mΩ

Drain-Source On-State

Resistance¹

Forward Transconductance¹

V_GS= 10V, I_D= 6A

V_DS= 15V, I_D= 6A

Jun-29-2004

N-Channel Logic Level Enhancement

Mode Field Effect Transistor

P3057LCG

SOT-89

NIKO-SEM

Lead-Free

DYNAMIC

Input Capacitance

C_iss

450

_GS= 0V, V_DS= 15V, f = 1MHz

Output Capacitance

Reverse Transfer Capacitance

Total Gate Charge²

Gate-Source Charge²

Gate-Drain Charge²

Turn-On Delay Time²

Rise Time²

C_oss

C_rss

Q_g

200

V_DS= 0.5V_(BR)DSS, V_GS= 10V,

I_D= 6A

Q_gs

Q_gd

t_d(on)

t_r

2.0

7.0

6.0

V_DS= 15V, R_L= 1Ω

Turn-Off Delay Time²

t_d(off)

I_D≅ 12A, V_GS= 10V, R_GS= 2.5Ω

Fall Time²

t_f

5.0

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (T_C= 25 °C)

Continuous Current

I_S

2.3

Pulsed Current³

Forward Voltage¹

I_SM

V_SD

I_F= I_S, V_GS= 0V

1.5

¹Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.

²Independent of operating temperature.

³Pulse width limited by maximum junction temperature.

REMARK: THE PRODUCT MARKED WITH “P3057G”, DATE CODE or LOT #

Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.

Jun-29-2004

N-Channel Logic Level Enhancement

Mode Field Effect Transistor

P3057LCG

SOT-89

NIKO-SEM

Lead-Free

Jun-29-2004

N-Channel Logic Level Enhancement

Mode Field Effect Transistor

P3057LCG

SOT-89

NIKO-SEM

Lead-Free

SOT-89 MECHANICAL DATA

Dimension

Min.

4.3

1.6

0.4

2.4

0.8

0.4

Typ.

4.5

Max.

4.7

1.8

0.6

2.6

1.4

0.5

0.6

Min.

1.4

2.8

1.3

3.8

0.3

Typ.

1.5

3.0

1.5

4.2

0.4

Max.

1.6

3.2

1.7

4.6

0.5

1.7

0.5

2.5

1.2

0.45

0.5

Jun-29-2004

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