PI74ALVCH1622601A [ETC]

18-Bit Bus Transceiver ; 18位总线收发器\n


型号：	PI74ALVCH1622601A
厂家：	ETC
描述：	18-Bit Bus Transceiver 18位总线收发器\n 总线收发器
文件：	总5页 (文件大小：320K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PI74ALVCH1622601

18-Bit Universal Bus Transceiver

With 3-State Outputs

Product Description

Product Features

Pericom Semiconductors PI74ALVCH series of logic circuits are

producedintheCompanysadvanced0.5micronCMOStechnology,

achieving industry leading speed.

• PI74ALVCH1622601isdesignedforlowvoltageoperation

• V =2.3Vto3.6V

• Hysteresis on all inputs

The PI74ALVCH1622601 uses D-type latches and D-type flip-

flops with 3-state outputs to allow data flow in transparent, latched,

and clocked modes.

• Typical VOLP (Output Ground Bounce)

< 0.8V at V = 3.3V, T = 25°C

• Typical VOHV (Output VOH Undershoot)

< 2.0V at V = 3.3V, T = 25°C

Data flow in each direction is controlled by Output Enable (OEAB

and OEBA), Latched Enable (LEAB and LEBA), and Clock

(CLKAB and CLKBA) inputs. The clock can be controlled by the

Clock Enable (CLKENAB and CLKENBA) inputs. For A-to-B

data flow, the device operates in the transparent mode when LEAB

is HIGH. When LEAB is LOW, the A data is latched if CLKAB is

held at a high or low logic level. If LEAB is low, the A-bus is stored

in the latch/flip-flop on the low-to-high transition of CLKAB.

When OEAB is low, the outputs are active. When OEAB is HIGH,

the outputs are in the high-impedance state.

• Inputs/Outputs have equivalent 26Ω series resistors,

no external resistors are required.

• Bus Hold retains last active bus state during 3-state

eliminates the need for external pullup resistors

• Industrial operation at 40°C to +85°C

• Packages available:

56-pin240milwideplasticTSSOP(A)

56-pin300milwideplasticSSOP(V)

Data flow for B to A is similar to that of A to B but uses OEBA,

LEBA, CLKBA, and CLKENBA.

To reduce overshoot and undershoot, the inputs/outputs include

26Ω series resistors.

To ensure the high-impedance state during power up or power

down, OE should be tied to Vcc through a pull-up resistor; the

minimum value of the resistor is determined by the current-sinking

capability of the driver.

The PI74ALVCH1622601 has Bus Hold which retains the data

inputs last state whenever the data input goes to high-impedance

preventing floating inputs and eliminating the need for pullup/

down resistors.

Logic Block Diagram

PS8115B

02/03/98

PI74ALVCH1622601

18-BIT UNIVERSAL BUS TRANSCEIVER

Truth Table⁽¹⁾

Product Pin Description

Pin Name

CLKEN

Description

Inputs

Output

CLKENAB OEAB LEAB CLKAB

Clock Enable Input (Active LOW)

Output Enable Input (Active LOW)

Latch Enable (Active HIGH)

Clock Input (Active HIGH)

Data I/O

CLK

B₀

Data I/O

GND

VCC

Ground

Power

B₀

B₀§

Notes:

Product Pin Configuration

1. H = High Signal Level

L = Low Signal Level

Z = High Impedance

↑ = LOW-to-HIGH Transition

A-to-B data flow is shown:

B-to-A flow is similar but uses OEBA, LEBA,

CLKBA, and CLKENBA.

Output level before the indicated steady-state input

conditions were established.

§ Output level before the indicated steady-state input

conditions were established, provided that CLKAB is

LOW before LEAB goes LOW.

OEAB

LEAB

CLKENAB

CLKAB

GND

56-PIN

A-56

V-56

GND

A10

A11

A12

GND

A13

A14

A15

B10

B11

B12

GND

B13

B14

B15

VCC

B16

B17

GND

B18

CLKBA

CLKENBA

A16

A17

GND

A18

OEBA

LEBA

PS8115B

02/03/98

PI74ALVCH1622601

18-BIT UNIVERSAL BUS TRANSCEIVER

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................................. 65°C to +150°C

Ambient Temperature with Power Applied ................. 40°C to +85°C

Input Voltage Range, VIN ..................................... 0.5V to V +0.5V

Note:

Stresses greater than those listed under MAXIMUM

RATINGS may cause permanent damage to the device.

This is a stress rating only and functional operation of the

device at these or any other conditions above those indi-

cated in the operational sections of this specification is not

implied. Exposure to absolute maximum rating conditions

for extended periods may affect reliability.

Output Voltage Range, VOUT ............................... 0.5V to V +0.5V

DC Input Voltage .......................................................... 0.5V to +5.0V

DC Output Current ......................................................................100mA

Power Dissipation ..........................................................................1.0W

Recommended Operating Conditions⁽¹⁾

Parameters

Description

Test Conditions

Min.

2.3

Typ.

Max. Units

Supply Voltage

3.6

= 2.3V to 2.7V

= 2.7V to 3.6V

= 2.3V to 2.7V

= 2.7V to 3.6V

1.7

Input HIGH Voltage

Input LOW Voltage

2.0

0.7

0.8

Input Voltage

OUT

Output Voltage

VCC

= 2.3V

= 2.7V

= 3.0V

= 2.3V

= 2.7V

= 3.0V

-6

High-level Output Current

Low-level Output Current

-8

-12

°C

Operating Free-Air Temperature

-40

Note:

1. Unused control inputs must be held HIGH or LOW to prevent them from floating.

PS8115B

02/03/98

PI74ALVCH1622601

18-BIT UNIVERSAL BUS TRANSCEIVER

DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 3.3V ± 10%)

(1)

(2)

Parameters

Test Conditions

Min.

V -0.2

Typ.

Max. Units

= -100 mA

= -4 mA

Min. to Max.

2.3V

= 1.7V

= 2.0V

1.9

2.3V

1.7

2.4

2.0

= -6 mA

3.0V

= -8 mA

= -12 mA

= 100 mA

= 4 mA

2.7V

3.0V

Min. to Max.

2.3V

-0.2

0.2

= 0.7V

= 0.8V

0.4

0.55

0.6

2.3V

= 6 mA

3.0V

= 8 mA

2.7V

= 12 mA

3.0V

0.8

V = V or GND

3.6V

±5

V = 0.7V

-45

2.3V

3.0V

V = 1.7V

(3)

I (Hold)

V = 0.8V

V = 2.0V

-75

V = 0 to 3.6V

3.6V

±500

±10

(4)

V = V or GND

O CC

V = V or GND

I = 0

One input at V -0.6V, other inputs at V or GND 3V to 3.6V

750

C Control Inputs V = V or GND

3.3V

A or B ports V = V or GND

O CC

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V = 3.3V, +25°C ambient and maximum loading.

3. Bus Hold maximum dynamic current required to switch the input from one state to another.

4. For I/O ports, the I includes the input leakage current.

Operating Characteristics, TA = 25°C

Vcc = 2.5V ± 0.2V Vcc = 3.3V ± 0.3V

Test

Parameter

Units

Conditions

Typical

Outputs Enabled

Power Dissipation

Capacitance

C = 50pF,

F = 10 MHz

Outputs Disabled

PS8115B

02/03/98

PI74ALVCH1622601

18-BIT UNIVERSAL BUS TRANSCEIVER

Timing Requirements over Operating Range

= 2.5 V ± 0.2 V

= 2.7 V

V = 3.3 V ± 0.3 V

Parameters

Description

Units

Min.

Max.

Min.

Max.

150

Min.

Max.

Clock frequency

140

150

MHz

CLOCK

LE high

3.3

2.3

2.0

1.3

2.0

0.7

1.3

1.7

0.3

3.3

2.4

1.6

1.2

2.0

0.7

1.6

2.0

0.5

3.3

2.1

1.6

1.1

1.7

0.8

1.4

1.7

0.6

Pulse

Duration

CLK high or low

Data before CLK high

Data before LE low, CLK high

Data before LE low, CLK low

CLKEN before CLK high

Data after CLK high

Setup

time

Data after LE low, CLK high

Data after LE low, CLK low

CLKEN after CLK high

Input Transition Rise or Fall

t Hold

time

(1)

Dt/Dv

ns/V

Note:

1. Unused control inputs must be held HIGH or LOW to prevent them from floating.

Switching Characteristics over Operating Range⁽¹⁾

From

Parameters

= 2.5 V ± 0.2 V

= 2.7 V

V = U3.3 V ± 0.3 V

Units

(INPUT) (OUTPUT)

(2)

Min.

140

1.8

1.5

Max.

Min.

Max.

Min.

150

1.6

1.5

1.6

1.8

1.6

1.8

Max.

150

MHz

MAX

5.4

6.1

6.7

6.6

5.9

6.6

5.9

5.2

5.9

6.3

6.7

5.3

6.7

5.3

4.5

5.1

5.5

5.7

4.8

5.7

4.8

LEAB

LEBA

CLKAB

CLKBA

OEAB

OEBA

1.2

1.7

2.5

1.7

2.5

DIS

Notes:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com

PS8115B

02/03/98

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