PI74ALVCH16601A [ETC]

18-Bit Bus Transceiver ; 18位总线收发器\n


型号：	PI74ALVCH16601A
厂家：	ETC
描述：	18-Bit Bus Transceiver 18位总线收发器\n 总线收发器触发器逻辑集成电路光电二极管输出元件
文件：	总5页 (文件大小：276K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PI74ALVCH16601

18-Bit Universal Bus Transceiver

With 3-State Outputs

Product Description

Product Features

PericomSemiconductorsPI74ALVCHseriesoflogic

circuits are produced using the Companys advanced

0.5 micron CMOS technology, achieving industry

leading speed.

• PI74ALVCH16601 is designed for low voltage operation

• V = 2.3V to 3.6V

• Hysteresis on all inputs

• Typical V

(Output Ground Bounce)

OLP

The PI74ALVCH16601 uses D-type latches and D-

type flip-flops with 3-state outputs to allow data flow

in transparent, latched, and clocked modes.

< 0.8V atV = 3.3V, T = 25°C

• Typical V

(Output V Undershoot)

OHV

< 2.0V atV = 3.3V, T = 25°C

Data flow in each direction is controlled by Output

Enable (OEAB and OEBA), Latched Enable (LEAB

and LEBA), and Clock (CLKAB and CLKBA) inputs.

The clock can be controlled by the Clock Enable

(CLKENAB and CLKENBA) inputs. For A-to-B data

flow, the device operates in the transparent mode when

LEAB is HIGH. When LEAB is LOW, the A data is

latched if CLKAB is held at a high or low logic level.

IfLEABislow,theA-busisstoredinthelatch/flip-flop

onthelow-to-hightransitionofCLKAB. WhenOEAB

islow,theoutputsareactive.WhenOEABisHIGH,the

outputs are in the high-impedance state.

• Bus Hold retains last active bus state during 3-State,

eliminating the need for external pullup resistors

• Industrial operation at 40°C to +85°C

• Packages available:

56-pin 240 mil wide plastic TSSOP (A)

56-pin 300 mil wide plastic SSOP (V)

Logic Block Diagram

Data flow for B to A is similar to that of A to B but uses

OEBA,LEBA,CLKBA,andCLKENBA.

To ensure the high-impedance state during power up

orpowerdown,OEshouldbetiedtoV^CCthroughapull-

up resistor; the minimum value of the resistor is

determined by the current-sinking capability of the

driver.

The PI74ALVCH16601 has Bus Hold which retains

the data inputs last state whenever the data input goes

to high-impedance preventing floating inputs and

eliminating the need for pullup/down resistors.

PS8134A

02/23/98

PI74ALVCH16601

18-Bit Universal Bus Transceiver

TruthTable⁽¹⁾

ProductPinDescription

PinName

CLKEN

Description

Inputs

Output B

Clock Enable Input (Active LOW)

Output Enable Input (Active LOW)

LatchEnable(ActiveHIGH)

ClockInput(ActiveHIGH)

DataI/O

CLKENAB OEAB LEAB CLKAB

↑

CLK

DataI/O

GND

VCC

Ground

Power

↑

B §

Product Pin Configuration

Notes:

1. H=HighSignalLevel

L=LowSignalLevel

Z = High Impedance

CLKENAB

CLKAB

OEAB

LEAB

↑ = LOW-to-HIGH Transition

GND

A-to-B data flow is shown: B-to-A flow is similar but

usesOEBA,LEBA,CLKBA,andCLKENBA.

Output level before the indicated steady-state input

conditions were established.

§ Output level before the indicated steady-state input

conditions were established, provided that CLKAB is

HIGH before LEAB goes LOW.

GND

B10

B11

B12

GND

B13

B14

B15

VCC

B16

B17

GND

B18

CLKBA

CLKENBA

A10

A11

A12

GND

A13

A14

A15

56-PIN

A-56

V-56

A16

A17

GND

A18

OEBA

LEBA

PS8134A 02/23/98

PI74ALVCH16601

18-Bit Universal Bus Transceiver

MaximumRatings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Note:

StorageTemperature ........................................ 65°Cto+150°C

Stresses greater than those listed under MAXIMUM RATINGS

maycausepermanentdamagetothedevice. Thisisastressrating

only and functional operation of the device at these or any other

conditions above those indicated in the operational sections of

this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

Ambient Temperature with Power Applied ........ 10°Cto+85°C

InputVoltageRange,V .............................0.5VtoV +0.5V

Output Voltage Range, V

......................0.5VtoV +0.5V

OUT

DC Input Voltage ................................................ 0.5Vto+0.5V

DC Output Current .......................................................... 100mA

Power Dissipation ............................................................... 1.0W

RecommendedOperatingConditions⁽¹⁾

Parameters

Description

Test Conditions

Min. Typ. Max. Units

Supply Voltage

2.3

1.7

2.0

3.6

= 2.3V to 2.7V

= 2.7V to 3.6V

= 2.3V to 2.7V

= 2.7V to 3.6V

Input HIGH Voltage

Input LOW Voltage

0.7

0.8

Input Voltage

OUT

Output Voltage

= 2.3V

= 2.7V

= 3.0V

= 2.3V

= 2.7V

= 3.0V

-12

High-level Output Current

Low-level Output Current

-12

-24

°C

Operating Free-Air Temperature

-40

Note: Unused control inputs must be held HIGH or LOW to prevent them from floating.

PS8134A 02/23/98

PI74ALVCH16601

18-Bit Universal Bus Transceiver

DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 3.3V ± 10%)

(1)

(2)

Parameters

Test Conditions

Min.

Typ.

Max. Units

Min. to

Max.

= -100µA

-0.2

= -6mA

= 1.7V

= 2.0V

2.3V

2.7V

3.0V

2.0

1.7

2.2

2.4

2.0

= -12mA

= -24mA

= -100µA

= 6mA

Min. to

Max.

-0.2

0.2

= 0.7V

= 0.8V

2.3V

2.7V

3.0V

3.6V

0.4

0.7

0.4

0.55

±5

= 12mA

= 24mA

V = V or GND

I CC

V = 0.7V

-45

2.3V

3.0V

V = 1.7V

(3)

I (Hold)

V = 0.8V

V = 2.0V

-75

µA

V = 0 to 3.6V

3.6V

±500

±10

(4)

V = V or GND

O CC

V = V or GND

I = 0

One input at V -0.6V, Other inputs at V or GND 3V to 3.6V

750

∆I

C Control Inputs V = V or GND

3.3V

A or B ports V = V or GND

O CC

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2.TypicalvaluesareatV =3.3V,+25°Cambientandmaximumloading.

3. Bus Hold maximum dynamic current required to switch the input from one state to another.

4. For I/O ports, the I includes the input leakage current.

PS8134A 02/23/98

PI74ALVCH16601

18-Bit Universal Bus Transceiver

Timing Requirements over Operating Range

= 2.5V ± 0.2V

= 2.7V

= 3.3V ± 0.3V

Parameters

Description

Clock frequency

Units

Min.

Max.

Min.

Max.

150

Min.

Max.

150

MHz

CLOCK

LE high

3.3

2.3

2.0

1.3

2.0

0.7

1.3

1.7

0.3

3.3

2.4

1.6

1.2

2.0

0.7

1.6

2.0

0.5

3.3

2.1

1.6

1.1

1.7

0.8

1.4

1.7

0.6

Pulse

Duration

CLK high or low

Data before CLK high

Data before LE low, CLK high

Data before LE low, CLK low

CLKEN before CLK high

Data after CLK high

Setup

time

Data after LE low, CLK high

Data after LE low, CLK low

CLKEN after CLK high

Input Transition Rise or Fall

Hold

time

ns/V

∆t/∆v(1)

Note: Unused control inputs must be held HIGH or LOW to prevent them from floating.

SwitchingCharacteristicsoverOperatingRange⁽¹⁾

= 2.5V ±0.2V

= 2.7V

V = 3.3 V ± 0.3V

From

(2)

(INPUT)

(OUTPUT)

Parameters

Min.

Max.

Min.

150

Max. Min.

Max.

Units

150

1.3

150

MHz

MAX

A or B

B or A

A or B

4.9

5.6

4.6

5.3

4.1

4.7

LEBA or

LEBA

1.2

1.7

1.2

2.1

CLKAB or

CLKBA

6.2

6.1

5.4

5.8

6.1

4.8

1.4

1.1

1.6

OEAB or

OEBA

5.2

4.4

OEAB or

OEBA

DIS

Notes:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

OperatingCharacteristics,T =25ºC

= 2.5V ± 0.2V

= 3.3V ± 0.3V

Parameter

Test Conditions

Units

Typical

Outputs Enabled

Power Dissipation

Capacitance

C = 50pF,

f = 10 MHz

Outputs Disabled

Pericom Semiconductor Corporation

2380BeringDrive • SanJose,CA95131•1-800-435-2336 • Fax(408)435-1100• http://www.pericom.com

PS8134A 02/23/98

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