PI74LPT573S [ETC]

8-Bit D-Type Latch ; 8位D类锁存器\n
PI74LPT573S
型号: PI74LPT573S
厂家: ETC    ETC
描述:

8-Bit D-Type Latch
8位D类锁存器\n

锁存器 逻辑集成电路 驱动
文件: 总4页 (文件大小:167K)
中文:  中文翻译
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PI74LPT573  
Fast CMOS 3.3V 8-Bit  
Transparent Latch  
Features  
Description  
• CompatiblewithLCX™andLVT™familiesofproducts  
Pericom Semiconductor’s PI74LPT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
• Supports 5V Tolerant Mixed Signal Mode Operation  
– Input can be 3V or 5V  
– Output can be 3V or connected to 5V bus  
The PI74LPT573 is an 8-bit transparent latch designed with  
3-state outputs and is intended for bus oriented applications. When  
Latch Enable (LE) is HIGH, the flip-flops appear transparent to the  
data.Thedatathatmeetstheset-uptimewhenLEisLOWislatched.  
When OE is HIGH, the bus output is in the high impedance state.  
• Advanced Low Power CMOS Operation  
• Excellent output drive capability:  
Balanced drives (24 mA sink and source)  
• Low ground bounce outputs  
The PI74LPT573 can be driven from either 3.3V or 5.0V devices  
allowing this device to be used as a translator in a mixed  
3.3/5.0V system.  
• Hysteresis on all inputs  
• Industrial operating temperature range: –40°C to +85°C  
• Packages available:  
–20-pin173milwideplasticTSSOP(L)  
–20-pin150milwideplasticQSOP(Q)  
–20-pin150milwideplasticTQSOP(R)  
–20-pin300milwideplasticSOIC(S)  
Pinout  
Logic Block Diagram  
OE  
LE  
20 Vcc  
19 O0  
18 O1  
17 O2  
16 O3  
15 O4  
14 O5  
13 O6  
12 O7  
11 LE  
OE  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
1
2
3
4
5
6
7
8
9
20-Pin  
L20  
R20  
Q20  
S20  
D0  
D
G
O
0
O
GND 10  
TO 7 OTHER CHANNELS  
Truth Table  
Pin Description  
Inputs(1)  
Outputs(1)  
Pin Name  
OE  
Description  
DN  
H
LE  
H
OE  
L
ON  
H
Output Enable Input (Active LOW)  
Latch Enable Input (Active HIGH)  
Data Inputs  
LE  
L
H
L
L
D7-D0  
O7-O0  
GND  
VCC  
X
X
H
Z
3-State Outputs  
Ground  
Note:  
1. H = High Voltage Level, X = Don't Care,  
L = Low Voltage Level, Z = High Impedance  
Power  
PS2063A 01/15/97  
1
PI74LPT573  
3.3V 8-BIT TRANSPARENT LATCH  
Maximum Ratings  
(Above which the useful life may be impaired. For user guidelines, not tested.)  
Storage Temperature............................................................. –65°C to +150°C  
Ambient Temperature with Power Applied............................ –40°C to +85°C  
Supply Voltage to Ground Potential (Inputs & Vcc Only)......–0.5V to +7.0V  
Supply Voltage to Ground Potential (Outputs & D/O Only) ..–0.5V to +7.0V  
DC Input Voltage ....................................................................–0.5V to +7.0V  
DC Output Current .............................................................................. 120 mA  
Power Dissipation .................................................................................... 1.0W  
Note:  
Stresses greater than those listed under MAXIMUM  
RATINGS may cause permanent damage to the de-  
vice. This is a stress rating only and functional opera-  
tion of the device at these or any other conditions  
above those indicated in the operational sections of  
thisspecificationisnotimplied. Exposuretoabsolute  
maximumratingconditionsforextendedperiodsmay  
affect reliability.  
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 2.7V to 3.6V)  
Parameters  
Description  
Test Conditions(1)  
Min. Typ(2) Max. Units  
VIH  
Input HIGH Voltage (Input pins)  
Input HIGH Voltage (I/O pins)  
Input LOW Voltage  
Guaranteed Logic HIGH Level  
2.2  
2.0  
–0.5  
—
—
—
5.5  
5.5  
0.8  
V
V
V
VIL  
IIH  
IIL  
Guaranteed Logic LOW Level  
(Input and I/O pins)  
Input HIGH Current (Input pins)  
Input HIGH Current (I/O pins)  
Input LOW Current (Input pins)  
Input LOW Current (I/O pins)  
High Impedance Output Current  
(3-State Output pins)  
Clamp Diode Voltage  
Output HIGH Current  
Output LOW Current  
Output HIGH Voltage  
VCC = Max.  
VIN = 5.5V  
—
—
—
—
—
—
—
–36  
50  
—
—
—
—
—
±1  
±1  
±1  
±1  
±1  
µA  
µA  
µA  
µA  
µA  
µA  
V
mA  
mA  
V
VCC = Max.  
VIN = VCC  
VCC = Max.  
VCC = Max.  
VCC = Max.  
VCC = Max.  
VIN = GND  
VIN = GND  
VOUT = 5.5V  
VOUT = GND  
IOZH  
IOZL  
VIK  
IODH  
IODL  
VOH  
—
±1  
VCC = Min., IIN = –18 mA  
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)  
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)  
–0.7  
–60  
90  
–1.2  
–110  
200  
—
VCC = Min.  
IOH = –0.1 mA Vcc-0.2  
—
VIN = VIH or VIL  
VCC = 3.0V,  
VIN = VIH or VIL  
VCC = Min.  
VIN = VIH or VIL  
IOH = –3 mA  
IOH = –8 mA  
IOH = –24 mA  
IOL = 0.1 mA  
IOL = 16 mA  
IOL = 24 mA  
2.4  
2.4(5)  
2.0  
—
—
—
–60  
—
—
3.0  
3.0  
—
—
—
—
0.2  
0.4  
0.5  
–240  
±100  
—
V
V
VOL  
Output LOW Voltage  
—
V
V
V
mA  
µA  
mV  
0.2  
0.3  
–85  
—
IOS  
IOFF  
VH  
Short Circuit Current(4)  
Power Down Disable  
Input Hysteresis  
VCC = Max.(3), VOUT = GND  
VCC = 0V, VIN or VOUT 4.5V  
150  
Notes:  
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at Vcc = 3.3V, +25°C ambient and maximum loading.  
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.  
4. This parameter is guaranteed but not tested.  
5. VOH = VCC – 0.6V at rated current.  
Capacitance (TA = 25°C, f = 1 MHz)  
Parameters(1)  
Description  
Test Conditions  
Typ.  
Max.  
Units  
CIN  
Input Capacitance  
Output Capacitance  
VIN = 0V  
4.5  
5.5  
6
8
pF  
pF  
COUT  
VOUT = 0V  
Note:  
1. This parameter is determined by device characterization but is not production tested.  
PS2063A 01/15/97  
2
PI74LPT573  
3.3V 8-BIT TRANSPARENT LATCH  
Power Supply Characteristics  
1
2
Parameters Description  
Test Conditions(1)  
VCC = Max.  
Min. Typ(2) Max. Units  
ICC  
Quiescent Power Supply Current  
VIN = GND or VCC  
VIN = VCC – 0.6V(3)  
0.1  
2.0  
10  
30  
µA  
µA  
ICC  
Quiescent Power Supply Current  
TTL Inputs HIGH  
VCC = Max.  
ICCD  
Dynamic Power Supply(4)  
VCC = Max.,  
VIN = VCC  
50  
75  
µA/  
Outputs Open  
OE = GND  
One Bit Toggling  
50% Duty Cycle  
VIN = GND  
MHz  
3
IC  
Total Power Supply  
Current(6)  
VCC = Max.,  
Outputs Open  
fI = 10 MHZ  
50% Duty Cycle  
OE = GND  
VIN = VCC – 0.6V  
VIN = GND  
0.6  
2.3  
mA  
4
5
One Bit Toggling  
VCC = Max.,  
Outputs Open  
fI = 2.5 MHZ  
50% Duty Cycle  
OE = GND  
VIN = VCC – 0.6V  
VIN = GND  
2.1  
4.7(5)  
6
8 Bits Toggling  
7
Notes:  
8
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.  
2. Typical values are at Vcc = 3.3V, +25°C ambient.  
3. Per TTL driven input; all other inputs at Vcc or GND.  
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.  
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.  
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC  
9
IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI)  
ICC = Quiescent Current (ICCL, ICCH and ICCZ)  
ICC = Power Supply Current for a TTL High Input  
DH = Duty Cycle for TTL Inputs High  
10  
11  
12  
13  
14  
15  
NT = Number of TTL Inputs at DH  
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)  
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)  
NCP = Number of Clock Inputs at fCP  
fI = Input Frequency  
NI = Number of Inputs at fI  
All currents are in milliamps and all frequencies are in megahertz.  
PS2063A 01/15/97  
3
PI74LPT573  
3.3V 8-BIT TRANSPARENT LATCH  
Switching Characteristics over Operating Range(1)  
LPT573  
Com.  
LPT573A  
Com.  
LPT573C  
Com.  
Parameters Description  
Conditions(2)  
Min.3)  
Max.  
Min.(3)  
Max.  
Min.(3)  
Max.  
Units  
tPLH  
tPHL  
Propagation Delay  
Dx to Ox  
CL = 50pF  
RL = 500Ω  
1.5  
2.0  
1.5  
1.5  
2.0  
1.5  
6.0  
8.0  
1.5  
2.0  
1.5  
1.5  
2.0  
1.5  
5.0  
5.2  
1.5  
2.0  
1.5  
1.5  
2.0  
1.5  
5.0  
4.2  
ns  
tPLH  
tPHL  
Propagation Delay  
LE to Ox  
12.0  
9.5  
8.5  
6.5  
5.5  
5.5  
5.5  
5.0  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tPZH  
tPZL  
Output Enable Time  
OE to Ox  
Output Disable Time(4)  
OE to Ox  
tPHZ  
tPLZ  
6.5  
tSU  
Setup Time HIGH  
or LOW, Dx to LE  
tH  
Hold Time HIGH  
or LOW, Dx to LE  
LE Pulse Width(4)  
HIGH  
tW  
tSK(o)  
Output Skew(5)  
0.5  
0.5  
0.5  
Notes:  
1. Propagation Delays and Enable/Disable times are with Vcc = 3.3V ±0.3V, normal range. For Vcc = 2.7V,  
extended range, all Propagation Delays and Enable/Disable times should be degraded by 20%.  
2. See test circuit and waveforms.  
3. Minimum limits are guaranteed but not tested on Propagation Delays.  
4. This parameter is guaranteed but not production tested.  
5. Skew between any two outputs, of the same package, switching in the same direction.  
This parameter is guaranteed by design.  
Pericom Semiconductor Corporation  
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com  
PS2063A 01/15/97  
4

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