PI90LV386A [ETC]
Interface IC ; 接口IC\n型号: | PI90LV386A |
厂家: | ETC |
描述: | Interface IC
|
文件: | 总7页 (文件大小:284K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PI90LV386
High-Speed Differential
Line Receivers
Features
Description
Sixteen line receivers meet or exceed the requirements of the
ANSITIA/EIA-644-1995Standard
ThePI90LVx386familyconsistsof sixteendifferentiallinereceivers
with 3-state outputs that implement Low-Voltage Differential
Signaling (LVDS). Any of the differential receivers will provide a
valid logical output state with a ±100mV differential input voltage
withintheinputcommon-modevoltagerangethatallows0to3Vof
ground potential difference between two LVDS nodes. The inde-
pendent EN pins can be used to place the outputs in either a normal
logic state (high or low logic levels) or a high-impedance state. In
high-impedance state, outputs neither load nor drive the bus lines.
Designed for signaling rates up to 660 Mbps
0V to 3V common-mode input voltage range
Operates from a single 3.3V supply
Typical propagation delay time: 2.6ns
Output skew 100ps (typical)
Part-to-part skew is less than 1ns
Integrated110-ohmterminationonPI90LVTxxxproducts
LowVoltageTTL(LVTTL)levelsare5Vtolerant
Open-circuitfailsafe
Flow-through pin out
Packages:
The intended application of these devices, and their signaling
techniques, is for point-to-point baseband data transmission over
controlled impedance media of approximately 100 ohms with a
100-ohm termination resistor. The transmission media may be
printedcircuitboardtraces,backplanes,orcables.ThePI90LV386s
16receiversintegratedintothesamesubstrateallowprecisetiming
alignment.
64-Pin Thin Shrink Small Output TSSOP (A)
PI90LV386PinConfiguration
These parts are characterized for operation from 40°C to 85°C.
1R
1R
1R
1R
1R
1R
1R
1R
2R
2R
2R
1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
GND
IN1+
IN1–
IN2+
IN2–
IN3+
IN3–
IN4+
IN4–
IN1+
IN1–
IN2–
V
2
CC
V
3
CC
4
GND
EN1
1R
5
PI90LV386BlockDiagram
6
OUT1
1R
1R
1R
7
OUT2
OUT3
OUT4
R
IN1+
8
R
OUT1
R
OUT2
R
OUT3
R
OUT4
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
EN2
2R
R
R
IN1–
OUT1
2R
2R
2R
2R
2R
OUT2
OUT3
OUT4
IN2–
IN2+
IN3+
2R
2R
2R
64-Pin
A
IN3–
IN4+
IN4–
GND
R
R
IN2–
V
CC
EN
V
3R
3R
CC
IN1+
IN3+
GND
3R
IN1–
3R
3R
3R
3R
3R
OUT1
IN2+
IN2–
IN3+
IN3–
IN4+
3R
3R
3R
OUT2
OUT3
OUT4
R
R
IN3–
IN4+
EN3
4R
3R
4R
4R
OUT1
IN4–
IN1+
IN1–
4R
4R
4R
OUT2
OUT3
OUT4
R
IN4–
4R
4R
4R
4R
4R
4R
IN2+
IN2–
IN3+
IN3–
IN4+
IN4–
EN4
1 of 4 LV386
GND
V
CC
V
CC
GND
16 Receivers
PS8574
09/28/01
1
PI90LV386
High-Speed Differential
Line Receivers
AbsoluteMaximumRatings
OverOperatingFree-AirTemperature
(unless otherwise noted)
FunctionTable
(1)
Differential Input
RIN±
Enables
Output
Supply Voltage Range, V
....................................... 0.5Vto4V
DD
EN
H
H
H
L
ROUT
VoltageRange: ............................................... Enables or R
OUT
0.5VtoV +2V
VID ≥ 100mV
H
?
DD
R
or R
........................................................................ 0.5Vto4V
IN
100mV < VID ≤100mV
IN+
(2):
Electrostatic Discharge
VID ≤ 100mV
L
Z
H
R
, R , and GND .......................Class3,A:10kV,B:700V
IN+ IN
X
Open
X
All Pins .............................................. Class3,A:8kV,B:600V
H
H
Storage Temperature Range ............................. 65°Cto150°C
LeadTemperature1,6mm(1/16inch)
ROUT
0
H = high level, L = low level, X = irrelevent
Z = high impedance (off), ? = indeterminate
from case for 10 seconds ....................................................260°C
Stresses beyond those listed under Absolute Maximum Rat-
ings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any
other conditions beyond those indicated under "Recommended
OperatingConditions"isnotimplied.ExposuretoAbsolute-Maxi-
mum-Rated conditions for extended periods may affect device
reliability.
Notes:
1. All voltage values, except differential I/O bus voltages, are
with respect to ground terminal.
2. TestedinaccordancewithMIL-STD-883CMethod3015.7
Recommended Operating Conditions
Min.
3.0
Nom.
Max.
Units
V
Supply Voltage, VCC
3.3
3.6
High-Level Input Voltage, VIH
Low-Level Input Voltage, VIL
Magnitude of Differential Input Voltage VID
2.0
0.8
0.6
0.1
VID
2.4 VID
2
2
Common-Mode input Voltage, VIC
Operating free-air temperature, TA
VCC 0.8
85
40
°C
PS8574
09/28/01
2
PI90LV386
High-Speed Differential
Line Receivers
ElectricalCharacteristicsOverRecommendedOperatingConditions(unlessotherwisenoted)
Symbol
VITH+
VITH
VOH
Parameter
Positive-going differential input voltage threshold
Negative-going differential input voltage threshold
High-level output voltage
Test Conditions
Min. Typ.(1) Max. Units
100
mV
100
IOH = 8mA
2.4
3.1
0.3
40
V
VOL
Low-level output voltage
IOL = 8mA
Enabled,
0.45
56
ICC
Supply Current
No load
mA
µA
Disabled
3
II
Input Current
(RIN+ or RIN inputs)
VI = 0V
13
3
20
VI = 2.4V
1.2
II(OFF)
IIH
Power-off input current (RIN+ or RIN inputs)
High-level input current (enables)
Low-level input current (enables)
High-impedance output current
VCC = 0V, VI = 2.4V
VIH =2V
12
±20
10
IIL
VIL =0.8V
µA
pF
IOZ
VO = 0V
±1
10
VO = 3.6V
CIN
Input capacitance (RIN+ or RIN inputs to GND)
VID = 0.4 sin 2.5E09 t V
6
Note:
1. All typical values are at 25°C and with a 3.3V supply.
SwitchingCharacteristicsOverRecommendedOperatingConditions (unlessotherwisenoted)
Symbol
tPLH
tPHL
tr
Parameter
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Differential output signal rise time
Test Conditions
Min.
1
Typ.(1) Max. Units
2.2
2.1
3.1
3.1
ns
1
See Figure 2
500
500
900
820
120
180
1500
1200
244
320
1
tf
Differential output signal fall time
ps
tsk(p)
tsk(o)
tsk(pp)
tPZH
tPZL
tPHZ
tPLZ
fMAX
Pulse skew (tPHL tPLH)
Output skew(2)
Part-to-part skew(3)
Propagation delay time, high-impedance-to-high-level output
Propagation delay time, high-impedance-to-low-level output
Propagation delay time, high-level-to-high-impedance output
Propagation delay time, low-level-to-high-impedance output
Maximum Clock frequency
2.5
4.8
3.7
6.4
3.7
6.7
ns
See Figure 3(4)
5.3
8.7
300
MHz
Notes:
1. All typical values are at 25°C and with a 3.3V supply
2. tsk(o) is the magnitude of the time difference between the tPLH or tPHL of all drivers of a single device with all of their inputs
connected together.
3. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both
devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
4. ROUT0 disable time is 1 nanosecond greater.
PS8574
09/28/01
3
PI90LV386
High-Speed Differential
Line Receivers
ParameterMeasurementInformation
R
IN+
V
IRIN+
+ V
2
IRIN–
V
ID
V
IRIN+
V
IC
V
O
R
IN–
V
IRIN–
Figure1.VoltageDefinitions
Table1.ReceiverMinimumandMaximumInputThresholdTestVoltages
Resulting Differential
Input Voltage
Resulting Common-
Mode Input Voltage
Applied Voltages
VIRIN+
1.25V
1.15V
2.4V
2.3V
0.1V
0V
VIRIN
1.15V
1.25V
2.3V
2.4V
0V
VID
VIC
1.2V
1.2V
2.35V
2.35V
0.05V
0.05V
1.2V
1.2V
2.1V
2.1V
0.3V
0.3V
100mV
100mV
100mV
100mV
100mV
100mV
600mV
600mV
600mV
600mV
600mV
600mV
0.1V
0.9V
1.5V
1.8V
2.4V
0V
1.5V
0.9V
2.4V
1.8V
0.6V
0V
0.6V
PS8574
09/28/01
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PI90LV386
High-Speed Differential
Line Receivers
ParameterMeasurementInformation(PI90LV388only)
V
ID
V
IRIN+
C
10pF
L
V
O
V
IRIN–
1.4V
V
IRIN+
V
IRIN–
1V
V
0.4V
ID
0V
–0.4V
t
t
PLH
PHL
V
0V
O
2.4V
0.4V
1.4V
V
OL
t
t
r
f
Note:
1. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1ns, Pulse Repetition
Rate (PRR) = 50 Mpps, Pulse width = 10 ±0.2ns. CL includes instrumentation and fixture capacitance within 0.06m
of the D.U.T.
Figure2.TimingTestCircuitandWaveforms
PS8574
09/28/01
5
PI90LV386
High-Speed Differential
Line Receivers
ParameterMeasurementInformation
R
IN–
1.2V
500 Ohms
R
IN+
C
10pF
+
–
L
V
O
V
TEST
Inputs
EN
Note:
1. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1ns, Pulse Repetition
Rate (PRR) = 0.5 Mpps, pulse width = 500 ±10ns. CL includes instrumentation and fixture capacitance within 0.06m
of the D.U.T.
2.5V
V
TEST
R
IN+
1V
2V
EN
1.4V
0.8V
t
t
PLZ
PZL
2.5V
1.4V
R
OUT
V +0.5V
OL
V
OL
0V
V
TEST
R
IN+
1.4V
2V
EN
1.4V
0.8V
t
t
PHZ
PZH
V
OH
V –0.5V
OL
1.4V
R
OUT
V
OL
Figure3.Enable/DisableTestCircuitandWaveforms
PS8574
09/28/01
6
PI90LV386
High-Speed Differential
Line Receivers
64-PinTSSOP(A)
64
.236
.244
6.0
6.2
.004
.008
1
.665 16.9
.673 17.1
0.09
0.45 .018
0.20
0.75 .030
SEATING
PLANE
.047
Max.
1.20
.319
8.1
BSC
.004
0.10
.002 0.05
.006 0.15
.0197
BSC
0.50
.007
.011
0.17
0.27
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
OrderingInformation
Ordering Code
Package Name
Package Type
64-pin TSSOP (A)
Operating Range
PI90LV386A
A64
40°C to 85°C
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PS8574
09/28/01
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