PT8A260P [ETC]
Mixed-Signal Analog Base? ; 混合信号模拟基？\n
| 型号： | PT8A260P |
| 厂家： | 
ETC |
| 描述： | Mixed-Signal Analog Base?
|
| 文件： | 总3页 (文件大小：21K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Data Sheet
PT Pericom Technology Inc.
PT8A260P Mixed-Signal Analog Base
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Features
PT8A260P is packaged in 16-pin PDIP. The outputs
from op amps, comparator, voltage reference,
oscillator, noise rejection circuit and low battery
detector are provided.
•
2 independent high gain op amps
• On-chip window comparator
• On-chip voltage reference (3.6V)
• Internal 16kHz oscillator
• Low battery detector
• Built-in noise rejection circuit for PIR sensor
applications
1,500 gates of digital gate are also available inside
PT8A260P. Once customers verify their mixed-mode
application/system, a single chip solution can be
integrated by PTI’s factory within 8 weeks after sign
off.
• 16-pin DIP package
General Description
Applications
PT8A260P is a mixed-signal base chip consists of 2
high gain front end amplifier, window comparators,
voltage reference, oscillator and low battery detector.
All the analog modules are well proven and fully
characterized. With another external digital ASIC such
as FPGA, customers can verify their mixed-signal
system faster and with minimum risk.
• PIR sensor controller
• Special sensor control
• Mixed-signal ASIC with analog front end
Block Diagram
Figure 1
V C C GND
VE E
V H
V L
1/2V E E
Voltage
Regulator
Voltage
Divider
1,500 gates
logic
R S T
Reset
T E
Noise
Rejection
Clock
divider
Oscillator
O S C
V _ T R I G
C L K O
T R I G
L B
1/2V E E
V H
-
+
Low Battery
Detector
+
-
+
-
+
-
+
V E E
V L
OP1P OP1N
OP1O OP2P OP2N
OP2O
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Preliminary Data Sheet
PT Pericom Technology Inc.
PT8A260P Mixed-Signal Analog Base
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Pin Assignment
Figure 2
PT8A260P
GND
CLKO
OSC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OP2O
OP2N
OP2P
OP1O
OP1N
OP1P
RST
V_TRIG
TRIG
LB
TE
VCC
VEE
Top view
Pin Description
Table 1
Pin
1
Name
GND
Type
Description
Ground Ground
2
CLKO
O
I
Output from oscillator
Input of oscillator, external resistor or capacitor changeable, resistor pull down, capacitor
pull up, 16kHz for normal application
3
OSC
4
5
6
V_TRIG
TRIG
LB
O
O
O
I
Output from noise rejection circuit (active low)
Output from window comparator (active low)
Output from low battery detector (active high)
Input to enable noise rejection circuit to trigger (active low)
7
8
TE
VCC
Power Power supply
Internal voltage regulator output, 3.6V with respect to ground. Connected to the drain of
PIR sensor
9
VEE
O
10
11
12
13
14
15
16
RST
I
I
Chip reset input, active low
OP1P
OP1N
OP1O
OP2P
OP2N
OP2O
Non-inverted input of first operational amplifier, connected directly to source of PIR sensor
Inverted input of first operational amplifier
Output of first operational amplifier
I
O
I
Non-inverted input of second operational amplifier.
Inverted input of second operational amplifier
Output of second operational amplifier
I
O
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Preliminary Data Sheet
PT Pericom Technology Inc.
PT8A260P Mixed-Signal Analog Base
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Notes
Pericom Technology Inc.
Email: support@pti.com.cn
Web Site: www.pti.com.cn
China:
No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China
Tel: (86)-21-6485 0576 Fax: (86)-21-6485 2181
Asia Pacific: Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong
Tel: (852)-2243 3660 Fax: (852)- 2243 3667
U.S.A.:
2380 Bering Drive, San Jose, California 95131, USA
Tel: (1)-408-435 0800 Fax: (1)-408-435 1100
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to
improve design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any
circuitry described other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry
described herein is free from patent infringement or other rights, of Pericom Technology Incorporation.
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