UC5603PWPTR [ETC]

Terminator ; 终结者\n
UC5603PWPTR
型号: UC5603PWPTR
厂家: ETC    ETC
描述:

Terminator
终结者\n

文件: 总6页 (文件大小:195K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
U C5 60 3  
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SLUS195A – MARCH 1997 – REVISED OCTOBER 2000  
D
Complies with SCSI, SCSI–2 and SPI–2  
Standards  
D
Logic Command Disconnects all  
Termination Lines  
D
6-pF Channel Capacitance during  
Disconnect  
D
D
D
D
Trimmed Termination Current to 3%  
Trimmed Impedance to 3%  
D
D
D
D
100-µA Supply Current in Disconnect Mode  
Meets SCSI Hot Plugging  
Negative Clamping on all Signal Lines  
Current Limit and Thermal Shutdown  
Protection  
–400-mA Sourcing Current for Termination  
+400-mA Sinking Current for Active  
Negation Drivers  
description  
The UC5603 provides 9 lines of active termination for a SCSI (Small Computers Systems Interface) parallel bus.  
The SCSI standard recommends active termination at both ends of the cable segment.  
The UC5603 provides a disconnect feature which, when opened or driven high, will disconnect all terminating  
resistors, and disables the regulator; greatly reducing standby power. The output channels remain high  
impedance even without Termpwr applied. A low channel capacitance of 6 pF allows units at interim points of  
the bus to have little to no effect on the signal integrity.  
Functionally the UC5603 is similar to its predecessor, the UC5601 – 18 line Active Terminator. Several electrical  
enhancements were incorporated in the UC5603, such as a sink/source regulator output stage to accommodate  
all signal lines at 5 V, while the regulator remains at its nominal value, reduced channel capacitance to 6 pF  
typical, and as with the UC5601, custom power packages are utilized to allow normal operation at full power  
conditions (1.2 watts).  
functional block diagram  
UDG-94049  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
UC 5 60 3  
9 Ć L I N E S C S I A C T I V E T E R M I N ATO R  
ą
SLUS195A – MARCH 1997 – REVISED OCTOBER 2000  
description (continued)  
Internal circuit trimming is utilized, first to trim the impedance to a 3% tolerance, and then most importantly, to  
trim the output current to a 3% tolerance, as close to the max SCSI spec as possible, which maximizes noise  
margin in fast SCSI operation.  
Other features include negative clamping on all signal lines to protect external circuitry from latch-up, thermal  
shutdown and current limit.  
This device is offered in low thermal resistance versions of the industry standard 16 pin narrow body SOIC, and  
24 pin TSSOP.  
connection diagrams  
N PACKAGE  
(TOP VIEW)  
PWP PACKAGE  
(TOP VIEW)  
LINE7  
LINE8  
LINE6  
LINE5  
REG  
N/C  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
LINE7  
LINE8  
LINE9  
N/C  
SGND  
GND*  
GND*  
GND*  
GND*  
LINE6  
LINE5  
REG  
2
3
LINE9  
4
N/C  
N/C  
5
GND*  
GND*  
GND*  
GND*  
N/C  
TRMPR  
LINE4  
LINE3  
SGND  
DISCNCT  
LINE1  
N/C  
6
11 TRMPWR  
10 LINE4  
7
8
LINE2  
9
LINE3  
9
10  
11  
12  
DISCNCT  
LINE1  
LINE2  
DP PACKAGE  
(TOP VIEW)  
LINE7  
LINE8  
LINE9  
GND*  
LINE6  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
LINE5  
REG  
* PWP package pin 5 serves as signal ground; pins 6,  
7, 8, 9, 17, 18, 19, and 20 serve as heatsink/ground.  
GND*  
SGND*  
GND*  
DISCNCT  
TRMPWR  
LINE4  
LINE3  
* DP package pin 5 serves as signal ground; pins 4,  
12, 13 serve as heatsink/ground.  
LINE1  
LINE2  
ORDERING INFORMATION  
Packaged Devices  
SOIC-16 (DP)  
T
A
= T  
J
TSSOP-24  
(PWP)  
DIL -16(N)  
0°C to 70°C  
UC5603N  
UCUC5603DP  
UCUC5603PWP  
DP (SOIC–16) and PWP (TSSOP–24) packages are available taped and reeled. Add TR  
suffix to device type (e.g. UC5603PWPTR) to order quantities of 2000 devices per reel.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
U C5 60 3  
9 Ć L I N E S C S I A C T I V E T E R M I N ATO R  
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SLUS195A – MARCH 1997 – REVISED OCTOBER 2000  
absolute maximum ratings over operating free-air temperature (unless otherwise noted)  
Termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
Signal line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 7 V  
Regulator output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 A  
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
Operating temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C  
Lead temperature (soldering, 10 sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
Unless otherwise specified all voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Consult  
Packaging Section of Unitrode Integrated Circuits databook for thermal limitations and considerations of packages.  
recommended operating conditions  
Termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 V to 5.25 V  
Signal line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 5 V  
Disconnect input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to Termpwr  
electrical characteristics, these specifications apply for T = 0°C to 70°C. TRMPWR = 4.75 V  
A
DISCNCT = 0 V, T = T , (unless otherwise stated)  
A
J
supply current section  
PARAMETER  
TEST CONDITIONS  
All termination lines = Open  
MIN  
TYP  
12  
MAX  
18  
UNITS  
mA  
Termpwr supply current  
Power down mode  
All termination lines = 0.5 V  
DISCNCT = Open  
200  
100  
220  
150  
mA  
µA  
output section (terminator lines)  
PARAMETER  
TEST CONDITIONS  
= –5 mA to –15 mA  
MIN  
107  
2.7  
TYP  
110  
2.9  
MAX  
UNITS  
Terminator impedance  
Output high voltage  
I  
113  
LINE  
V
V
V
= 4 V,  
See Note 1  
V
TRMPWR  
T
= 25°C  
–21.1 –21.9 –22.4  
–20.5 –21.9 –22.4  
–20.3 –21.9 –22.4  
–19.8 –21.9 –22.4  
–22.0 –24.0 –25.4  
mA  
mA  
mA  
mA  
mA  
V
J
Max output current  
= 0.5 V  
LINE  
0°C < T < 70°C  
J
T
J
= 25°C  
= 0.5 V,  
TRMPWR = 4 V,  
LINE  
See Note 1  
0°C < T < 70°C  
Max output current  
Output clamp level  
J
V
= 0.2 V,  
LINE  
= –30 mA  
TRMPWR = 4.0 V to 5.25 V  
0°C < T < 70°C  
J
I
–0.2 –0.05  
10  
0.1  
400  
100  
LINE  
V
V
= 0 to 4 V  
= 5.25 V  
nA  
LINE  
TRMPWR = 0 V to 5.25,  
VREG = 0 V  
µA  
LINE  
Output leakage  
DISCNCT = 4 V  
TRMPWR = 0 V to 5.25 V,  
REG = Open  
10  
6
400  
8
nA  
pF  
V
LINE  
= 0 V to 5.25 V  
Output capacitance  
DISCNCT = Open  
See Note 2  
DP Package  
NOTES: 1. Measuring each termination line while other 8 are low (0.5 V).  
2. Ensured by design. Not production tested.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
UC 5 60 3  
9 Ć L I N E S C S I A C T I V E T E R M I N ATO R  
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SLUS195A – MARCH 1997 – REVISED OCTOBER 2000  
regulator section  
PARAMETER  
Regulator output voltage  
Regulator output voltage  
Line regulation  
TEST CONDITIONS  
MIN  
2.8  
2.8  
TYP  
2.9  
MAX  
UNITS  
3
V
V
All termination lines = 5 V  
TRMPWR = 4 V to 6 V  
2.9  
10  
3
20  
50  
1
mV  
mV  
V
Load regulation  
I
= 100 mA to –100 mA  
REG  
All termination lines = 0.5 V  
20  
Drop out voltage  
0.7  
Short circuit current  
Sinking current capability  
Thermal shutdown  
V
V
= 0 V  
–200 –400 –600  
mA  
mA  
°C  
°C  
REG  
= 3.5 V  
200  
400  
170  
10  
600  
REG  
Thermal shutdown hysteresis  
disconnect section  
PARAMETER  
Disconnect threshold  
Threshold hysteresis  
Input current  
TEST CONDITIONS  
MIN  
1.3  
TYP  
1.5  
160  
10  
MAX  
1.7  
UNITS  
V
100  
250  
15  
mV  
DISCNCT = 0 V  
mA  
APPLICATION INFORMATION  
UDG-94050  
Figure 1. Typical Wide SCSI Bus Configurations Utilizing 1 UC5601 and 1 UC5603 Device  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
U C5 60 3  
9 Ć L I N E S C S I A C T I V E T E R M I N ATO R  
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SLUS195A – MARCH 1997 – REVISED OCTOBER 2000  
APPLICATION INFORMATION  
UDG-94051  
Figure 2. Typical Wide SCSI Bus Configurations Utilizing 3 UC5603 Devices  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
Customers are responsible for their applications using TI components.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 2000, Texas Instruments Incorporated  

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