CLC2005 [EXAR]

Low Cost, 2.7V to 5.5V, 260MHz Rail-to-Rail Amplifiers;
CLC2005
型号: CLC2005
厂家: EXAR CORPORATION    EXAR CORPORATION
描述:

Low Cost, 2.7V to 5.5V, 260MHz Rail-to-Rail Amplifiers

文件: 总19页 (文件大小:2623K)
中文:  中文翻译
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CLC1005, CLC1015, CLC2005  
Low Cost, +2.7V to 5.5V, 260MHz  
Rail-to-Rail Amplifiers  
FEATURES  
ꢀ■  
General Description  
260MHz bandwidth  
ꢀ■  
Fully specified at +2.7V and +5V supplies  
Output voltage range:  
The CLC1005 (single), CLC1015 (single with disable), and CLC2005 (dual)  
are low cost, voltage feedback amplifiers. These amplifiers are designed  
to operate on +2.7V to +5V, or 2.5V supplies. The input voltage range  
extends 300mV below the negative rail and 1.2V below the positive rail.  
ꢀ■  
ꢀ■  
❏■  
0.036V to 4.953V; VS = +5; RL = 2kΩ  
Input voltage range:  
❏■  
-0.3V to +3.8V; VS = +5  
TheCLC1005,CLC1015,andCLC2005offer superiordynamicperformance  
with 260MHz small signal bandwidth and 145V/μs slew rate.The amplifiers  
consume only 4.2mA of supply current per channel and the CLC1015 offers  
a disable supply current of only 127μA.The combination of low power, high  
output current drive, and rail-to-rail performance make these amplifiers well  
suited for battery-powered communication/computing systems.  
ꢀ■  
ꢀ■  
ꢀ■  
ꢀ■  
ꢀ■  
ꢀ■  
145V/μs slew rate  
4.2mA supply current  
Power down to 127μA  
55mA linear output current  
85mA short circuit current  
CLC2005 directly replaces AD8052/42/92  
in single supply applications  
CLC1005 directly replaces AD8051/41/91  
in single supply applications  
The combination of low cost and high performance make the CLC1005,  
CLC1015, and CLC2005 suitable for high volume applications in both  
consumer and industrial applications such as interactive whiteboards,  
wireless phones, scanners, color copiers, and video transmission.  
ꢀ■  
APPLICATIONS  
ꢀ■  
A/D driver  
ꢀ■  
Active filters  
ꢀ■  
CCD imaging systems  
ꢀ■  
CD/DVD ROM  
ꢀ■  
Coaxial cable drivers  
ꢀ■  
High capacitive load driver  
ꢀ■  
Portable/battery-powered applications  
ꢀ■  
Twisted pair driver  
ꢀ■  
Telecom and optical terminals  
ꢀ■  
Video driver  
ꢀ■  
Interactive whiteboards  
Ordering Information - backpage  
2nd & 3rd Harmonic Distortion;V = +2.7V  
S
Output Swing  
-20  
2.7  
V
= 1V  
pp  
o
R = 1kΩ  
f
-30  
-40  
-50  
-60  
-70  
-80  
-90  
3rd  
= 150Ω  
R
L
2nd  
= 150Ω  
R
L
2nd  
= 2kΩ  
R
L
3rd  
L
V = +2.7V  
R
= 2kΩ  
s
R
= 2kΩ  
L
G = -1  
0
5
10  
15  
20  
0
Frequency (MHz)  
Time (0.5μs/div)  
© 2007-2015 Exar Corporation  
1 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Absolute Maximum Ratings  
Operating Conditions  
Supply Voltage Range ...................................................2.5 to 5.5V  
Operating Temperature Range .................................-40°C to 85°C  
Junction Temperature ...........................................................150°C  
Storage Temperature Range...................................-65°C to 150°C  
Lead Temperature (Soldering, 10s) ......................................260°C  
Stresses beyond the limits listed below may cause  
permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect  
device reliability and lifetime.  
VS ...................................................................................0V to +6V  
VIN ............................................................ -VS - 0.5V to +VS +0.5V  
Package Thermal Resistance  
θ
θ
θ
θ
JA (SOIC-8).....................................................................150°C/W  
JA (MSOP-8) .................................................................. 200°C/W  
JA (TSOT23-5) ................................................................215°C/W  
JA (TSOT23-6) ................................................................192°C/W  
Package thermal resistance (θJA), JEDEC standard, multi-layer  
test boards, still air.  
ESD Protection  
SOIC-8 (HBM) .......................................................................2.5kV  
ESD Rating for HBM (Human Body Model) and CDM (Charged  
Device Model).  
© 2007-2015 Exar Corporation  
2 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Electrical Characteristics at +2.7V  
T = 25°C, V = +2.7V, R = 2kΩ, R = 2kΩ to V /2; G = 2; unless otherwise noted.  
A
S
f
L
S
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Frequency Domain Response  
GBWP  
UGBW  
-3dB Gain Bandwidth Product  
Unity Gain Bandwidth(1)  
-3dB Bandwidth  
86  
215  
85  
MHz  
MHz  
MHz  
MHz  
G = +1, V  
= 0.05V  
pp  
OUT  
OUT  
OUT  
BW  
BW  
G = +2, V  
G = +2, V  
= 0.2V  
pp  
SS  
LS  
Large Signal Bandwidth  
= 2V  
36  
pp  
Time Domain  
t , t  
Rise and Fall Time (1)  
Settling Time to 0.1%  
Overshoot  
V
V
V
= 0.2V step; (10% to 90%)  
= 1V step  
3.7  
40  
9
ns  
ns  
R
S
F
OUT  
OUT  
OUT  
t
OS  
SR  
= 0.2V step  
%
Slew Rate  
G = -1, 2.7V step  
130  
V/μs  
Distortion/Noise Response  
HD2  
HD3  
THD  
2nd Harmonic Distortion (1)  
5MHz, V  
5MHz, V  
5MHz, V  
>1MHz  
= 1V  
= 1V  
= 1V  
79  
82  
77  
16  
1.3  
65  
dBc  
dBc  
OUT  
OUT  
OUT  
pp  
pp  
pp  
3rd Harmonic Distortion (1)  
Total Harmonic Distortion (1)  
Input Voltage Noise  
Input Current Noise  
Crosstalk(1)  
dB  
e
nV/√Hz  
pA/√Hz  
dB  
n
i
n
>1MHz  
X
CLC2005, 10MHz  
TALK  
DC Performance  
V
Input Offset Voltage  
Average Drift  
-1.6  
10  
3
mV  
μV/°C  
μA  
IO  
d
VIO  
I
Input Bias Current  
Average Drift  
B
dI  
7
nA/°C  
μA  
B
I
Input Offset Current  
Power Supply Rejection Ratio  
Open Loop Gain  
Supply Current  
0.1  
57  
75  
3.9  
OS  
PSRR  
DC  
52  
dB  
A
dB  
OL  
I
mA  
S
Disable Characteristics (CLC1015)  
T
T
Turn On Time  
150  
25  
ns  
ns  
ON  
Turn Off Time  
OFF  
OFF  
Off Isolation  
5MHz, R = 100Ω  
75  
dB  
μA  
ISO  
L
I
Disable Supply Current  
DIS tied to GND  
58  
100  
SD  
Input Characteristics  
R
C
Input Resistance  
4.3  
1.8  
MΩ  
pF  
V
IN  
IN  
Input Capacitance  
CMIR  
Common Mode Input Range  
Common Mode Rejection Ratio  
-0.3 to 1.5  
87  
CMRR  
DC, V  
= 0 to V - 1.5V  
dB  
CM  
S
Output Characteristics  
0.023 to  
2.66  
0.025 to  
2.653  
0.065 to  
2.55  
R = 10kΩ to V / 2  
V
V
V
L
S
V
Output Swing  
R = 2kΩ to V / 2  
OUT  
L
S
R = 150Ω to V / 2  
L
S
55  
mA  
mA  
mA  
V
I
I
Output Current  
OUT  
SC  
-40°C to +85°C  
= V / 2  
50  
Short Circuit Current  
V
85  
OUT  
S
V
Power Supply Operating Range  
2.5  
2.7  
5.5  
S
Notes:  
1. Rf = 1kΩ was used for optimal performance. (For G = +1, Rf = 0)  
© 2007-2015 Exar Corporation  
3 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Electrical Characteristics at +5V  
T = 25°C, V = +5V, R = 2kΩ, R = 2kΩ to V /2; G = 2; unless otherwise noted.  
A
S
f
L
S
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Frequency Domain Response  
GBWP  
UGBW  
-3dB Gain Bandwidth Product  
Unity Gain Bandwidth(1)  
-3dB Bandwidth  
90  
260  
90  
MHz  
MHz  
MHz  
MHz  
G = +1, V  
G = +2, V  
G = +2, V  
= 0.05V  
pp  
OUT  
OUT  
OUT  
BW  
BW  
= 0.2V  
pp  
SS  
LS  
Large Signal Bandwidth  
= 2V  
40  
pp  
Time Domain  
t , t  
Rise and Fall Time (1)  
Settling Time to 0.1%  
Overshoot  
V
V
V
= 0.2V step  
= 2V step  
3.6  
40  
7
ns  
ns  
R
S
F
OUT  
OUT  
OUT  
t
OS  
SR  
= 0.2V step  
%
Slew Rate  
G = -1, 5V step  
145  
V/μs  
Distortion/Noise Response  
HD2  
HD3  
THD  
2nd Harmonic Distortion (1)  
3rd Harmonic Distortion (1)  
Total Harmonic Distortion (1)  
5MHz, V  
5MHz, V  
5MHz, V  
= 2V  
71  
78  
dBc  
dBc  
dB  
OUT  
OUT  
OUT  
pp  
= 2V  
= 2V  
pp  
pp  
70  
NTSC (3.85MHz), AC-Coupled, R = 150Ω  
0.06  
0.08  
0.07  
0.06  
16  
%
L
DG  
DP  
Differential Gain  
NTSC (3.85MHz), DC-Coupled, R = 150Ω  
%
L
NTSC (3.85MHz), AC-Coupled, R = 150Ω  
°
L
Differential Phase  
NTSC (3.85MHz), DC-Coupled, R = 150Ω  
°
L
e
Input Voltage Noise  
Input Current Noise  
Crosstalk(1)  
>1MHz  
nV/√Hz  
pA/√Hz  
dB  
n
i
n
>1MHz  
1.3  
X
CLC2005, 10MHz  
62  
TALK  
DC Performance  
V
Input Offset Voltage  
Average Drift  
-8  
-8  
1.4  
10  
3
8
8
mV  
μV/°C  
μA  
IO  
d
VIO  
I
Input Bias Current  
Average Drift  
B
dI  
7
nA/°C  
μA  
B
I
Input Offset Current  
Power Supply Rejection Ratio  
Open Loop Gain  
Supply Current  
-0.8  
52  
0.1  
57  
78  
4.2  
0.8  
OS  
PSRR  
DC  
dB  
A
68  
dB  
OL  
I
5.2  
mA  
S
Disable Characteristics (CLC1015)  
T
T
Turn On Time  
150  
25  
ns  
ns  
ON  
Turn Off Time  
OFF  
OFF  
Off Isolation  
5MHz, R = 100Ω  
75  
dB  
μA  
ISO  
L
I
Disable Supply Current  
DIS tied to GND  
127  
170  
SD  
Input Characteristics  
R
Input Resistance  
Input Capacitance  
4.3  
1.8  
MΩ  
pF  
IN  
IN  
C
-0.3 to  
3.8  
CMIR  
Common Mode Input Range  
V
CMRR  
Common Mode Rejection Ratio  
DC, V  
= 0 to V - 1.5V  
72  
87  
dB  
CM  
S
© 2007-2015 Exar Corporation  
4 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Electrical Characteristics at +5V Continued  
T = 25°C, V = +5V, R = 2kΩ, R = 2kΩ to V /2; G = 2; unless otherwise noted.  
A
S
f
L
S
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Output Characteristics  
0.027 to  
4.97  
R = 10kΩ to V / 2  
V
V
V
L
S
0.036 to  
4.953  
V
Output Swing  
R = 2kΩ to V / 2  
L S  
OUT  
0.12 to  
4.8  
R = 150Ω to V / 2  
0.3  
2.5  
4.625  
5.5  
L
S
55  
50  
85  
5
mA  
mA  
mA  
V
I
I
Output Current  
OUT  
SC  
-40°C to +85°C  
V = V / 2  
OUT  
Short Circuit Current  
S
V
Power Supply Operating Range  
S
Notes:  
1. Rf = 1kΩ was used for optimal performance. (For G = +1, Rf = 0)  
© 2007-2015 Exar Corporation  
5 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
CLC1005 Pin Configurations  
CLC1005 Pin Assignments  
TSOT-5  
TSOT-5  
Pin No.  
Pin Name  
OUT  
Description  
Output  
1
2
3
4
5
1
2
3
5
4
OUT  
-Vs  
+Vs  
-IN  
-V  
S
Negative supply  
Positive input  
Negative input  
Positive supply  
+
-
+IN  
-IN  
+IN  
+V  
S
SOIC-8  
SOIC-8  
Pin No.  
Pin Name  
Description  
No Connect  
Negative input  
Positive input  
Negative supply  
No Connect  
Output  
1
2
3
4
5
6
7
8
NC  
-IN  
NC  
-IN  
1
2
3
4
8
7
6
5
NC  
+IN  
+Vs  
OUT  
NC  
-
-V  
S
+
+IN  
-Vs  
NC  
OUT  
+V  
Positive supply  
No Connect  
S
NC  
CLC1015 Pin Configurations  
CLC1015 Pin Assignments  
TSOT-6  
TSOT-6  
Pin No.  
Pin Name  
OUT  
Description  
Output  
1
2
3
4
1
2
3
6
5
4
OUT  
-Vs  
+Vs  
DIS  
-IN  
-V  
S
Negative supply  
Positive input  
Negative input  
+
-
+IN  
-IN  
+IN  
Disable pin. Enabled if pin is left open or tied  
5
6
DIS  
to +V , disabled if pin is tied to -V (which is  
S S  
GND in a single supply application.)  
Positive supply  
+V  
S
© 2007-2015 Exar Corporation  
6 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
CLC2005 Pin Configuration  
CLC2005 Pin Assignments  
SOIC-8 / MSOP-8  
SOIC-8 / MSOP-8  
Pin No.  
Pin Name  
Description  
1
2
3
4
5
6
7
8
OUT1  
-IN1  
Output, channel 1  
OUT1  
-IN1  
+IN1  
-Vs  
1
2
3
4
8
7
6
5
+Vs  
Negative input, channel 1  
Positive input, channel 1  
Negative supply  
+IN1  
OUT2  
-IN2  
-
-V  
S
+
-
+IN2  
-IN2  
Positive input, channel 2  
Negative input, channel 2  
Output, channel 2  
+
+IN2  
OUT2  
+V  
Positive supply  
S
© 2007-2015 Exar Corporation  
7 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Typical Performance Characteristics  
T = 25°C, V = +5V, R = 2kΩ to V /2, G = +2, R = 2kΩ; unless otherwise noted.  
A
S
L
S
F
Non-Inverting Frequency Response V = +5V  
Inverting Frequency Response V = +5V  
S
S
G = -1  
G = 1  
f
R = 2kΩ  
f
R = 0  
G = 2  
R = 1kΩ  
f
G = -10  
f
R = 2kΩ  
G = 10  
f
R = 2kΩ  
G = -5  
R = 2kΩ  
f
G = 5  
R = 2kΩ  
f
G = -2  
R = 2kΩ  
f
0.1  
1
0.1  
1
10  
100  
10  
100  
Frequency (MHz)  
Frequency (MHz)  
Non-Inverting Frequency Response V = +2.7V  
Inverting Frequency Response V = +2.7V  
S
S
G = -1  
G = 1  
f
R = 2kΩ  
f
R = 0  
G = 2  
R = 1kΩ  
f
G = -10  
R = 2kΩ  
f
G = 10  
f
R = 2kΩ  
G = -5  
R = 2kΩ  
f
G = 5  
G = -2  
R = 2kΩ  
f
R = 2kΩ  
f
0.1  
1
10  
100  
0.1  
1
10  
100  
Frequency (MHz)  
Frequency (MHz)  
Frequency Response vs C  
Large Signal Frequency Response  
L
C
= 100pF  
L
R
= 25Ω  
s
V
V
= 1V  
o
pp  
C
R
= 50pF  
L
= 33Ω  
= 2V  
s
o
pp  
C
R
= 20pF  
L
+
= 20Ω  
Rs  
s
-
CL RL  
1kW  
C
= 10pF  
L
R
= 0Ω  
1kW  
s
0.1  
1
10  
100  
0.1  
1
10  
100  
Frequency (MHz)  
Frequency (MHz)  
© 2007-2015 Exar Corporation  
8 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Typical Performance Characteristics  
T = 25°C, V = +5V, R = 2kΩ to V /2, G = +2, R = 2kΩ; unless otherwise noted.  
A
S
L
S
F
Frequency Response vs.Temperature  
Input Voltage Noise vs Frequency  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
1
10  
100  
1k  
10k  
100k  
1M  
Frequency (MHz)  
Frequency (Hz)  
2nd & 3rd Harmonic Distortion V = +5V  
2nd & 3rd Harmonic Distortion V = +2.7V  
S
S
-20  
-20  
V
= 2V  
V = 1V  
o pp  
o
pp  
R = 1kΩ  
3rd  
R = 1kΩ  
f
f
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
R
= 150Ω  
L
2nd  
3rd  
= 150Ω  
R
= 150Ω  
R
L
L
2nd  
= 150Ω  
R
L
2nd  
= 2kΩ  
2nd  
R = 2kΩ  
L
R
L
3rd  
R
3rd  
L
= 2kΩ  
R
= 2kΩ  
L
0
5
0
5
10  
15  
20  
10  
15  
20  
Frequency (MHz)  
Frequency (MHz)  
2nd Harmonic Distortion vs V  
3rd Harmonic Distortion vs V  
O
O
-20  
-20  
R = 1kΩ  
f
R = 1kΩ  
f
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
20MHz  
10MHz  
20MHz  
10MHz  
5MHz  
2MHz  
5MHz  
2MHz  
0.5  
1.0  
1.5  
2.0  
2.5  
0.5  
1.0  
1.5  
2.0  
2.5  
Output Amplitude (V  
)
Output Amplitude (V )  
pp  
pp  
© 2007-2015 Exar Corporation  
9 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Typical Performance Characteristics  
T = 25°C, V = +5V, R = 2kΩ to V /2, G = +2, R = 2kΩ; unless otherwise noted.  
A
S
L
S
F
PSRR  
CMRR  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-40  
-50  
-60  
-70  
-80  
-90  
0.01  
0.1  
1.0  
10  
100  
1k  
0.01  
0.1  
1
100  
10  
Frequency (MHz)  
Frequency (MHz)  
Open Loop Gain & Phase vs. Frequency  
Output Current  
0.8  
0.6  
0.4  
0.2  
0
80  
70  
60  
50  
40  
30  
20  
10  
0
|Gain|  
Linear output current 55mA  
Short circuit current 85mA  
0
-0.2  
-0.4  
Phase  
-45  
-90  
-0.6  
-10  
-20  
-135  
-180  
-0.8  
0.01  
0.1  
1
10  
100  
-100  
-50  
0
50  
100  
Frequency (MHz)  
Output Current (mA)  
Small Signal Pulse Response V = +5V  
Small Signal Pulse Response V = +2.7V  
S
S
R = 1kΩ  
f
R = 1kΩ  
f
Time (20ns/div)  
Time (20ns/div)  
© 2007-2015 Exar Corporation  
10 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Typical Performance Characteristics  
T = 25°C, V = +5V, R = 2kΩ to V /2, G = +2, R = 2kΩ; unless otherwise noted.  
A
S
L
S
F
Large Signal Pulse Response V = +5V  
Output Swing  
S
2.7  
R = 1kΩ  
f
V = +2.7V  
s
R
= 2kΩ  
L
G = -1  
0
Time (20ns/div)  
Time (0.5μs/div)  
Channel Matching V = +5V  
S
R = 1kΩ  
f
R
= 2kΩ  
Channel 1  
L
G = 2  
Channel 2  
0.1  
1
10  
100  
Frequency (MHz)  
© 2007-2015 Exar Corporation  
11 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Application Information  
+Vs  
6.8μF  
General Description  
The CLC1005, CLC1015, and CLC2005 are single supply,  
general purpose, voltage-feedback amplifiers fabricated  
on a complementary bipolar process using a patented  
topography. They feature a rail-to-rail output stage and are  
unity gain stable. Both gain bandwidth and slew rate are  
insensitive to temperature.  
0.1μF  
+
Input  
Output  
-
RL  
0.1μF  
The common mode input range extends to 300mV below  
ground and to 1.2V below V . Exceeding these values will  
s
6.8μF  
G = 1  
not cause phase reversal. However, if the input voltage  
exceeds the rails by more than 0.5V, the input ESD devices  
will begin to conduct. The output will stay at the rail during  
this overdrive condition.  
-Vs  
Figure 3: Unity Gain Circuit  
+Vs  
The design is short circuit protected and offers “soft”  
saturation protection that improves recovery time.  
6.8μF  
+
Figures 1, 2, and 3 illustrate typical circuit configurations for  
non-inverting, inverting, and unity gain topologies for dual  
supply applications. They show the recommended bypass  
capacitor values and overall closed loop gain equations. Figure  
4 shows the typical non-inverting gain circuit for single supply  
applications.  
0.1μF  
In  
+
Out  
-
Rf  
+Vs  
Rg  
6.8μF  
Figure 4: Single Supply Non-Inverting Gain Circuit  
0.1μF  
Input  
+
-
Output  
At non-inverting gains other than G = +1, keep R below 1kΩ  
g
to minimize peaking; thus for optimum response at a gain of  
+2, a feedback resistor of 1kΩ is recommended. Figure 5  
illustrates the CLC1005, CLC1015 and CLC2005 frequency  
response with both 1kΩ and 2kΩ feedback resistors.  
RL  
0.1μF  
6.8μF  
Rf  
Rg  
G = 1 + (Rf/Rg)  
-Vs  
G = 2  
Figure 1: Typical Non-Inverting Gain Circuit  
R
V
= 2kΩ  
= +5V  
L
R = 2kΩ  
f
s
+Vs  
6.8μF  
R = 1kΩ  
f
R1  
0.1μF  
+
Output  
Rg  
Input  
-
RL  
0.1μF  
Rf  
1
10  
100  
Frequency (MHz)  
6.8μF  
G = - (Rf/Rg)  
-Vs  
Figure 5: Frequency Response vs. R  
f
For optimum input offset  
voltage set R1 = Rf || Rg  
Figure 2: Typical Inverting Gain Circuit  
© 2007-2015 Exar Corporation  
12 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
needs to be subtracted from the total power delivered by the  
supplies.  
Overdrive Recovery  
For an amplifier, an overdrive condition occurs when the  
output and/or input ranges are exceeded. The recovery time  
varies based on whether the input or output is overdriven  
and by how much the ranges are exceeded. The CLC1005,  
CLC1015, and CLC2005 will typically recover in less than  
20ns from an overdrive condition. Figure 6 shows the  
CLC2005 in an overdriven condition.  
P = P  
- P  
load  
D
supply  
Supply power is calculated by the standard power equation.  
P
supply  
= V  
× I  
supply RMSsupply  
V
= V - V  
S+ S-  
supply  
Power delivered to a purely resistive load is:  
R
V
= 2kΩ  
2
L
P
load  
= ((V  
)
)/Rload  
eff  
load RMS  
Input  
=2V  
in  
pp  
G = 5  
f
The effective load resistor (Rload ) will need to include the  
effect of the feedback network. For instance,  
eff  
R = 1kΩ  
Output  
Rload in Figure 3 would be calculated as:  
eff  
R || (R + R )  
L
f
g
These measurements are basic and are relatively easy to  
perform with standard lab equipment. For design purposes  
however, prior knowledge of actual signal levels and load  
impedance is needed to determine the dissipated power.  
Here, P can be found from  
D
Time (20ns/div)  
Figure 6: Overdrive Recovery  
P = P  
+ P  
- P  
D
Quiescent  
Dynamic load  
Quiescent power can be derived from the specified I values  
S
along with known supply voltage, V  
be calculated as above with the desired signal amplitudes  
using:  
. Load power can  
supply  
Enable/Disable Function  
The CLC1015 offers an active-low disable pin that can be  
used to lower its supply current. Leave the pin floating to  
enable to part. Pull the disable pin to the negative supply  
(which is ground in a single supply application) to disable  
the output. During the disable condition, the nominal supply  
current will drop below 127μA and the output will be at a  
high impedance with about 2pF capacitance.  
(V  
)
= V  
/ √2  
load RMS  
peak  
( I  
)
= ( V  
)
/ Rload  
eff  
load RMS  
load RMS  
The dynamic power is focused primarily within the output  
stage driving the load. This value can be calculated as:  
Power Dissipation  
P
= (V - V  
)
× ( I )  
load RMS  
Dynamic  
S+  
load RMS  
Power dissipation should not be a factor when operating  
under the stated 2kΩ load condition. However, applications  
with low impedance, DC coupled loads should be analyzed  
to ensure that maximum allowed junction temperature is  
not exceeded. Guidelines listed below can be used to verify  
that the particular application will not cause the device to  
operate beyond it’s intended operating range.  
Assuming the load is referenced in the middle of the power  
rails or V /2.  
supply  
The CLC1015 is short circuit protected. However, this may  
not guarantee that the maximum junction temperature  
(+150°C) is not exceeded under all conditions. Figure 7  
shows the maximum safe power dissipation in the package  
vs. the ambient temperature for the packages available.  
Maximum power levels are set by the absolute maximum  
junction rating of 150°C. To calculate the junction  
temperature, the package thermal resistance value Theta  
JA  
(θ ) is used along with the total die power dissipation.  
JA  
T
= T  
+ (θ × P )  
Ambient JA D  
Junction  
Where T  
is the temperature of the working  
Ambient  
environment.  
In order to determine P , the power dissipated in the load  
D
© 2007-2015 Exar Corporation  
13 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Layout Considerations  
1.5  
General layout and supply bypassing play major roles in  
high frequency performance. Exar has evaluation boards to  
use as a guide for high frequency layout and as an aid in  
device testing and characterization. Follow the steps below  
as a basis for high frequency layout:  
SOIC-8  
1
TSOT-6  
ꢀ■  
Include 6.8µF and 0.1µF ceramic capacitors for power supply  
MSOP-8  
decoupling  
0.5  
TSOT-5  
ꢀ■  
Place the 6.8µF capacitor within 0.75 inches of the power pin  
ꢀ■  
Place the 0.1µF capacitor within 0.1 inches of the power pin  
ꢀ■  
Remove the ground plane under and around the part,  
0
especially near the input and output pins to reduce parasitic  
capacitance  
-40  
-20  
0
20  
40  
60  
80  
Ambient Temperature (°C)  
ꢀ■  
Minimize all trace lengths to reduce series inductances  
Figure 7. Maximum Power Derating  
Refer to the evaluation board layouts below for more  
information.  
Driving Capacitive Loads  
Evaluation Board Information  
Increased phase delay at the output due to capacitive loading  
can cause ringing, peaking in the frequency response, and  
The following evaluation boards are available to aid in the  
testing and layout of these devices:  
possible unstable behavior. Use a series resistance, R ,  
S
between the amplifier and the load to help improve stability  
and settling performance. Refer to Figure 8.  
Evaluation Board #  
CEB002  
Products  
CLC1005 and CLC1015 in TSOT  
CLC1005 in SOIC  
Input  
+
-
Rs  
CEB003  
Output  
CEB006  
CLC2005 in SOIC  
CL  
RL  
Rf  
CEB010  
CLC2005 in MSOP  
Rg  
Evaluation Board Schematics  
Figure 8. Addition of R for Driving Capacitive Loads  
S
Evaluation board schematics and layouts are shown in  
Figures 9-18. These evaluation boards are built for dual-  
supply operation. Follow these steps to use the board in a  
single-supply application:  
Table 1 provides the recommended R for various capacitive  
S
loads. The recommended R values result in approximately  
S
<1dB peaking in the frequency response.  
1. Short -VS to ground.  
2. Use C3 and C4, if the -VS pin of the amplifier is not  
directly connected to the ground plane.  
CL (pF)  
RS (Ω)  
-3dB BW (MHz)  
22pF  
47pF  
0
118  
112  
91  
15  
15  
6.5  
100pF  
492pF  
59  
Table 1: Recommended R vs. C  
S
L
For a given load capacitance, adjust R to optimize the  
S
tradeoff between settling time and bandwidth. In general,  
reducing R will increase bandwidth at the expense of  
S
additional overshoot and ringing.  
© 2007-2015 Exar Corporation  
14 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Figure 11. CEB002 Bottom View  
Figure 9. CEB002 and CEB003 Schematic  
Figure 12. CEB003 Top View  
Figure 10. CEB002 Top View  
Figure 13. CEB003 Bottom View  
© 2007-2015 Exar Corporation  
15 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Figure 16. CEB006 Bottom View  
Figure 14. CEB006 & CEB010 Schematic  
Figure 17. CEB010 Top View  
Figure 15. CEB006 Top View  
Figure 18. CEB010 Bottom View  
© 2007-2015 Exar Corporation  
16 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Mechanical Dimensions  
TSOT-6 Package  
TSOT-5 Package  
© 2007-2015 Exar Corporation  
17 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
MSOP-8 Package  
SOIC-8 Package  
© 2007-2015 Exar Corporation  
18 / 19  
exar.com/CLC1005  
Rev 2D  
CLC1005, CLC1015, CLC2005  
Ordering Information  
Part Number  
Package  
Green  
Operating Temperature Range  
Packaging  
CLC1005 Ordering Information  
CLC1005IST5X  
TSOT-5  
TSOT-5  
Yes  
Yes  
N/A  
Yes  
Yes  
N/A  
-40°C to +85°C  
-40°C to +85°C  
N/A  
Tape & Reel  
Mini Tape & Reel  
N/A  
CLC1005IST5MTR  
CLC1005IST5EVB  
CLC1005ISO8X  
Evaluation Board  
SOIC-8  
-40°C to +85°C  
-40°C to +85°C  
N/A  
Tape & Reel  
Mini Tape & Reel  
N/A  
CLC1005ISO8MTR  
CLC1005ISO8EVB  
CLC1015 Ordering Information  
SOIC-8  
Evaluation Board  
CLC1015IST6X  
TSOT-6  
TSOT-6  
Yes  
Yes  
N/A  
-40°C to +85°C  
-40°C to +85°C  
N/A  
Tape & Reel  
Mini Tape & Reel  
N/A  
CLC1015IST6MTR  
CLC1015IST6EVB  
Evaluation Board  
CLC2005 Ordering Information  
CLC2005ISO8X  
SOIC-8  
SOIC-8  
Yes  
Yes  
N/A  
Yes  
Yes  
N/A  
-40°C to +85°C  
-40°C to +85°C  
N/A  
Tape & Reel  
Mini Tape & Reel  
N/A  
CLC2005ISO8MTR  
CLC2005ISO8EVB  
CLC2005IMP8X  
Evaluation Board  
MSOP-8  
-40°C to +85°C  
-40°C to +85°C  
N/A  
Tape & Reel  
Mini Tape & Reel  
N/A  
CLC2005IMP8MTR  
CLC2005IMP8EVB  
MSOP-8  
Evaluation Board  
Moisture sensitivity level for all parts is MSL-1. Mini tape and reel quantity is 250.  
Revision History  
Revision  
Date  
Description  
Reformat into Exar data sheet template. Updated ordering information table to include MTR and EVB  
part numbers. Updated thermal resistance numbers and package outline drawings. Added CLC1015  
back into data sheet.  
2D (ECN 1513-01)  
March 2015  
For Further Assistance:  
Email: CustomerSupport@exar.com or HPATechSupport@exar.com  
Exar Technical Documentation: http://www.exar.com/techdoc/  
Exar Corporation Headquarters and Sales Offices  
48760 Kato Road  
Fremont, CA 94538 - USA  
Tel.: +1 (510) 668-7000  
Fax: +1 (510) 668-7001  
NOTICE  
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation  
assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free  
of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information  
in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies.  
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected  
to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation  
receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR  
Corporation is adequately protected under the circumstances.  
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.  
© 2007-2015 Exar Corporation  
19 / 19  
exar.com/CLC1005  
Rev 2D  

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