CLC2023IMP8X [EXAR]
Dual, Low Distortion, Low Offset, RRIO Amplifier;
| 型号： | CLC2023IMP8X |
| 厂家： | 
EXAR CORPORATION |
| 描述： | Dual, Low Distortion, Low Offset, RRIO Amplifier |
| 文件： | 总18页 (文件大小：1138K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CLC2023
Dual, Low Distortion, Low Offset, RRIO Amplifier
FEATURES
ꢀ■
General Description
6mV maximum input offset voltage
ꢀ■
0.00005% THD at 1kHz
5.3nV/√Hz input voltage noise > 10kHz
-90dB/-85dB HD2/HD3 at 100kHz, R = 100Ω
<-100dB HD2 and HD3 at 10kHz, R = 1kΩ
Rail-to-rail input and output
55MHz unity gain bandwidth
12V/μs slew rate
-40°C to +125°C operating temperature
range
Fully specified at 3 and 5V supplies
CLC2023: ROHS compliant MSOP-8,
SOIC-8 package options
The CLC2023 is a dual channel, high-performance, voltage feedback
amplifier with low input voltage noise and ultra low distortion.The CLC2023
offers 6mV maximum input offset voltage, 3.5nV/√Hz broadband input
voltage noise, and 0.00005% THD at 1kHz. It also provides 55MHz gain
bandwidth product and 12V/μs slew rate making them well suited for
applications requiring precision DC performance and high AC performance.
This high-performance amplifier also offers a rail-to-rail input and output,
simplifying single supply designs and offering larger dynamic range
possibilities. The input range extends beyond the rails by 300mV.
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L
L
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The CLC2023 is designed to operate from 2.5V to 12V supplies and
operate over the extended temperature range of -40°C to +125°.
APPLICATIONS
ꢀ■
Active filters
ꢀ■
Sensor interface
ꢀ■
HIgh-speed transducer amp
ꢀ■
Medical instrumentation
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Probe equipment
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Test equipment
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Smoke detectors
ꢀ■
Hand-held analytic instruments
ꢀ■
Current sense applications
Ordering Information - back page
Crosstalk vs. Frequency
Typical Application
-60
-65
-70
-75
-80
-85
-90
-95
-100
+2.7
6.8μF
+
0.1μF
In
+
½
Out
CLC2023
-
RIN
ROUT
Vs = +/- 5V, RL = 150Ω, VOUT = 2Vpp
Rg
0.01
0.1
1
Rf
Frequency (MHz)
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exar.com/CLC2023
Rev 1D
CLC2023
Absolute Maximum Ratings
Operating Conditions
Supply Voltage Range ................................................. 2.5V to 12V
Operating Temperature Range ...............................-40°C to 125°C
Junction Temperature ...........................................................150°C
Storage Temperature Range...................................-65°C to 150°C
Lead Temperature (Soldering, 10s) ......................................260°C
Stresses beyond the limits listed below may cause
permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect
device reliability and lifetime.
VS ................................................................................. 0V to +14V
VIN ............................................................ -VS - 0.5V to +VS +0.5V
Package Thermal Resistance
θ
JA (MSOP-8) .................................................................. 200°C/W
θ
JA (SOIC-8).....................................................................150°C/W
Package thermal resistance (θJA), JEDEC standard, multi-layer
test boards, still air.
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exar.com/CLC2023
Rev 1D
CLC2023
Electrical Characteristics at +3V
T = 25°C, V = +3V, R = 1kΩ, R = 1kΩ to V /2; G = 2; unless otherwise noted.
A
S
f
L
S
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
GBWP
UGBW
-3dB Gain Bandwidth Product
Unity Gain Bandwidth
-3dB Bandwidth
G = 10, V
= 0.05V
31
50
24
3.3
MHz
MHz
MHz
MHz
OUT
pp
V
V
V
= 0.05V , R = 0
OUT
OUT
OUT
pp
pp
f
BW
BW
= 0.05V
= 2V
SS
LS
Large Signal Bandwidth
pp
Time Domain
t , t
Rise and Fall Time
Settling Time to 0.1%
Overshoot
V
V
V
= 2V step; (10% to 90%)
= 2V step
150
78
ns
ns
R
F
OUT
OUT
OUT
t
S
OS
SR
= 2V step
0.3
11
%
Slew Rate
2V step
V/μs
Distortion/Noise Response
2V , 10kHz, R = 1kΩ
-98
-85
dBc
dBc
pp
L
HD2
2nd Harmonic Distortion
2V , 100kHz, R = 100Ω
pp
L
2V , 10kHz, R = 1kΩ
-95
dBc
pp
L
HD3
THD
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
Crosstalk
2V , 100kHz, R = 100Ω
-81
dBc
pp
L
1V , 1kHz, G = 1, R = 2kΩ
0.0005
5.5
%
pp
L
>10kHz
nV/√Hz
nV/√Hz
dB
e
n
>100kHz
1MHz
3.9
X
70
TALK
DC Performance
V
Input Offset Voltage
Average Drift
0.088
1.3
mV
μV/°C
μA
IO
d
VIO
I
Input Bias Current
Average Drift
-0.340
0.8
B
dI
nA/°C
μA
B
I
Input Offset Current
Power Supply Rejection Ratio
Open Loop Gain
Supply Current
0.2
OS
PSRR
DC
100
dB
A
V
= V / 2
104
dB
OL
OUT
S
I
per channel
1.85
mA
S
Input Characteristics
R
Input Resistance
Non-inverting, G = 1
30
1.1
MΩ
pF
V
IN
IN
C
Input Capacitance
CMIR
Common Mode Input Range
Common Mode Rejection Ratio
-0.3 to 3.3
75
CMRR
DC, V
= 0.5V to 2.5V
dB
CM
Output Characteristics
0.085 to
2.80
R = 150Ω
V
V
L
V
Output Swing
OUT
0.04 to
2.91
R = 1kΩ
L
I
I
Output Current
+57, -47
+65, -52
mA
mA
OUT
SC
Short Circuit Current
V
= V / 2
OUT S
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exar.com/CLC2023
Rev 1D
CLC2023
Electrical Characteristics at ±±V
T = 25°C, V = 5V, R = 1kΩ, R = 1kΩ to GND; G = 2; unless otherwise noted.
A
S
f
L
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
GBWP
UGBW
-3dB Gain Bandwidth Product
Unity Gain Bandwidth
-3dB Bandwidth
G = 10, V
= 0.05V
35
55
25
3.6
MHz
MHz
MHz
MHz
OUT
pp
V
V
V
= 0.05V , R = 0
OUT
OUT
OUT
pp
pp
f
BW
BW
= 0.05V
= 2V
SS
LS
Large Signal Bandwidth
pp
Time Domain
t , t
Rise and Fall Time
Settling Time to 0.1%
Overshoot
V
V
V
= 2V step; (10% to 90%)
= 2V step
125
80
ns
ns
R
F
OUT
OUT
OUT
t
S
OS
SR
= 2V step
0.3
12
%
Slew Rate
4V step
V/μs
Distortion/Noise Response
2V , 10kHz, R = 1kΩ
-125
-90
dBc
dBc
pp
L
HD2
2nd Harmonic Distortion
2V , 100kHz, R = 100Ω
pp
L
2V , 10kHz, R = 1kΩ
-127
-85
dBc
pp
L
HD3
THD
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
Crosstalk
2V , 100kHz, R = 100Ω
dBc
pp
L
1V , 1kHz, G = 1, R = 2kΩ
0.00005
5.3
%
pp
L
>10kHz
nV/√Hz
nV/√Hz
dB
e
n
>100kHz
1MHz
3.5
X
70
TALK
DC Performance
V
Input Offset Voltage
Average Drift
-6
0.050
1.3
6
mV
μV/°C
μA
IO
d
VIO
I
Input Bias Current
Average Drift
-2.6
-0.30
0.85
0.2
2.6
0.7
B
dI
nA/°C
μA
B
I
Input Offset Current
Power Supply Rejection Ratio
Open Loop Gain
Supply Current
OS
PSRR
DC
82
95
100
115
dB
A
V
= V / 2
dB
OL
OUT
S
I
per channel
2.2
2.75
mA
S
Input Characteristics
R
Input Resistance
Non-inverting, G = 1
30
1
MΩ
pF
V
IN
IN
C
Input Capacitance
CMIR
Common Mode Input Range
Common Mode Rejection Ratio
5.3
85
CMRR
DC, V
= -3V to 3V
70
dB
CM
Output Characteristics
-4.826 to
4.534
R = 150Ω
V
V
L
V
Output Swing
OUT
-4.93 to
4.85
R = 1kΩ
L
-4.7
4.7
I
I
Output Current
+60, -48
+65, -52
mA
mA
OUT
SC
Short Circuit Current
V
= V / 2
OUT S
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exar.com/CLC2023
Rev 1D
CLC2023
CLC2023 Pin Configuration
CLC2023 Pin Assignments
MSOP-8 / SOIC-8
MSOP-8 / SOIC-8
Pin No.
Pin Name
OUT1
-IN1
Description
OUT1
-IN1
+IN1
-Vs
1
2
3
4
8
7
6
5
+Vs
1
2
3
4
5
6
7
8
Output, channel 1
Negative input, channel 1
Positive input, channel 1
Negative supply
OUT2
-IN2
-
+IN1
+
-
-V
S
+
+IN2
-IN2
Positive input, channel 2
Negative input, channel 2
Output, channel 2
+IN2
OUT2
+V
Positive supply
S
© 2007-2014 Exar Corporation
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exar.com/CLC2023
Rev 1D
CLC2023
Typical Performance Characteristics
T = 25°C, V = 5V, R = 1kΩ, R = 1kΩ, G = 2; unless otherwise noted.
A
S
f
L
Non-Inverting Frequency Response
Inverting Frequency Response
3
1
0
G = 1
Rf = 0
0
-1
G = -1
-2
-3
-4
-5
-6
-7
G = -2
G = 2
-3
G = -5
G = 5
G = -10
G = 10
-6
VOUT = 0.05Vpp
VOUT = 0.05Vpp
-9
0.1
1
10
100
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. C
Frequency Response vs. C without R
L
L
S
1
0
4
2
-1
-2
-3
-4
-5
-6
-7
CL = 500pF
Rs = 10Ω
CL = 500pF
0
CL = 1000pF
Rs = 7.5Ω
CL = 300pF
-2
CL = 3000pF
Rs = 4Ω
CL = 100pF
-4
CL = 50pF
-6
-8
CL = 10pF
VOUT = 0.05Vpp
Rs = 0Ω
VOUT = 0.05Vpp
0.1
1
10
100
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
Frequency Response vs.V
Frequency Response vs. R
L
OUT
3
0
2
1
RL = 50Ω
RL = 150Ω
0
RL = 2.5KΩ
VOUT = 1Vpp
VOUT = 2Vpp
VOUT = 4Vpp
-1
-2
-3
-4
-5
-6
RL = 1KΩ
-3
-6
-9
VOUT = 0.05Vpp
0.1
1
10
100
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
© 2007-2014 Exar Corporation
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exar.com/CLC2023
Rev 1D
CLC2023
Typical Performance Characteristics
T = 25°C, V = 5V, R = 1kΩ, R = 1kΩ, G = 2; unless otherwise noted.
A
S
f
L
Non-Inverting Frequency Response at V = 3V
Inverting Frequency Response at V = 3V
S
S
1
3
G = 1
Rf = 0
0
-1
0
G = -1
-2
-3
-4
-5
-6
-7
G = -2
G = 2
G = -5
-3
G = 5
G = -10
G = 10
-6
VOUT = 0.05Vpp
VOUT = 0.05Vpp
-9
0.1
1
10
100
0.1
1
10
100
100
2.5
Frequency (MHz)
Frequency (MHz)
Frequency Response vs.V
at V = 3V
Frequency Response vs. R at V = 3V
OUT
S
L
S
3
2
RL = 50Ω
RL = 150Ω
1
0
0
RL = 2.5KΩ
VOUT = 1Vpp
-1
-2
-3
-4
-5
-6
RL = 1KΩ
VOUT = 2Vpp
VOUT = 2.5Vpp
-3
-6
VOUT = 0.05Vpp
-9
0.1
1
10
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
-3dB Bandwidth vs. Output Voltage at V = 3V
-3dB Bandwidth vs. Output Voltage
S
24
21
18
15
12
9
24
21
18
15
12
9
6
6
3
3
0
0
0.0
0.5
1.0
1.5
2.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VOUT (VPP)
VOUT (VPP)
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exar.com/CLC2023
Rev 1D
CLC2023
Typical Performance Characteristics
T = 25°C, V = 5V, R = 1kΩ, R = 1kΩ, G = 2; unless otherwise noted.
A
S
f
L
Open Loop Gain and Phase vs.
CMIR
0.5
80
60
40
0
-75
0.4
0.3
0.2
0.1
0
PHASE
-150
-225
-300
-375
-450
-525
20
GAIN
0
-20
-40
-60
-0.1
10
100
1,000
10,000
100,000
1,000,000
-6
-4
-2
0
2
4
6
FREQ (KHz)
Vcm(V)
Input Voltage Noise
CMIR at V = 3V
S
0.5
0.4
0.3
0.2
0.1
0
14
13
12
11
10
9
8
7
6
5
4
3
2
-0.1
0.0001
0.001
0.01
0.1
1
-1
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
Frequency (MHz)
Vcm(V)
CMRR vs. Frequency
PSRR vs. Frequency
110
100
90
110
100
90
80
70
60
50
80
70
60
50
40
0.001
1000
0
1000
0
0.01
0.1
1
10
100
0.001
0.01
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
© 2007-2014 Exar Corporation
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exar.com/CLC2023
Rev 1D
CLC2023
Typical Performance Characteristics
T = 25°C, V = 5V, R = 1kΩ, R = 1kΩ, G = 2; unless otherwise noted.
A
S
f
L
2nd Harmonic Distortion vs. R
3rd Harmonic Distortion vs. R
L
L
-50
-50
-60
-60
RL = 100Ω
RL = 10KΩ
-70
-80
-90
-70
RL = 100Ω
-80
-90
RL = 10KΩ
RL = 1KΩ
RL = 500Ω
RL = 1KΩ
RL = 500Ω
-100
-110
-100
VOUT = 2Vpp
VOUT = 2Vpp
-110
100
200
300
400
500
600
700
800
900
1000
100
200
300
400
500
600
700
800
900
1000
Frequency (KHz)
Frequency (KHz)
2nd Harmonic Distortion vs.V
3rd Harmonic Distortion vs.V
OUT
OUT
-40
-30
-40
-50
-50
-60
RF=RL=1K
-60
RF=RL=1K
-70
-80
-70
-80
RF=RL=10K
RF=RL=10K
-90
-90
FREQ = 500KHz
FREQ = 500KHz
-100
-100
0.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
0.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
Output Amplitude (Vpp
)
Output Amplitude (Vpp
)
THD vs. Frequency
-65
-70
-75
-80
-85
-90
VOUT = 1Vpp
RL = 1K
AV+1
-95
-100
100
200
300
400
500
600
700
800
900
1000
Frequency (kHz)
© 2007-2014 Exar Corporation
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exar.com/CLC2023
Rev 1D
CLC2023
Typical Performance Characteristics
T = 25°C, V = 5V, R = 1kΩ, R = 1kΩ, G = 2; unless otherwise noted.
A
S
f
L
2nd Harmonic Distortion vs. R at V = 3V
3rd Harmonic Distortion vs. R at V = 3V
L
S
L
S
-40
-40
-50
-50
RL = 100Ω
-60
-60
RL = 100Ω
-70
-70
RL = 10KΩ
RL = 1KΩ
RL = 500Ω
-80
-80
RL = 10KΩ
RL = 1KΩ
RL = 500Ω
-90
-90
VOUT = 2Vpp
VOUT = 2Vpp
-100
-100
100
200
300
400
500
600
700
800
900
1000
100
200
300
400
500
600
700
800
900
1000
Frequency (KHz)
Frequency (KHz)
2nd Harmonic Distortion vs.V
at V = 3V
3rd Harmonic Distortion vs.V
at V = 3V
OUT
S
OUT
S
-40
-40
-50
-60
-50
-60
RF=RL=10K
RF=RL=1K
RF=RL=10K
-70
-80
-70
-80
RF=RL=1K
-90
-90
FREQ = 500KHz
FREQ = 500KHz
-100
-100
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
Output Amplitude (Vpp
)
Output Amplitude (Vpp
)
THD vs. Frequency at V = 3V
S
-65
-70
-75
-80
-85
-90
-95
-100
VOUT = 1Vpp
RL = 1K
AV+1
100
200
300
400
500
600
700
800
900
1000
Frequency (kHz)
© 2007-2014 Exar Corporation
10 / 18
exar.com/CLC2023
Rev 1D
CLC2023
Typical Performance Characteristics
T = 25°C, V = 5V, R = 1kΩ, R = 1kΩ, G = 2; unless otherwise noted.
A
S
f
L
Small Signal Pulse Response
Small Signal Pulse Response at V = 3V
S
0.75
1.65
0.5
0.25
0
1.6
1.55
1.5
-0.25
-0.5
-0.75
1.45
1.4
1.35
0
0.5
1
1.5
2
0
0.5
1
1.5
2
Time (ns)
Time (ns)
Large Signal Pulse Response
Large Signal Pulse Response at V = 3V
S
6
3
2.5
2
4
2
0
1.5
1
-2
-4
-6
0.5
0
0
1
2
3
4
5
6
7
8
9
10
0
0.5
1
1.5
2
Time (ns)
Time (ns)
© 2007-2014 Exar Corporation
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exar.com/CLC2023
Rev 1D
CLC2023
Where T
environment.
is the temperature of the working
Application Information
Ambient
Basic Information
In order to determine P , the power dissipated in the load
needs to be subtracted from the total power delivered by the
supplies.
D
Figures 1 and 2 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
P = P
- P
load
D
supply
+Vs
6.8μF
Supply power is calculated by the standard power equation.
P
supply
= V
× I
supply RMSsupply
0.1μF
V
= V - V
S+ S-
Input
supply
+
-
Output
RL
Power delivered to a purely resistive load is:
0.1μF
6.8μF
Rf
2
P
load
= ((V
)
)/Rload
eff
load RMS
Rg
G = 1 + (Rf/Rg)
-Vs
The effective load resistor (Rload ) will need to include the
eff
Figure 1: Typical Non-Inverting Gain Circuit
effect of the feedback network. For instance,
Rload in Figure 2 would be calculated as:
eff
+Vs
R || (R + R )
6.8μF
L
f
g
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
R1
0.1μF
+
Output
Rg
Here, P can be found from
Input
-
D
RL
P = P
D
+ P
- P
Quiescent
Dynamic load
0.1μF
Rf
Quiescent power can be derived from the specified I values
S
along with known supply voltage, V
be calculated as above with the desired signal amplitudes
using:
. Load power can
6.8μF
G = - (Rf/Rg)
-Vs
supply
For optimum input offset
voltage set R1 = Rf || Rg
Figure 2: Typical Inverting Gain Circuit
(V
)
)
= V
/ √2
peak
load RMS
( I
= ( V
)
/ Rload
eff
Power Dissipation
load RMS
load RMS
Power dissipation should not be a factor when operating
under the stated 500Ω load condition. However, applications
with low impedance, DC coupled loads should be analyzed
to ensure that maximum allowed junction temperature is
not exceeded. Guidelines listed below can be used to verify
that the particular application will not cause the device to
operate beyond it’s intended operating range.
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
P
= (V - V
)
× ( I )
load RMS
Dynamic
S+
load RMS
Assuming the load is referenced in the middle of the power
rails or V /2.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
supply
temperature, the package thermal resistance value Theta
JA
(θ ) is used along with the total die power dissipation.
Figure 3 shows the maximum safe power dissipation in
the package vs. the ambient temperature for the packages
available.
JA
T
= T
+ (θ × P )
Ambient JA D
Junction
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CLC2023
Overdrive Recovery
1.5
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for the
amplifier to return to its normal or linear operating point.The
recovery time varies based on whether the input or output
is overdriven and by how much the ranges are exceeded.
The CLC2023 will typically recover in less than 20ns from
an overdrive condition. Figure 5 shows the CLC2023 in an
overdriven condition.
SOIC-8
1
0.5
MSOP-8
3
2
2
0
VIN = .8Vpp
G = 5
-40
-20
0
20
40
60
80
100
120
2
Ambient Temperature (°C)
1
Figure 3. Maximum Power Derating
1
Input
1
0
0
Driving Capacitive Loads
Output
-1
-1
-2
-2
-1
-2
-3
Increased phase delay at the output due to capacitive loading
can cause ringing, peaking in the frequency response, and
possible unstable behavior. Use a series resistance, R ,
between the amplifier and the load to help improve stability
and settling performance. Refer to Figure 4.
S
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
Time (us)
Figure 5: Overdrive Recovery
Input
+
-
Rs
Output
CL
RL
Considerations for Offset and Noise Performance
Offset Analysis
Rf
Rg
There are three sources of offset contribution to consider;
input bias current, input bias current mismatch, and input
offset voltage. The input bias currents are assumed to be
equal with and additional offset current in one of the inputs
to account for mismatch. The bias currents will not affect
Figure 4. Addition of R for Driving Capacitive Loads
S
The CLC2023 is capable of driving up to 300pF directly, with
no series resistance. Directly driving 500pF causes over
4dB of frequency peaking, as shown in the plot on page 6.
the offset as long as the parallel combination of R and R
f
g
matches R . Refer to Figure 6.
t
Table 1 provides the recommended R for various capacitive
+V
s
S
R
R
f
g
loads.The recommended R values result in ≤ 1dB peaking
S
in the frequency response. The Frequency Response vs.
C plots, on page 6, illustrate the response of the CLC2023.
L
–
R
CLC2023
+
t
IN
CL (pF)
RS (Ω)
-3dB BW (MHz)
R
L
500
1000
3000
10
7. 5
4
27
20
15
-V
s
Figure 6: Circuit for Evaluating Offset
Table 1: Recommended R vs. C
S
L
The first place to start is to determine the source resistance.
If it is very small an additional resistance may need to be
added to keep the values of R and R to practical levels.
For a given load capacitance, adjust R to optimize the
S
tradeoff between settling time and bandwidth. In general,
f
g
For this analysis we assume that R is the total resistance
reducing R will increase bandwidth at the expense of
t
S
present on the non-inverting input. This gives us one
equation that we must solve:
additional overshoot and ringing.
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CLC2023
R = R ||R
f
The complete equation can be simplified to:
t
g
This equation can be rearranged to solve for R :
2
2
)
g
2
o
v
= 3 ∗ 4kT ∗ G ∗RT + e G + 2 ∗ i ∗RT
(
)
(
)
(
n n
R = (R * R ) / (R - R )
g
t
f
f
t
The other consideration is desired gain (G) which is:
G = (1 + R /R )
It’s easy to see that the effect of amplifier voltage noise
is proportionate to gain and will tend to dominate at large
gains. The other terms will have their greatest impact at
f
g
By plugging in the value for R we get
g
large R values at lower gains.
t
R = G * R
f
t
And R can be written in terms of R and G as follows:
g
t
Layout Considerations
General layout and supply bypassing play major roles in
high frequency performance. Exar has evaluation boards to
use as a guide for high frequency layout and as an aid in
device testing and characterization. Follow the steps below
as a basis for high frequency layout:
R = (G * R ) / (G - 1)
g
t
The complete input offset equation is now only dependent
on the voltage offset and input offset terms given by:
2
)
2
ꢀ■
Include 6.8µF and 0.1µF ceramic capacitors for power supply
VI
=
V
+ I ∗ RT
(
(
)
OS
IO
OS
decoupling
ꢀ■
Place the 6.8µF capacitor within 0.75 inches of the power pin
And the output offset is:
ꢀ■
Place the 0.1µF capacitor within 0.1 inches of the power pin
2
)
2
)
ꢀ■
Remove the ground plane under and around the part,
especially near the input and output pins to reduce parasitic
capacitance
VO
= G ∗
V
+ I ∗ RT
(
(
OS
IO
OS
ꢀ■
Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts below for more
information.
Noise analysis
The complete equivalent noise circuit is shown in Figure 7.
R
R
f
g
Evaluation Board Information
+ –
+ –
The following evaluation boards are available to aid in the
testing and layout of these devices:
–
R
CLC2023
+
g
+ –
+ –
Evaluation Board #
CEB006
Products
CLC2023 in SOIC-8
CLC2023 in MSOP-8
+
–
R
L
CEB010
Figure 7: Complete Equivalent Noise Circuit
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in
Figures 8-12 These evaluation boards are built for dual-
supply operation. Follow these steps to use the board in a
single-supply application:
The complete noise equation is given by:
2
)
2
2
2
2
RF
RF
v
=
v
+
e
1 +
+ i ∗ RT 1 +
+ i ∗ RF
(
o
orext
n
bp
bn
RG
RG
1. Short -VS to ground.
2. Use C3 and C4, if the -VS pin of the amplifier is not
directly connected to the ground plane.
Where V
is given by:
is the noise due to the external resistors and
orext
2
2
2
F
2
RF
RF
= e 1 +
+ e ∗
+ e
v
o
n
G
RG
RG
© 2007-2014 Exar Corporation
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exar.com/CLC2023
Rev 1D
CLC2023
Figure 10. CEB006 Bottom View
Figure 8. CEB006 & CEB010 Schematic
Figure 11. CEB010 Top View
Figure 9. CEB006 Top View
Figure 12. CEB010 Bottom View
© 2007-2014 Exar Corporation
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Rev 1D
CLC2023
Mechanical Dimensions
SOIC-8 Package
© 2007-2014 Exar Corporation
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Rev 1D
CLC2023
MSOP-8 Package
© 2007-2014 Exar Corporation
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Rev 1D
CLC2023
Ordering Information
Part Number
Package
Green
Operating Temperature Range
Packaging
CLC2023 Ordering Information
CLC2023IMP8X
MSOP-8
MSOP-8
Yes
Yes
N/A
Yes
Yes
N/A
-40°C to +125°C
-40°C to +125°C
N/A
Tape & Reel
Mini Tape & Reel
N/A
CLC2023IMP8MTR
CLC2023IMP8EVB
CLC2023ISO8X
Evaluation Board
SOIC-8
-40°C to +125°C
-40°C to +125°C
N/A
Tape & Reel
Mini Tape & Reel
N/A
CLC2023ISO8MTR
CLC2023ISO8EVB
SOIC-8
Evaluation Board
Moisture sensitivity level for all parts is MSL-1.
Revision History
Revision
Date
Description
Reformat into Exar data sheet template. Updated ordering information table to include MTR and EVB
part numbers. Increased “I” temperature range from +85 to +125°C. Removed “A” temp grade parts,
since “I” is now equivalent. Updated thermal resistance numbers and package outline drawings.
December
2014
1D (ECN 1451-06)
For Further Assistance:
Email: CustomerSupport@exar.com or HPATechSupport@exar.com
Exar Technical Documentation: http://www.exar.com/techdoc/
Exar Corporation Headquarters and Sales Offices
48760 Kato Road
Fremont, CA 94538 - USA
Tel.: +1 (510) 668-7000
Fax: +1 (510) 668-7001
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation
assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free
of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information
in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected
to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation
receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR
Corporation is adequately protected under the circumstances.
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
© 2007-2014 Exar Corporation
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Rev 1D
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