EM1106 [EXCELLIANCE]

600mA High PSRR Low Noise LDO;
EM1106
型号: EM1106
厂家: Excelliance MOS    Excelliance MOS
描述:

600mA High PSRR Low Noise LDO

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EM1106  
600mA High PSRR Low Noise LDO  
General Description  
Applications  
The EM1106 performs ultra low drop voltage,  
high power supply rejection ratio (PSRR), fast  
response, low noise linear regulator, and designed  
to continuously deliver up to 600mA output current.  
The EM1106 has wide adjustable output voltage  
range and high output accuracy to 2%.  
No by-pass capacitor is needed for this device  
and only 1uF ceramic capacitor is required for  
stability in any loading conditions. It reduces the  
amount of board space necessary for power  
applications.  
Cellular Handsets  
Battery-Powered Equipment  
Laptop, Palmtops, Notebook Computers  
Hand-Held Instruments  
PCMCIA Cards  
Portable Information Applications  
Pin Configuration  
The other features include soft start, current  
limit protection, Power-On-Reset function, and  
over temperature protection. The EM1106 is  
available in SOT-23-5 package.  
Ordering Information  
Part Number  
EM1106J  
Package  
Remark  
SOT-23-5L  
SOT23-5  
DFN 2X2-6L  
EM1106V  
DFN 2X2-6L  
Typical Application Circuit  
Features  
Ultra Fast Response in Line/Load Transient  
Wide VIN Range from 2.5V to 5.5V  
Adjustable Output Voltage from 0.8V to 4.5V  
Ultra Low Dropout Voltage: 400mV @600mA  
High Power Supply Rejection Ratio  
70dB at 1kHz  
60dB at 10kHz  
Ultra Low Output Noise Voltage 100uV(RMS)  
Low Shutdown Current < 1uA  
Only 1uF Ceramic Capacitor required for  
stability  
Over Temperature Protection  
Current Limit Protection  
RoHS Compliant and 100% Lead (Pb)-Free  
2013/02/05  
Rev.A.1  
1
EM1106  
Pin Assignment  
Pin No.  
Pin Name  
Pin Function  
DFN2X2-6L  
SOT-23-5  
Input Voltage. This is the source input to the power device that  
supplies current to the output pin.  
VIN  
1
3
GND  
EN  
2
3
7
1
Ground.  
Chip Enable Input (Active high).  
Feedback Voltage. FB is the non-inverting input to the error  
amplifier. A resistor divider from the output to GND is used to set  
the regulation voltage as VOUT = 0.8*(1 +R1 R2 )(V). This pin has  
FB  
4
5
6
4
high impedance and should be kept from noisy source to guarantee  
stable operation.  
Output Voltage. VOUT is power output pin. An internal pull low  
resistance exists when the device is disabled. Minimum 1uF low ESR  
ceramic capacitor is required at this pin for stabilizing VOUT voltage.  
VOUT  
Function Block Diagram  
2013/02/05  
Rev.A.1  
2
EM1106  
Absolute Maximum Ratings (Note1)  
VIN ------------------------------------------------------------------------------------------------------ -0.3V to +6.0V  
Other Pins---------------------------------------------------------------------------------------------- -0.3V to (VIN+0.3V)  
Power Dissipation, PD @ TA = 25°C,  
SOT23-5 --------------------------------------------------------------------------------------------- 0.4W  
DFN2X2 ---------------------------------------------------------------------------------------------- 0.6W  
Package Thermal Resistance, ΘJA,  
SOT23-5 (Note 2)--------------------------------------------------------------------------------------- 250°C/W  
DFN2X2 (Note 2)---------------------------------------------------------------------------------------- 165°C/W  
Junction Temperature------------------------------------------------------------------------------------- 150°C  
Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------- 260°C  
Storage Temperature ------------------------------------------------------------------------------------ 65°C to 150°C  
ESD susceptibility (Note3)  
HBM (Human Body Mode)------------------------------------------------------------------------- 2KV  
MM (Machine Mode)--------------------------------------------------------------------------------- 200V  
Recommended Operating Conditions (Note4)  
Supply Input Voltage, VIN ------------------------------------------------------------------------------ +2.5V to +5.5V  
Junction Temperature ---------------------------------------------------------------------------------- 40°C to 125°C  
Ambient Temperature ---------------------------------------------------------------------------------- 40°C to 85°C  
2013/02/05  
Rev.A.1  
3
EM1106  
Electrical Characteristics  
VIN=5V, TA=25, unless otherwise specified  
Parameter  
Symbol  
Test Conditions  
Pin Min Typ  
Max Units  
Supply Input Section  
Power Input Voltage  
POR Threshold  
VIN  
VPORTH  
VPORHYS  
IQ  
VOUT= VREF  
2.5  
-
5.5  
2.5  
-
V
V
-
-
-
-
2.1  
0.2  
90  
POR Hysteresis  
V
Quiescent Current  
Shutdown Current  
VIN=VEN=5V, IOUT=0A  
VIN=5V,VEN=0V  
130  
1
uA  
uA  
ISD  
0.1  
Output Voltage  
Output Voltage Accuracy  
Line Regulation  
VOUT  
VOUT(LINE)  
VOUT(LOAD)  
IOUT=1mA  
-2  
-
-
-
2
0.2  
1
-
%
%/V  
2.5V<VIN<5.0V, IOUT=1mA, VOUT=VREF  
1mA<IOUT<600mA, VIN=VOUT+0.5V  
10Hz to 100kHz, COUT=1uF  
IOUT=10mA,1kHz  
Load Regulation  
-
0.5  
100  
70  
60  
40  
%/A  
uV(RMS)  
Output Voltage Noise  
-
-
-
Power Supply Rejection  
Ratio  
PSRR  
VDROP  
IOUT=10mA,10kHz  
-
-
dB  
IOUT=10mA,100kHz  
-
-
Dropout Voltage  
IOUT=600mA, 2.5V < VOUT < 3.3V  
-
400 600  
mV  
Enable  
Enable High Level  
Disable Low Level  
Enable Input Current  
Output Voltage Ramp Up  
Time  
VEN  
VSD  
IEN  
1.4  
-
-
-
-
0.38  
1
V
V
VEN=5V or 0V  
-1  
0
uA  
-
750  
-
us  
Over Current Protection  
OCP Threshold Level  
Thermal Protection  
Thermal Shutdown  
Temperature  
IOCP  
VIN=VEN=5V, VOUT=VREF  
610 800  
-
mA  
TSD  
VIN=VEN=5V, IOUT=0A, VOUT=VREF  
VIN=VEN=5V, IOUT=0A, VOUT=VREF  
-
-
160  
30  
-
-
oC  
oC  
Thermal Shutdown  
Hysteresis  
TSDHYS  
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the  
device. These are for stress ratings. Functional operation of the device at these or any other  
conditions beyond those indicated in the operational sections of the specifications is not implied.  
Exposure to absolute maximum rating conditions for extended periods may remain possibility to  
affect device reliability.  
Note 2. θJA is measured in the natural convection at TA=25oC on a low effective thermal conductivity test  
board of JEDEC 51-3 thermal measurement standard.  
Note 3. Devices are ESD sensitive. Handling precaution is recommended.  
Note 4. The device is not guaranteed to function outside its operating conditions.  
2013/02/05  
Rev.A.1  
4
EM1106  
Typical Operating Characteristics  
Power On from VIN  
Power Off from VIN  
VIN  
VOUT  
VIN  
VOUT  
IOUT  
IOUT  
VOUT=3.3VCIN=COUT=1uFROUT=15Ω  
Turn On from EN  
VOUT=3.3VCIN=COUT=1uFROUT=15Ω  
Turn Off from EN  
VEN  
VEN  
VOUT  
VOUT  
IOUT  
IOUT  
VOUT=3.3VCIN=COUT=1uFROUT=15Ω  
V
OUT=3.3VCIN=COUT=1uFROUT=15Ω  
Line Transient Response  
Load Transient Response  
VIN  
VOUT  
VOUT  
IOUT  
VIN=4.3VVOUT=3.3VCIN=COUT=1uF  
VOUT=2.5VCIN=COUT=1uFIOUT=1mA.  
2013/02/05  
Rev.A.1  
5
EM1106  
Dropout Voltage v.s. Output Current  
Quiescent Current v.s. Input Voltage  
On Resistance v.s. Input Voltage  
Output Voltage Line Regulation  
Pull Low Resistance v.s. Input Voltage  
Enable/Disable v.s. Inptut Voltage  
2013/02/05  
Rev.A.1  
6
EM1106  
On Resistance v.s. Temperature  
Quiescent Current v.s. Temperature  
140  
130  
120  
110  
100  
90  
1200  
1100  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
VIN=2.5V  
VIN=3.3V  
80  
70  
60  
-50  
-25  
0
25  
50  
75 100 125  
-50  
-25  
0
25  
50  
75  
100 125  
Junction Temperature ()  
Junction Temperature ()  
Shutdown Current v.s. Temperature  
PSRR  
35  
12  
10  
8
40  
45  
50  
55  
60  
6
4
65  
70  
2
0
10  
100  
1K  
10K  
100K  
1M  
-50  
-25  
0
25  
50  
75  
100 125  
Frequency (Hz)  
IN=3.3V, VOUT=1.8V, IOUT=10mA  
Junction Temperature ()  
V
Enable/Disable v.s. Temperature  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
Enable  
Disable  
-50 -25  
0
25  
50  
75  
100 125  
Junction Temperature ()  
2013/02/05  
Rev.A.1  
7
EM1106  
Functional Description  
For recommended specification of EM1106, the  
max junction temperature is 125 degree C. The θJA  
of SOT23-5 is 250°C/W on the standard JEDEC 51-3  
thermal test board. The max power dissipation (at  
25°C ambient) can be calculated as below:  
Enable Function  
EM1106 is enabled if the voltage of the EN pin is  
greater than 1.4V. If the voltage of the EN pin is  
less than 0.38V, the IC will be disabled.  
PD(max at 25°C)=(125°C – 25°C) / (250°C/W) = 0.4W  
POR – Power ON Reset  
To let EM1106 start to operation, input voltage  
must be higher than its POR voltage even when EN  
voltage is pulled higher than enable high voltage.  
Typical POR voltage is 2.1V.  
The θJA of DFN2X2 is 165°C/W on the standard  
JEDEC 51-3 thermal test board. The max power  
dissipation (at 25°C ambient) can be calculated as  
below:  
VOUT Voltage Adjustment  
PD(max at 25°C)=(125°C – 25°C) / (165°C/W) = 0.6W  
The VOUT voltage of EM1106 can be adjusted by  
external voltage divider. Refer to typical  
application circuit, VOUT voltage is calculated by  
the following equation,  
R
VOUT = (1 + 1 )× 0.8V  
R2  
Over Current Limit Function  
EM1106 features over current limiting function  
which can limit its output current to 800mA.  
Input and Output Capacitor Selection  
For VIN pin, 1uF or larger ceramic capacitor is  
required to provide bypass path in transient  
current demand. VOUT pin is also recommended to  
have 1uF or larger ceramic capacitor to be stable  
and reduce the VOUT voltage dip when fast loading  
transient is happened.  
Power Dissipation  
The max power depends on some conditions,  
including of thermal impedance, PCB layout,  
airflow, and so on. The max power dissipation can  
be calculated by the formula as below  
PD(max)=(TJ(max)-TA) / θJA  
TJ(max) is the max junction temperature; θJA is the  
thermal impedance from junction to ambient. The  
thermal impedance θJA of SOT23-5 / DFN2X2 is  
package design and PCB design dependent.  
2013/02/05  
Rev.A.1  
8
EM1106  
Ordering & Marking Information  
Device Name: EM1106J for SOT-23-5  
A3YWW  
A3: Device Code, A3 for EM1106J  
YWW: Date Code  
#1  
A3: Device Code, A3 for EM1106J  
YWW: Date Code  
A3  
YWW  
#1  
Outline Drawing  
SOT-23-5  
B
B1  
e
G
D
A
F
b
A1  
Dimension in mm  
A
Dimension  
A1  
B
B1  
b
C
D
e
F
G
Min.  
0.90 0.00  
1.15  
0.30 0.08  
0.30  
0.45  
Typ.  
2.80 1.60  
2.90 0.95  
Max.  
1.30 0.15  
0.50 0.22  
1.45 0.60  
2013/02/05  
Rev.A.1  
9
EM1106  
DFN 2X2-6L  
D
L
4
6
D2  
E
E2  
K
3
1
A
A3  
A1  
e
b
Dimension in mm  
Dimension  
A
A1  
A3  
b
D
E
e
K
Min.  
0.70 0.00  
0.25  
0.2  
Typ.  
0.75 0.02 0.2 0.30 2.0 2.0 0.65  
0.80 0.05 0.35  
Max.  
2013/02/05  
Rev.A.1  
10  

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