EM5301AGE [EXCELLIANCE]
5V/12V Synchronous Buck PWM Controller;
| 型号： | EM5301AGE |
| 厂家： | 
Excelliance MOS |
| 描述： | 5V/12V Synchronous Buck PWM Controller |
| 文件： | 总13页 (文件大小：496K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EM5301
5V/12V Synchronous Buck PWM Controller
General Description
Applications
EM5301 is a synchronous rectified PWM
controller operating with 5V or 12V supply voltage.
This device operates at 200/300/500 kHz and
provides an optimal level of integration to reduce
size and cost of the power supply.
ꢀ
ꢀ
ꢀ
Notebook & Netbook
Graphic Cards & MB
Low Voltage Logic Supplies
This part includes internal soft start, over
current protection, under voltage protection, over
voltage protection, and shutdown function. This
part is available in PSOP-8 package.
Pin Configuration
Ordering Information
Reference
Part Number Package Frequency
Voltage
EM5301GE
PSOP-8
200kHz
300kHz
500kHz
200kHz
300kHz
500kHz
0.8V
0.8V
0.8V
0.6V
0.6V
0.6V
EM5301AGE PSOP-8
EM5301BGE PSOP-8
EM5301CGE PSOP-8
EM5301DGE PSOP-8
Typical Application Circuit
EM5301EGE
PSOP-8
Features
ꢀ
ꢀ
ꢀ
ꢀ
Operate from 5V to 12V Voltage Supply
0.8V or 0.6V VREF with 1.0% Accuracy
Voltage Mode PWM Control
200kHz or 300kHz or 500kHz Fixed
Frequency Oscillator
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0% to 80% Duty Cycle
Internal Soft Start
Over Current Protection
Integrated Bootstrap Diode
Adaptive Non-Overlapping Gate Driver
Under Voltage Protection
Over Voltage Protection
2013/04/22
Rev.A.5
1
EM5301
Pin Assignment
Pin Name Pin No.
Pin Function
Bootstrap Supply for the floating upper gate driver. Connect the bootstrap
capacitor C BOOT between BOOT pin and the PHASE pin to form a bootstrap circuit.
The bootstrap capacitor provides the charge to turn on the upper MOSFET. Typical
values for C BOOT range from 0.1uF to 0.47uF. Ensure that C BOOT is placed near the
IC.
BOOT
1
Upper Gate Driver Output. Connect this pin to the gate of upper MOSFET. This pin
is monitored by the adaptive shoot-through protection circuitry to determine when
the upper MOSFET has turned off.
UGATE
GND
2
3
4
Signal and Power Ground for the IC. All voltages levels are measured with respect
to this pin. Tie this pin to the ground island/plane through the lowest impedance
connection available.
Lower Gate Driver Output. Connect this pin to the gate of lower MOSFET. This pin
is monitored by the adaptive shoot-through protection circuitry to determine when
the lower MOSFET has turn off.
LGATE
Supply Voltage. This pin provides the bias supply for the EM5301 and the lower
gate driver. The supply voltage is internally regulated to 5VDD for internal control
circuit. Connect a well-decoupled 4.5V to 13.2V supply voltage to this pin. Ensure
that a decoupling capacitor is placed near the IC.
VCC
FB
5
6
Feedback Voltage. This pin is the inverting input to the error amplifier. A resistor
divider from the output to GND is used to set the regulation voltage.
Error Amplifier Output. This pin is the output of error amplifier and the
non-inverting input of the PWM comparator. Use this pin in combination with the
FB pin to compensate the voltage control feedback loop of the converter. Pulling
this pin lower than 0.2V disables the controller and causes the oscillator to stop,
the UGATE and LGATE outputs to be held low.
COMP/
SD
7
8
PHASE Switch Node. Connect this pin to the source of the upper MOSFET and the
drain of the lower MOSFET. This pin is used as the sink for the UGATE driver, and to
monitor the voltage drop across the lower MOSFET for over current protection.
This pin is also monitored by the adaptive shoot-through protection circuitry to
determine when the upper MOSFET has turned off. A Schottky diode between this
pin and ground is recommended to reduce negative transient voltage which is
common in a power supply system.
PHASE
2013/04/22
Rev.A.5
2
EM5301
Function Block Diagram
VCC
5
Internal
regulator
1
BOOT
Soft Start
POR
2
8
UGATE
PHASE
OTP
-
Gate
control
logic
PWM
-
6
FB
EA
VOCP
+
Ramp
V
VCC
Vref
VCC
17V
Oscillator
4
3
LGATE
G(D
75% Vref
FB
COMP/SD
7
Enable
0.2V
FB
130% Vref
2013/04/22
Rev.A.5
3
EM5301
Absolute Maximum Ratings (Note 1)
ꢀ Supply voltage, VCC----------------------------------------------------------
-0.3V to 16V
ꢀ PHASE to GND
DC-------------------------------------------------------------------------------
<200nS-------------------------------------------------------------------------
-5V to 16V
-10V to 32V
ꢀ BOOT to PHASE---------------------------------------------------------------
16V
ꢀ BOOT to GND
DC-------------------------------------------------------------------------------
<200nS-------------------------------------------------------------------------
-0.3V to PHASE+16V
-0.3V to 42V
ꢀ UGATE
DC -----------------------------------------------------------------------------
VPHASE -0.3V to VBOOT + 0.3V
<200ns------------------------------------------------------------------------- VPHASE -5V to VBOOT +5V
ꢀ LGATE
DC-------------------------------------------------------------------------------
-0.3V to VCC + 0.3V
-5V to VCC+5V
<200ns-------------------------------------------------------------------------
ꢀ COMP/SD & FB----------------------------------------------------------------
ꢀ Power Dissipation, PD @ TA = 25°C, PSOP-8 --------------------------
ꢀ Package Thermal Resistance, ΘJA, PSOP-8 (Note 2)-------------------
ꢀ Junction Temperature--------------------------------------------------------
ꢀ Lead Temperature (Soldering, 10 sec.)-----------------------------------
ꢀ Storage Temperature Range------------------------------------------------
-0.3V to 6V
1.33W
75°C/W
150°C
260°C
-65°C to 150°C
ꢀ ESD susceptibility (Note3)
HBM (Human Body Mode)-------------------------------------------------
MM (Machine Mode)-------------------------------------------------------
2KV
200V
Recommended Operating Conditions (Note4)
ꢀ Supply Voltage, VCC ---------------------------------------------------------- 4.5V to 13.2V
ꢀ Junction Temperature ------------------------------------------------------ -40°C to 125°C
ꢀ Ambient Temperature ------------------------------------------------------ -40°C to 85°C
Electrical Characteristics
VCC=12V, TA=25℃, unless otherwise specified
Parameter
Symbol
Test Conditions
Min. Typ. Max. Units
Supply Input Section
Supply Voltage
Supply Current
VCC
ICC
ICCQ
4.5
3.8
13.2
4.3
V
mA
mA
V
LGATE, UGATE open, Switching.
No Switching.
2.5
2
Quiescent Supply Current
Power on Reset Threshold
Power on Reset Hysteresis
VCCRTH
VCCHYS
4
0.4
V
Internal Oscillator
EM5301/C
170 200 230
255 300 345
425 500 575
1.5
kHz
kHz
kHz
Vp-p
Free Running Frequency
Ramp Amplitude
fOSC
EM5301A/D
EM5301B/E
△VOSC
2013/04/22
Rev.A.5
4
EM5301
Error Amplifier
Open Loop DC Gain
Gain-Bandwidth Product
Maximum Duty
AO
88
15
80
75
dB
MHz
%
GBW
DMAX
EM5301/A/C/D
EM5301B/E
%
PWM Controller Gate Drivers
VBOOT - VPHASE = 12V,
VBOOT - VUGATE = 6V
VBOOT - VPHASE = 12V,
VUGATE – VPHASE = 6V
VBOOT - VPHASE = 12V,
Upper Gate Sourcing Current
IUG_SRC
IUG_SNK
RUG_SNK
-1.2
1.5
2
A
A
Upper Gate Sinking Current
Upper Gate RDS(ON) Sinking
4
Ω
VUGATE – VPHASE = 0.1V
Lower Gate Sourcing Current
Lower Gate Sinking Current
Lower Gate RDS(ON) Sinking
PHASE Falling to LGATE Rising
Delay
ILG_SRC
ILG_SNK
RLG_SNK
VCC – VLGATE = 6V
VLGATE = 6V
-1.2
1.5
1
A
A
Ω
VLGATE = 0.1V
2
VCC = 12V; (VUGATE - VPHASE)< 1.2V to
VLGATE > 1.2V
30
30
90
ns
ns
LGATE Falling to UGATE Rising
Delay
VCC = 12V; VLGATE < 1.2V to (VUGATE
VPHASE) > 1.2V
-
90
Reference Voltage
EM5301/A/B
0.792 0.8 0.808
0.592 0.6 0.608
V
V
Nominal Feedback Voltage
VFB
EM5301C/D/E
Protection section
FB Under Voltage Protection
FB Over Voltage Protection
LGATE OC Setting Current
Over Current Threshold1
VFB_UVP FB falling
VFB_OVP FB rising
IOCSET
68
75
82
%
%
120 130 145
22
25
-400
3.6
28
uA
mV
ms
ms
V
VPHA_OC1 RLGATE=8Kohm
EM5301/B/C/E
Soft-Start Interval
TSS
EM5301A/D
2.4
COMP Enable Threshold
Temperature Shutdown
VCOMP/EN
TSD
0.2
165
℃
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA PSOP-8 packages is 52°C /W on JEDEC 51-7 (4 layers,2S2P) thermal test board with 50mm2 copper area.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
2013/04/22
Rev.A.5
5
EM5301
Typical Operating Characteristics
Power On from VIN
Power Off from VIN
VOUT
VOUT
VIN
VIN
VCC
VCC
UGATE
UGATE
VIN=12V，VCC=12V，No Load.
VIN=12V，VCC=12V，No Load.
Power On from COMP/SD
Power Off from COMP/SD
VOUT
VOUT
COMP/SD
COMP/SD
LGATE
UGATE
LGATE
UGATE
VIN=12V，VCC=12V，No Load.
VIN=12V，VCC=12V，No Load.
Load Transient Response
Load Transient Response
VOUT
VOUT
UGATE
Iout
UGATE
Iout
VIN=12V，VCC=12V，COUT=1360uF，L=1.2uH
IOUT=0A to 15A.
VIN=12V，VCC=12V，COUT=1360uF，L=1.2uH
IOUT=15A to 0A.
2013/04/22
Rev.A.5
6
EM5301
Over Voltage Protection
Over Current Protection
VFB
VOUT
VOUT
UGATE
LGATE
IOUT
UGATE
LGATE
VIN=12V，VCC=12V，IOCSET=20A.
VIN=12V，VCC=12V，No Load.
Over Current Protection
Frequency vs. Junction Temperature
VOUT
IOUT
UGATE
LGATE
VIN=12V，VCC=12V，IOCSET=20A.
Turn On to Short Circuit
Junction Temperature (℃)
Reference Voltage vs. Junction Temperature
Output Voltage vs. Load Current
Output current (A)
Junction Temperature (℃)
Efficiency vs. Load Current
2013/04/22
Rev.A.5
7
EM5301
Load Current (A)
2013/04/22
Rev.A.5
8
EM5301
UVP, Under Voltage Protection
Functional Description
The FB voltage is monitored for under voltage
protection. The UVP threshold is typical 0.6V.
When UVP is triggered, EM5301 will shut down the
converter and cycles the soft start function in a
hiccup mode.
EM5301 is a voltage mode synchronous buck PWM
controller. This device provides complete
protection function such as over current protection,
under voltage protection and over voltage
protection.
OVP, Over Voltage Protection
Supply Voltage
The FB voltage is monitored for over voltage
protection. The OVP threshold is typical 1.04V.
When OVP is triggered, EM5301 will turn off upper
MOSFET and turn on lower MOSFET.
The VCC pin provides the bias supply of EM5301
control circuit, as well as lower MOSFET’s gate and
the BOOT voltage for the upper MOSFET’s gate. A
minimum 0.1uF ceramic capacitor is recommended
to bypass the supply voltage.
Feedback Compensation
Fig.1 shows the voltage mode control loop for a
Power ON Reset
synchronous-rectified
buck
converter.
The
To let EM5301 start to operation, VCC voltage must
be higher than its POR voltage even when REFIN
voltage is pulled higher than enable high voltage.
Typical POR voltage is 4.0V.
compensation network consists of the error
amplifier and the impedance networks ZIN and ZFB.
The goal of the compensation network is to
provide a closed loop transfer function with
adequate phase margin.
Shutdown
The COMP/SD pin can be used to enable or disable
EM5301. Pull down COMP/SD pin below 0.2V can
disable the controller.
VIN
DRIVER
OSC
PWM
COMPARATOR
Lo
VOUT
PHASE
VOSC
Soft Start
Co
EM5301 provides soft start function internally. The
FB voltage will track the internal soft start signal,
which ramps up from zero during soft start period.
ESR
DRIVER
ZFB
ZI(
OCP, Over Current Protection
ERROR
REFERENCE
AMP
The over current function protects the converter
from a shorted output by using lower MOSFET’s
on-resistance to monitor the current. The OCP level
can be calculated as the following equation:
ZFB
C2
ZIN
VOUT
C1
R2
C3
R3
VOCP
COMP
IOCP = −
R1
RDS(ON)
FB
REFERENCE
When OCP is triggered, EM5301 will shut down the
converter and cycles the soft start function in a
hiccup mode. If over current condition still exist
after 3 times of hiccup, EM5301 will shut down the
controller and latch.
Fig.1 Compensation for Voltage Mode Buck Converter
2013/04/22
Rev.A.5
9
EM5301
V − VOUT
VOUT
IN
ΔIL =
∗
The equations below relate the compensation
network’s poles and zeros to the components (R1,
R2, R3, C1, C2 and C3).
L
V *F
IN
SW
Output Capacitor Selection
1
1
An output capacitor is required to filter the output
and supply the load transient. The selection of
output capacitor depends on the output ripple
voltage. The output ripple voltage is approximately
bounded by the following equation:
F =
F =
P1
Z1
C1 *C2
2π *R2 *C1
2π *R2 *(
)
C1 + C2
1
1
F =
F =
Z1
P2
2π *(R1 + R3)*C3
2π *R3 *C3
1
ΔVOUT = ΔIL *(ESR +
)
8*FSW * COUT
Fig.2 shows the Bode plot for the control loop. The
compensation gain uses external impedance
networks ZIN and ZFB to provide a stable loop. A
stable control loop has a gain crossing with
-20db/decade slope and phase margin greater than
45 degrees.
Input Capacitor Selection
Use a mix of input bypass capacitors to control the
voltage overshoot across the MOSFET. Use small
ceramic capacitors for high frequency decoupling
and bulk capacitors to supply the current needed
each time the upper MOSFET turn on. Place the
small ceramic capacitors physically close to the
MOSFETs and between the drain of the upper
MOSFET and the source of the lower MOSFET. The
important parameters of the input capacitor are
the voltage rating and the RMS current rating.
The capacitor voltage rating should be at least 1.25
times greater than the maximum input voltage and
a voltage rating of 1.5 times is a conservative
guideline. The RMS current rating requirement can
be expressed as the following equation:
100
80
60
40
Error Amp Open
Loop Gain
FZ2
FZ1
Compensation
FP1 FP2
Gain
20
0
20Log(R2/R1)
20Log(VIN/ VOSC
)
Modulator Gain
FLC
-20
-40
-60
Close Loop Gain
IRMS = IOUT D(1- D)
FESR
For a through hole design, several electrolytic
capacitors may be needed. For surface mount
designs, solid tantalum capacitors can also be used
but caution must be exercised with regard to the
capacitor surge current rating. These capacitors
must be capable of handling the surge current at
power-up. Some capacitor series available from
reputable manufacturers are surge current tested.
10
100
1K
10K
100K
1M
10M
FREQUENCY(Hz)
Fig.2 Bode Plot of Voltage Mode Buck Converter
Output Inductor Selection
The output inductor is selected to meet the output
voltage ripple requirements and minimize the
response time to the load transient. The inductor
value determines the current ripple and voltage
ripple. The ripple current is approximately the
following equation:
2013/04/22
Rev.A.5
10
EM5301
Power MOSFET Selection
The EM5301 requires two N-Channel power
MOSFETs. These should be selected based upon
on-resistance, breakdown voltage, gate supply
requirement,
requirements.
and
thermal
management
In high current applications, the MOSFET power
dissipation, package selection and heat sink are the
dominate design factor. The power dissipation
includes two loss components: conduction loss and
switching loss. The conduction losses are the
largest component of power dissipation for both
the upper and lower MOSFETs. These losses are
distributed between the two MOSFETs according
to duty factor.
The power dissipations in the two MOSFETs are
approximately the following equation:
PDUPPER = I2OUT *RDS(ON) *D + 0.5*IOUT *V *F *tSW
IN
SW
PDLOWER = I2OUT *RDS(ON) *(1 - D)
Where D is the duty cycle, tSW is the combined
switch ON and OFF time.
2013/04/22
Rev.A.5
11
EM5301
Ordering & Marking Information
Device Name: EM5301GE/EM5301AGE/EM5301BGE for PSOP-8
EM
5301
EM5301GE Device Name
ABCDEFG: Date Code
ABCDEFG
EM
5301A
EM5301AGE Device Name
ABCDEFG: Date Code
ABCDEFG
EM
5301B
EM5301BGE Device Name
ABCDEFG: Date Code
ABCDEFG
EM
5301C
EM5301CGE Device Name
ABCDEFG: Date Code
ABCDEFG
EM
5301D
EM5301DGE Device Name
ABCDEFG: Date Code
ABCDEFG
EM
5301E
EM5301EGE Device Name
ABCDEFG: Date Code
ABCDEFG
2013/04/22
Rev.A.5
12
EM5301
Outline Drawing
J
F
I
I
K
G
H
D
E
M
N
B
C
A
Dimension in mm
Dimension
Min.
A
B
C
D
E
F
G
H
I
J
K
M
N
4.70 3.70 5.80 0.33
1.20 0.02 0.40 0.19 0.25 0∘ 1.94 1.94
Typ.
1.27
Max.
5.10 4.10 6.20 0.51
1.62 0.15 0.83 0.26 0.50 8∘ 2.49 2.49
2013/04/22
Rev.A.5
13
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