EM5301F [EXCELLIANCE]

12V Synchronous Buck PWM Controller;


型号：	EM5301F
厂家：	Excelliance MOS
描述：	12V Synchronous Buck PWM Controller
文件：	总12页 (文件大小：487K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

EM5301F/G

12V Synchronous Buck PWM Controller

General Description

Applications

EM5301F/G is a synchronous rectified PWM

controller operating with 12V supply voltage. This

device operates at 160/200 kHz and provides an

optimal level of integration to reduce size and cost

of the power supply.

ꢀ

Notebook & Netbook

Graphic Cards & MB

Low Voltage Logic Supplies

This part includes internal soft start, over

current protection, under voltage protection, over

voltage protection, and shutdown function. This

part is available in PSOP-8 package.

Pin Configuration

Ordering Information

Part Number Package Frequency

EM5301FGE

PSOP-8

160kHz

200kHz

EM5301GGE PSOP-8

Features

Typical Application Circuit

ꢀ

Operate from 12V Voltage Supply

0.8V V_REFwith 1.0% Accuracy

Voltage Mode PWM Control

EM5301

160kHz or 200kHz Fixed Frequency

Oscillator

ꢀ

0% to 80% Duty Cycle

Internal Soft Start

Over Current Protection

Integrated Bootstrap Diode

Adaptive Non-Overlapping Gate Driver

Under Voltage Protection

Over Voltage Protection

2013/5/2

Rev.A.1

EM5301F/G

Pin Assignment

Pin Name Pin No.

Pin Function

Bootstrap Supply for the floating upper gate driver. Connect the bootstrap

capacitor C _BOOTbetween BOOT pin and the PHASE pin to form a bootstrap circuit.

The bootstrap capacitor provides the charge to turn on the upper MOSFET. Typical

values for C _BOOTrange from 0.1uF to 0.47uF. Ensure that C _BOOTis placed near the

IC.

BOOT

Upper Gate Driver Output. Connect this pin to the gate of upper MOSFET. This pin

is monitored by the adaptive shoot-through protection circuitry to determine when

the upper MOSFET has turned off.

UGATE

GND

Signal and Power Ground for the IC. All voltages levels are measured with respect

to this pin. Tie this pin to the ground island/plane through the lowest impedance

connection available.

Lower Gate Driver Output. Connect this pin to the gate of lower MOSFET. This pin

is monitored by the adaptive shoot-through protection circuitry to determine when

the lower MOSFET has turned off.

LGATE

Supply Voltage. This pin provides the bias supply for the EM5301F/G and the lower

gate driver. The supply voltage is internally regulated to 5VDD for internal control

circuit. Connect a well-decoupled 10V to 13.2V supply voltage to this pin. Ensure

that a decoupling capacitor is placed near the IC.

VCC

Feedback Voltage. This pin is the inverting input to the error amplifier. A resistor

divider from the output to GND is used to set the regulation voltage.

Error Amplifier Output. This pin is the output of error amplifier and the

non-inverting input of the PWM comparator. Use this pin in combination with the

FB pin to compensate the voltage control feedback loop of the converter. Pulling

this pin lower than 0.2V disables the controller and causes the oscillator to stop,

the UGATE and LGATE outputs to be held low.

COMP/

PHASE Switch Node. Connect this pin to the source of the upper MOSFET and the

drain of the lower MOSFET. This pin is used as the sink for the UGATE driver, and to

monitor the voltage drop across the lower MOSFET for over current protection.

This pin is also monitored by the adaptive shoot-through protection circuitry to

determine when the upper MOSFET has turned off. A Schottky diode between this

pin and ground is recommended to reduce negative transient voltage which is

common in a power supply system.

PHASE

2013/5/2

Rev.A.1

EM5301F/G

Function Block Diagram

VCC

Internal

regulator

BOOT

Soft Start

POR

UGATE

PHASE

OTP

Gate

control

logic

PWM

V_OCP

Ramp

Vref=0.8V

VCC

17V

Oscillator

LGATE

G(D

75% Vref

COMP/SD

Enable

0.2V

130% Vref

2013/5/2

Rev.A.1

EM5301F/G

Absolute Maximum Ratings (Note 1)

ꢀ Supply voltage, VCC----------------------------------------------------------- -0.3V to 16V

ꢀ PHASE to GND

DC-------------------------------------------------------------------------------- -5V to 16V

<200nS-------------------------------------------------------------------------- -10V to 32V

ꢀ BOOT to PHASE---------------------------------------------------------------- 16V

ꢀ BOOT to GND

DC-------------------------------------------------------------------------------- -0.3V to PHASE+16V

<200nS-------------------------------------------------------------------------- -0.3V to 42V

ꢀ UGATE

DC -------------------------------------------------------------------------------- V_PHASE-0.3V to V_BOOT+ 0.3V

<200ns--------------------------------------------------------------------------- V_PHASE-5V to V_BOOT+5V

ꢀ LGATE

DC---------------------------------------------------------------------------------

<200ns---------------------------------------------------------------------------

-0.3V to VCC + 0.3V

-5V to VCC+5V

ꢀ COMP/SD & FB-----------------------------------------------------------------

ꢀ Power Dissipation, PD @ TA = 25°C, PSOP-8 ---------------------------

ꢀ Package Thermal Resistance, ΘJA, PSOP-8 (Note 2)-------------------

ꢀ Junction Temperature--------------------------------------------------------

ꢀ Lead Temperature (Soldering, 10 sec.)-----------------------------------

ꢀ Storage Temperature Range------------------------------------------------

-0.3V to 6V

1.33W

75°C/W

150°C

260°C

-65°C to 150°C

ꢀ ESD susceptibility (Note3)

HBM (Human Body Mode)-------------------------------------------------

MM (Machine Mode)--------------------------------------------------------

2KV

200V

Recommended Operating Conditions _(Note4)

ꢀ Supply Voltage, V_CC---------------------------------------------------------- 10V to 13.2V

ꢀ Junction Temperature ------------------------------------------------------ -40°C to 125°C

ꢀ Ambient Temperature ------------------------------------------------------ -40°C to 85°C

Electrical Characteristics

V_CC=12V, T_A=25℃, unless otherwise specified

Parameter

Symbol

Test Conditions

Min. Typ. Max. Units

Supply Input Section

Supply Voltage

Supply Current

V_CC

I_CC

I_CCQ

13.2

LGATE, UGATE open, Switching.

No Switching.

2.5

Quiescent Supply Current

Power on Reset Threshold

Power on Reset Hysteresis

V_CCRTH

V_CCHYS

8.8

0.8

Internal Oscillator

EM5301F

EM5301G

130 160 190

170 200 235

1.5

kHz

V_p-p

Free Running Frequency

f_OSC

Ramp Amplitude

△V_OSC

Error Amplifier

2013/5/2

Rev.A.1

EM5301F/G

Open Loop DC Gain

A_O

Gain-Bandwidth Product

GBW

MHz

Maximum Duty

D_MAX

PWM Controller Gate Drivers

V_BOOT- V_PHASE= 12V,

V_BOOT- V_UGATE= 6V

V_BOOT- V_PHASE= 12V,

V_UGATE– V_PHASE= 6V

V_BOOT- V_PHASE= 12V,

V_UGATE– V_PHASE= 0.1V

V_CC– V_LGATE= 6V

Upper Gate Sourcing Current

Upper Gate Sinking Current

Upper Gate R_DS(ON)Sinking

I_{UG_SRC}

I_{UG_SNK}

R_{UG_SNK}

-1.2

1.5

Lower Gate Sourcing Current

Lower Gate Sinking Current

Lower Gate R_DS(ON)Sinking

PHASE Falling to LGATE Rising

Delay

I_{LG_SRC}

I_{LG_SNK}

R_{LG_SNK}

-1.2

1.5

V_LGATE= 6V

V_LGATE= 0.1V

V_CC= 12V; (V_UGATE- V_PHASE)< 1.2V to

V_LGATE> 1.2V

LGATE Falling to UGATE Rising

Delay

V_CC= 12V; V_LGATE< 1.2V to (V_UGATE

V_PHASE) > 1.2V

Reference Voltage

Nominal Feedback Voltage

Protection section

V_FB

0.792 0.8 0.808

FB Under Voltage Protection

FB Over Voltage Protection

LGATE OC Setting Current

Over Current Threshold1

Soft-Start Interval

V_{FB_UVP}FB falling

V_{FB_OVP}FB rising

I_OCSET

115 130 145

-400

3.6

V_{PHA_OC1}R_LGATE=8Kohm

T_SS

COMP Enable Threshold

Temperature Shutdown

V_COMP/EN

T_SD

0.2

165

℃

Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may remain possibility to affect device reliability.

Note 2. θ_JAPSOP-8 packages is 52°C /W on JEDEC 51-7 (4 layers,2S2P) thermal test board with 50mm²copper area.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

2013/5/2

Rev.A.1

EM5301F/G

Typical Operating Characteristics

Power On from V_IN

Power Off from V_IN

V_OUT

V_IN

V_CC

UGATE

V_IN=12V，V_CC=12V，No Load.

Power On from COMP/SD

Power Off from COMP/SD

V_OUT

COMP/SD

LGATE

UGATE

LGATE

UGATE

V_IN=12V，V_CC=12V，No Load.

Load Transient Response

V_OUT

UGATE

Iout

UGATE

Iout

V_IN=12V，V_CC=12V，C_OUT=1360uF，L=1.2uH

I_OUT=0A to 15A.

V_IN=12V，V_CC=12V，C_OUT=1360uF，L=1.2uH

I_OUT=15A to 0A.

2013/5/2

Rev.A.1

EM5301F/G

Over Current Protection

Over Voltage Protection

V_FB

V_OUT

UGATE

LGATE

I_OUT

UGATE

LGATE

V_IN=12V，V_CC=12V，I_OCSET=20A.

V_IN=12V，V_CC=12V，No Load.

Over Current Protection

Frequency vs. Junction Temperature

V_OUT

I_OUT

UGATE

LGATE

V_IN=12V，V_CC=12V，I_OCSET=20A.

Turn On to Short Circuit

Junction Temperature (℃)

Reference Voltage vs. Junction Temperature

Output Voltage vs. Load Current

Output current (A)

Junction Temperature (℃)

2013/5/2

Rev.A.1

EM5301F/G

Efficiency vs. Load Current

Load Current (A)

2013/5/2

Rev.A.1

EM5301F/G

UVP, Under Voltage Protection

Functional Description

The FB voltage is monitored for under voltage

protection. The UVP threshold is typical 0.6V.

When UVP is triggered, EM5301F/G will shut down

the converter and cycles the soft start function in a

hiccup mode.

EM5301F/G is a voltage mode synchronous buck

PWM controller. This device provides complete

protection function such as over current protection,

under voltage protection and over voltage

protection.

OVP, Over Voltage Protection

Supply Voltage

The FB voltage is monitored for over voltage

protection. The OVP threshold is typical 1.04V.

When OVP is triggered, EM5301F/G will turn off

upper MOSFET and turn on lower MOSFET.

The V_CCpin provides the bias supply of EM5301F/G

control circuit, as well as lower MOSFET’s gate and

the BOOT voltage for the upper MOSFET’s gate. A

minimum 0.1uF ceramic capacitor is recommended

to bypass the supply voltage.

Feedback Compensation

Fig.1 shows the voltage mode control loop for a

Power ON Reset

synchronous-rectified

buck

converter.

The

To let EM5301F/G start to operation, V_CCvoltage

must be higher than its POR voltage even when

REFIN voltage is pulled higher than enable high

voltage. Typical POR voltage is 8.8V.

compensation network consists of the error

amplifier and the impedance networks Z_INand Z_FB.

The goal of the compensation network is to

provide a closed loop transfer function with

adequate phase margin.

Shutdown

The COMP/SD pin can be used to enable or disable

EM5301F/G. Pull down COMP/SD pin below 0.2V

can disable the controller.

V_IN

DRIVER

OSC

PWM

COMPARATOR

V_OUT

PHASE

V_OSC

Soft Start

EM5301F/G provides soft start function internally.

The FB voltage will track the internal soft start

signal, which ramps up from zero during soft start

period.

ESR

DRIVER

Z_FB

Z_I(

ERROR

REFERENCE

AMP

OCP, Over Current Protection

The over current function protects the converter

from a shorted output by using lower MOSFET’s

on-resistance to monitor the current. The OCP level

can be calculated as the following equation:

Z_FB

Z_IN

V_OUT

COMP

V_OCP

I_OCP= −

R_DS(ON)

REFERENCE

When OCP is triggered, EM5301F/G will shut down

the converter and cycles the soft start function in a

hiccup mode. If over current condition still exist

after 3 times of hiccup, EM5301F/G will shut down

the controller and latch.

Fig.1 Compensation for Voltage Mode Buck Converter

2013/5/2

Rev.A.1

EM5301F/G

The equations below relate the compensation

network’s poles and zeros to the components (R1,

R2, R3, C1, C2 and C3).

Output Capacitor Selection

An output capacitor is required to filter the output

and supply the load transient. The selection of

output capacitor depends on the output ripple

voltage. The output ripple voltage is approximately

bounded by the following equation:

F =

C₁*C₂

2π *R₂*C₁

2π *R₂*(

)

C₁+ C₂

F =

2π *(R₁+ R₃)*C₃

2π *R₃*C₃

ΔV_OUT= ΔI_L*(ESR +

)

8*F * C_OUT

Fig.2 shows the Bode plot for the control loop. The

compensation gain uses external impedance

networks Z_INand Z_FBto provide a stable loop. A

stable control loop has a gain crossing with

-20db/decade slope and phase margin greater than

45 degrees.

Input Capacitor Selection

Use a mix of input bypass capacitors to control the

voltage overshoot across the MOSFET. Use small

ceramic capacitors for high frequency decoupling

and bulk capacitors to supply the current needed

each time the upper MOSFET turn on. Place the

small ceramic capacitors physically close to the

MOSFETs and between the drain of the upper

MOSFET and the source of the lower MOSFET. The

important parameters of the input capacitor are

the voltage rating and the RMS current rating.

The capacitor voltage rating should be at least 1.25

times greater than the maximum input voltage and

a voltage rating of 1.5 times is a conservative

guideline. The RMS current rating requirement can

be expressed as the following equation:

100

Error Amp Open

Loop Gain

F_Z2

Compensation

F_Z1

F_P1F_P2

Gain

20Log(R2/R1)

20Log(V_IN/ V_OSC

)

Modulator Gain

F_LC

-20

-40

-60

I_RMS= I_OUTD(1- D)

Close Loop Gain

For a through hole design, several electrolytic

capacitors may be needed. For surface mount

designs, solid tantalum capacitors can also be used

but caution must be exercised with regard to the

capacitor surge current rating. These capacitors

must be capable of handling the surge current at

power-up. Some capacitor series available from

reputable manufacturers are surge current tested.

F_ESR

100

10K

100K

10M

FREQUENCY(Hz)

Fig.2 Bode Plot of Voltage Mode Buck Converter

Output Inductor Selection

The output inductor is selected to meet the output

voltage ripple requirements and minimize the

response time to the load transient. The inductor

value determines the current ripple and voltage

ripple. The ripple current is approximately the

following equation:

V − V_OUT

V_OUT

ΔI_L=

∗

V *F

2013/5/2

Rev.A.1

EM5301F/G

Power MOSFET Selection

The EM5301F/G requires two N-Channel power

MOSFETs. These should be selected based upon

on-resistance, breakdown voltage, gate supply

requirement,

requirements.

and

thermal

management

In high current applications, the MOSFET power

dissipation, package selection and heat sink are the

dominate design factor. The power dissipation

includes two loss components: conduction loss and

switching loss. The conduction losses are the

largest component of power dissipation for both

the upper and lower MOSFETs. These losses are

distributed between the two MOSFETs according

to duty factor.

The power dissipations in the two MOSFETs are

approximately the following equation:

PD_UPPER= I²_OUT*R_DS(ON)*D + 0.5*I_OUT*V *F *t_SW

PD_LOWER= I²_OUT*R_DS(ON)*(1 - D)

Where D is the duty cycle, t_SWis the combined

switch ON and OFF time.

2013/5/2

Rev.A.1

EM5301F/G

Ordering & Marking Information

Device Name: EM5301FGE;EM5301GGE for PSOP-8

5301F

EM5301FGE Device Name

ABCDEFG

ABCDEFG: Date Code

5301G

EM5301GGE Device Name

ABCDEFG: Date Code

ABCDEFG

Outline Drawing

Dimension in mm

Dimension

Min.

4.70 3.70 5.80 0.33

1.20 0.02 0.40 0.19 0.25 0∘ 1.94 1.94

Typ.

Max.

1.27

5.10 4.10 6.20 0.51

1.62 0.15 0.83 0.26 0.50 8∘ 2.49 2.49

2013/5/2

Rev.A.1

EM5301F [EXCELLIANCE]

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