74AC253_07 [FAIRCHILD]

Dual 4-Input Multiplexer with 3-STATE Outputs; 双路4输入多路复用器与3态输出
74AC253_07
型号: 74AC253_07
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Dual 4-Input Multiplexer with 3-STATE Outputs
双路4输入多路复用器与3态输出

复用器
文件: 总12页 (文件大小:321K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
April 2007  
74AC253, 74ACT253  
tm  
Dual 4-Input Multiplexer with 3-STATE Outputs  
Features  
General Description  
I and I reduced by 50%  
The AC/ACT253 is a dual 4-input multiplexer with  
3-STATE outputs. It can select two bits of data from four  
sources using common select inputs. The outputs may  
be individually switched to a high impedance state with a  
HIGH on the respective Output Enable (OE) inputs,  
allowing the outputs to interface directly with bus  
oriented systems.  
CC  
OZ  
Multifunction capability  
Non inverting 3-STATE outputs  
Outputs source/sink 24mA  
ACT253 has TTL-compatible inputs  
Ordering Information  
Order Number  
Package  
Number  
Package Description  
74AC253SC  
74AC253SJ  
M16A  
M16D  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC253PC  
74ACT253SC  
74ACT253SJ  
74ACT253MTC  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M16A  
M16D  
MTC16  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,  
4.4mm Wide  
Device also available Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
I
I
–I  
Side A Data Inputs  
0a 3a  
–I  
Side B Data Inputs  
0b 3b  
S , S  
Common Select Inputs  
Side A Output Enable Input  
Side B Output Enable Input  
3-STATE Outputs  
0
1
OE  
OE  
a
b
Z , Z  
a
b
FACT™ is a trademark of Fairchild Semiconductor Corporation.  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
Logic Diagram  
Functional Description  
The AC/ACT253 contains two identical 4-input multiplex-  
ers with 3-STATE outputs. They select two bits from four  
sources selected by common Select inputs (S , S ). The  
0
1
4-input multiplexers have individual Output Enable (OE ,  
a
OE ) inputs which, when HIGH, force the outputs to a  
b
high impedance (High Z) state. This device is the logic  
implementation of a 2-pole, 4-position switch, where the  
position of the switch is determined by the logic levels  
supplied to the two select inputs. The logic equations for  
the outputs are shown:  
Z = OE • (I • S • S + I • S • S +  
a
a
0a  
1
0
1a  
1
0
IEEE/IEC  
I
• S • S + I • S • S )  
2a  
1 0 3a 1 0  
Z = OE • (I • S • S + I • S • S +  
b
b
0b  
1
0
1b  
1
0
I
• S • S + I • S • S )  
2b  
1 0 3b 1 0  
If the outputs of 3-STATE devices are tied together, all  
but one device must be in the high impedance state to  
avoid high currents that would exceed the maximum  
ratings. Designers should ensure that Output Enable  
signals to 3-STATE devices whose outputs are tied  
together are designed so that there is no overlap.  
Truth Table  
Select Inputs  
Data Inputs  
Output Enable  
Outputs  
S
S
I
I
I
I
3
OE  
H
L
Z
Z
L
0
1
0
1
2
X
X
X
L
X
X
X
L
X
X
X
X
X
L
X
X
X
X
X
X
X
L
L
L
L
L
H
X
X
X
X
X
X
L
H
L
H
H
L
L
L
L
H
X
X
X
X
L
H
L
H
H
H
H
L
L
H
X
X
L
H
L
H
H
L
H
L
H
Address Inputs S and S are common to both sections.  
0
1
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
Z = High Impedance  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
2
Logic Diagram  
Please note that this diagram is provided only for the understanding of logic operations and should not be used to  
estimate propagation delays.  
Figure 1.  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
Parameter  
Rating  
V
I
Supply Voltage  
–0.5V to +7.0V  
CC  
IK  
DC Input Diode Current  
V = –0.5V  
–20mA  
+20mA  
I
V = V + 0.5V  
I
CC  
V
DC Input Voltage  
–0.5V to V + 0.5V  
I
CC  
I
DC Output Diode Current  
OK  
V
= –0.5V  
–20mA  
+20mA  
O
V
= V + 0.5V  
O
CC  
V
DC Output Voltage  
DC Output Source or Sink Current  
–0.5V to V + 0.5V  
O
CC  
I
50mA  
50mA  
O
I
or I  
DC V or Ground Current per Output Pin  
CC  
GND  
STG  
CC  
T
Storage Temperature  
Junction Temperature  
–65°C to +150°C  
140°C  
T
J
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to absolute maximum ratings.  
Symbol  
Parameter  
Rating  
V
Supply Voltage  
AC  
CC  
2.0V to 6.0V  
4.5V to 5.5V  
ACT  
V
Input Voltage  
Output Voltage  
Operating Temperature  
0V to V  
0V to V  
I
CC  
CC  
V
O
T
–40°C to +85°C  
125mV/ns  
A
V / t  
Minimum Input Edge Rate, AC Devices:  
from 30% to 70% of V , V @ 3.3V, 4.5V, 5.5V  
V
IN  
CC CC  
V / t  
Minimum Input Edge Rate, ACT Devices:  
from 0.8V to 2.0V, V @ 4.5V, 5.5V  
125mV/ns  
V
IN  
CC  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
4
DC Electrical Characteristics for AC  
T = +25°C  
T = –40°C to +85°C  
A
A
V
CC  
Symbol  
Parameter  
(V)  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
Conditions  
Typ.  
Guaranteed Limits  
Units  
V
Minimum HIGH Level  
Input Voltage  
V
= 0.1V  
CC  
1.5  
2.1  
3.15  
3.85  
0.9  
2.1  
3.15  
3.85  
0.9  
V
IH  
OUT  
or V – 0.1V  
2.25  
2.75  
1.5  
V
Maximum LOW Level  
Input Voltage  
V
= 0.1V  
CC  
V
V
IL  
OUT  
or V – 0.1V  
2.25  
2.75  
2.99  
4.49  
5.49  
1.35  
1.65  
2.9  
1.35  
1.65  
2.9  
V
Minimum HIGH Level  
Output Voltage  
I
= –50µA  
OH  
OUT  
4.4  
4.4  
5.4  
5.4  
V
I
= V or V :  
IN  
IL  
IH  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
= –12mA  
2.56  
3.86  
4.86  
0.1  
2.46  
3.76  
4.76  
0.1  
OH  
OH  
OH  
I
I
I
= –24mA  
= –24mA  
= 50µA  
(1)  
V
Maximum LOW Level  
Output Voltage  
0.002  
0.001  
0.001  
V
OL  
OUT  
0.1  
0.1  
0.1  
0.1  
V
I
= V or V :  
IN  
IL  
IH  
3.0  
4.5  
5.5  
= 12mA  
0.36  
0.36  
0.36  
0.1  
0.44  
0.44  
0.44  
1.0  
OL  
OL  
OL  
I
I
= 24mA  
= 24mA  
(1)  
(3)  
I
Maximum Input  
Leakage Current  
5.5 V = V , GND  
µA  
µA  
IN  
I
CC  
I
Maximum 3-STATE  
Current  
5.5 V (OE) = V , V ;  
0.25  
2.5  
OZ  
I
IL IH  
V = V , GND;  
I
CC  
V = V , GND  
O
CC  
I
I
Minimum Dynamic  
Output Current  
5.5  
5.5  
5.5  
V
V
V
= 1.65V Max.  
75  
mA  
mA  
µA  
OLD  
OLD  
OHD  
(2)  
= 3.85V Min.  
–75  
40.0  
OHD  
(3)  
I
Maximum Quiescent  
Supply Current  
= V or GND  
IN CC  
4.0  
CC  
Notes:  
1. All outputs loaded; thresholds on input associated with output under test.  
2. Maximum test duration 2.0ms, one output loaded at a time.  
3. I and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V .  
CC  
IN  
CC  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
5
DC Electrical Characteristics for ACT  
T = +25°C  
T = –40°C to +85°C  
A
A
V
CC  
Symbol  
Parameter  
(V)  
4.5  
5.5  
4.5  
5.5  
4.5  
5.5  
Conditions  
Typ.  
Guaranteed Limits  
Units  
V
Minimum HIGH Level  
Input Voltage  
V
V
= 0.1V or  
OUT  
1.5  
1.5  
2.0  
2.0  
0.8  
0.8  
4.4  
5.4  
2.0  
2.0  
0.8  
0.8  
4.4  
5.4  
V
IH  
– 0.1V  
CC  
V
Maximum LOW Level  
Input Voltage  
V
V
= 0.1V or  
OUT  
1.5  
V
V
IL  
– 0.1V  
CC  
1.5  
V
Minimum HIGH Level  
Output Voltage  
I
= –50µA  
4.49  
5.49  
OH  
OUT  
V
I
= V or V :  
IN  
IL  
IH  
4.5  
5.5  
4.5  
5.5  
= –24mA  
3.86  
4.86  
0.1  
3.76  
4.76  
0.1  
OH  
OH  
(4)  
I
I
= –24mA  
= 50µA  
V
Maximum LOW Level  
Output Voltage  
0.001  
0.001  
V
OL  
OUT  
0.1  
0.1  
V
I
= V or V :  
IL IH  
IN  
4.5  
5.5  
= 24mA  
= 24mA  
0.36  
0.36  
0.1  
0.44  
0.44  
1.0  
OL  
(4)  
I
OL  
I
Maximum Input  
Leakage Current  
5.5 V = V , GND  
µA  
µA  
IN  
I
CC  
I
Maximum 3-STATE  
Current  
5.5 V = V , V ;  
0.25  
2.5  
OZ  
I
IL IH  
V = V , GND  
O
CC  
I
I
I
Maximum I /Input  
5.5 V = V – 2.1V  
0.6  
1.5  
75  
mA  
mA  
mA  
µA  
CCT  
CC  
I
CC  
Minimum Dynamic  
5.5  
5.5  
5.5  
V
V
V
= 1.65V Max.  
OLD  
OLD  
OHD  
(5)  
Output Current  
= 3.85V Min.  
–75  
40.0  
OHD  
I
Maximum Quiescent  
Supply Current  
= V or GND  
IN CC  
4.0  
CC  
Notes:  
4. All outputs loaded; thresholds on input associated with output under test.  
5. Maximum test duration 2.0ms, one output loaded at a time.  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
6
AC Electrical Characteristics for AC  
T = +25°C  
L
T = –40°C to +85°C,  
A
A
C = 50pF  
C = 50pF  
L
(6)  
Symbol  
Parameter  
V
(V)  
Min. Typ. Max.  
Min  
2.0  
1.5  
2.0  
1.5  
1.5  
1.5  
1.5  
1.5  
1.0  
1.0  
1.0  
1.0  
1.5  
1.5  
1.0  
1.0  
Max  
17.5  
12.5  
18.0  
13.0  
17.0  
11.5  
15.0  
11.0  
8.5  
Units  
CC  
t
t
t
t
Propagation Delay,  
3.3  
2.0  
2.0  
2.5  
2.0  
1.5  
1.5  
2.0  
1.5  
1.5  
1.5  
1.5  
1.5  
2.0  
2.0  
1.5  
1.5  
8.5  
6.5  
9.5  
7.0  
7.0  
5.5  
7.5  
5.5  
4.5  
3.5  
5.0  
3.5  
5.5  
5.0  
5.0  
4.0  
15.5  
11.0  
16.0  
11.5  
14.5  
10.0  
13.0  
9.5  
ns  
PLH  
PHL  
PLH  
PHL  
PZH  
S to Z  
n
n
5.0  
3.3  
5.0  
3.3  
5.0  
3.3  
5.0  
3.3  
5.0  
3.3  
5.0  
3.3  
5.0  
3.3  
5.0  
Propagation Delay,  
S to Z  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
n
n
Propagation Delay,  
I to Z  
n
n
Propagation Delay,  
I to Z  
n
n
t
Output Enable Time  
Output Enable Time  
Output Disable Time  
Output Disable Time  
8.0  
6.0  
6.5  
t
8.0  
9.0  
PZL  
6.0  
7.0  
t
9.5  
10.0  
8.5  
PHZ  
8.0  
t
8.0  
9.0  
PLZ  
7.0  
7.5  
Note:  
6. Voltage range 3.3 is 3.3V 0.3V. Voltage range 5.0 is 5.0V 0.5V.  
AC Electrical Characteristics for ACT  
T = +25°C,  
T = –40°C to +85°C,  
A
A
C = 50pF  
C = 50pF  
L
L
(7)  
Symbol  
Parameter  
V
(V)  
Min. Typ. Max.  
Min.  
2.0  
2.5  
2.0  
3.0  
1.5  
1.5  
2.5  
2.0  
Max.  
13.0  
14.5  
11.0  
12.5  
8.5  
Units  
ns  
CC  
t
t
t
t
Propagation Delay, S to Z  
5.0  
2.0  
3.0  
2.5  
3.5  
2.0  
2.0  
3.0  
2.5  
7.0  
7.5  
5.5  
6.5  
4.5  
5.0  
6.0  
4.5  
11.5  
13.0  
10.0  
11.0  
7.5  
PLH  
PHL  
PLH  
PHL  
PZH  
n
n
Propagation Delay, S to Z  
5.0  
5.0  
5.0  
5.0  
5.0  
5.0  
5.0  
ns  
n
n
Propagation Delay, I to Z  
ns  
n
n
Propagation Delay, I to Z  
ns  
n
n
t
Output Enable Time  
Output Enable Time  
Output Disable Time  
Output Disable Time  
ns  
t
8.0  
9.0  
ns  
PZL  
PHZ  
t
9.5  
10.0  
8.5  
ns  
t
7.5  
ns  
PLZ  
Note:  
7. Voltage range 5.0 is 5.0V 0.5V.  
Capacitance  
Symbol  
Parameter  
Conditions  
Typ.  
4.5  
Units  
C
Input Capacitance  
Power Dissipation Capacitance  
V
= OPEN  
= 5.0V  
pF  
pF  
IN  
CC  
C
V
50.0  
PD  
CC  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
7
Physical Dimensions  
Dimensions are in millimeters unless otherwise noted.  
Figure 2. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Package Number M16A  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
8
Physical Dimensions (Continued)  
Dimensions are in millimeters unless otherwise noted.  
Figure 3. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
Package Number M16D  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
9
Physical Dimensions (Continued)  
Dimensions are in millimeters unless otherwise noted.  
5.00 0.10  
4.55  
5.90  
4.45 7.35  
0.65  
4.4 0.1  
1.45  
5.00  
0.11  
12°  
MTC16rev4  
Figure 4. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Package Number MTC16  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
10  
Physical Dimensions (Continued)  
Dimensions are in inches (millimeters) unless otherwise noted.  
Figure 5. 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Package Number N16E  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
11  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an  
exhaustive list of all such trademarks.  
ACEx®  
TinyLogic®  
TINYOPTO¥  
TinyPower¥  
TinyWire¥  
TruTranslation¥  
PSerDes¥  
UHC®  
UniFET¥  
VCX¥  
Wire¥  
HiSeC¥  
i-Lo¥  
Programmable Active Droop¥  
QFET®  
QS¥  
QT Optoelectronics¥  
Quiet Series¥  
RapidConfigure¥  
RapidConnect¥  
ScalarPump¥  
SMART START¥  
SPM®  
STEALTH™  
SuperFET¥  
SuperSOT¥-3  
SuperSOT¥-6  
SuperSOT¥-8  
SyncFET™  
Across the board. Around the world.¥  
ActiveArray¥  
Bottomless¥  
Build it Now¥  
CoolFET¥  
ImpliedDisconnect¥  
IntelliMAX¥  
ISOPLANAR¥  
MICROCOUPLER¥  
MicroPak¥  
MICROWIRE¥  
MSX¥  
CROSSVOLT¥  
CTL™  
Current Transfer Logic™  
DOME¥  
MSXPro¥  
OCX¥  
E2CMOS¥  
EcoSPARK®  
EnSigna¥  
OCXPro¥  
OPTOLOGIC®  
OPTOPLANAR®  
PACMAN¥  
POP¥  
FACT Quiet Series™  
FACT®  
FAST®  
Power220®  
Power247®  
PowerEdge¥  
PowerSaver¥  
PowerTrench®  
FASTr¥  
TCM¥  
The Power Franchise®  
FPS¥  
FRFET®  
GlobalOptoisolator¥  
GTO¥  
TinyBoost¥  
TinyBuck¥  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS  
HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE  
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER  
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S  
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR  
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,  
which, (a) are intended for surgical implant into the body or  
(b) support or sustain life, and (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in a significant injury of the user.  
device, or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In Design  
This datasheet contains the design specifications for product  
development. Specifications may change in any manner without notice.  
Preliminary  
First Production  
Full Production  
Not In Production  
This datasheet contains preliminary data; supplementary data will be  
published at a later date. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve design.  
No Identification Needed  
Obsolete  
This datasheet contains final specifications. Fairchild Semiconductor  
reserves the right to make changes at any time without notice to improve  
design.  
This datasheet contains specifications on a product that has been  
discontinued by Fairchild Semiconductor. The datasheet is printed for  
reference information only.  
Rev. I24  
©1988 Fairchild Semiconductor Corporation  
74AC253, 74ACT253 Rev. 1.5  
www.fairchildsemi.com  
12  

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