74ACT139 [FAIRCHILD]
Dual 1-of-4 Decoder/Demultiplexer; 1 -的-4双解码器/多路解复用器型号: | 74ACT139 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Dual 1-of-4 Decoder/Demultiplexer |
文件: | 总9页 (文件大小:101K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
November 1988
Revised November 1999
74AC139 • 74ACT139
Dual 1-of-4 Decoder/Demultiplexer
General Description
Features
The AC/ACT139 is a high-speed, dual 1-of-4 decoder/
demultiplexer. The device has two independent decoders,
each accepting two inputs and providing four mutually-
exclusive active-LOW outputs. Each decoder has an
active-LOW Enable input which can be used as a data
input for a 4-output demultiplexer. Each half of the AC/
ACT139 can be used as a function generator providing all
four minterms of two variables.
■ ICC reduced by 50%
■ Multifunction capability
■ Two completely independent 1-of-4 decoders
■ Active LOW mutually exclusive outputs
■ Outputs source/sink 24 mA
■ ACT139 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC139SC
74AC139SJ
M16A
M16D
MTC16
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide
74AC139MTC
74AC139PC
74ACT139SC
74ACT139SJ
74ACT139MTC
74ACT139PC
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide
M16A
M16D
MTC16
N16E
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
A0, A1
Description
Address Inputs
Enable Inputs
Outputs
E
O0–O3
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS009926
www.fairchildsemi.com
Logic Symbols
Functional Description
The AC/ACT139 is a high-speed dual 1-of-4 decoder/
demultiplexer. The device has two independent decoders,
each of which accepts two binary weighted inputs (A0–A1)
and provides four mutually exclusive active-LOW outputs
(O0–O3). Each decoder has an active-LOW enable (E).
When E is HIGH all outputs are forced HIGH. The enable
can be used as the data input for a 4-output demultiplexer
application. Each half of the AC/ACT139 generates all four
minterms of two variables. These four minterms are useful
in some applications, replacing multiple gate functions as
shown in Figure 1, and thereby reducing the number of
packages required in a logic network.
IEEE/IEC
FIGURE 1. Gate Functions (Each Half)
Truth Table
Logic Diagram
Inputs
Outputs
A0
A1
O0
O1
O2
O3
E
H
L
L
L
L
X
L
X
L
H
L
H
H
L
H
H
H
L
H
H
H
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
VI = −0.5V
)
Supply Voltage (VCC
)
−20 mA
+20 mA
AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
VI = VCC + 0.5V
ACT
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
Input Voltage (VI)
Output Voltage (VO)
DC Output Diode Current (IOK
)
0V to VCC
V
V
O = −0.5V
−20 mA
+20 mA
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
AC Devices
−40°C to +85°C
O = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
−0.5V to VCC + 0.5V
V
IN from 30% to 70% of VCC
or Sink Current (IO)
±50 mA
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (∆V/∆t)
ACT Devices
125 mV/ns
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
)
±50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
−65°C to +150°C
V
IN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
140°C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
VCC
T
Typ
1.5
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Guaranteed Limits
Minimum HIGH Level
Input Voltage
2.1
2.1
3.15
3.85
0.9
V
OUT = 0.1V
2.25
2.75
1.5
3.15
3.85
0.9
V
or VCC − 0.1V
VIL
Maximum LOW Level
Input Voltage
V
OUT = 0.1V
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or VCC − 0.1V
VOH
Minimum HIGH Level
Output Voltage
4.4
4.4
IOUT = −50 µA
5.4
5.4
VIN = VIL or VIH
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
I
I
I
OH = −12 mA
V
V
OH = −24 mA
OH = −24 mA (Note 2)
VOL
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
0.1
0.1
I
OUT = 50 µA
0.1
0.1
VIN = VIL or VIH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
I
I
I
OL = 12 mA
V
OL = 24 mA
OL = 24 mA (Note 2)
IIN
(Note 4)
Maximum Input
Leakage Current
5.5
± 0.1
± 1.0
µA
VI = VCC, GND
IOLD
IOHD
Minimum Dynamic
5.5
5.5
75
mA
mA
V
OLD = 1.65V Max
OHD = 3.85V Min
Output Current (Note 3)
−75
V
ICC
(Note 4)
Maximum Quiescent
Supply Current
5.5
4.0
40.0
µA
VIN = VCC or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC
.
3
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DC Electrical Characteristics for ACT
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Typ
1.5
Guaranteed Limits
Minimum HIGH Level
Input Voltage
2.0
2.0
2.0
0.8
0.8
4.4
5.4
V
OUT = 0.1V
or VCC − 0.1V
OUT = 0.1V
or VCC − 0.1V
V
V
V
1.5
2.0
0.8
0.8
4.4
5.4
VIL
Maximum LOW Level
Input Voltage
1.5
V
1.5
VOH
Minimum HIGH Level
Output Voltage
4.49
5.49
I
OUT = −50 µA
IN = VIL or VIH
V
4.5
5.5
4.5
5.5
3.86
4.86
0.1
3.76
4.76
0.1
V
V
V
I
I
OH = −24 mA
OH = −24 mA (Note 5)
VOL
Maximum LOW Level
Output Voltage
0.001
0.001
I
OUT = 50 µA
0.1
0.1
V
IN = VIL or VIH
4.5
5.5
0.36
0.36
0.44
0.44
I
I
OL = 24 mA
OL = 24 mA (Note 5)
IIN
Maximum Input
Leakage Current
Maximum
5.5
5.5
±0.1
±1.0
µA
VI = VCC, GND
VI = VCC − 2.1V
ICCT
0.6
1.5
mA
ICC/Input
IOLD
IOHD
ICC
Minimum Dynamic
Output Current (Note 6)
Maximum Quiescent
Supply Current
5.5
5.5
75
mA
mA
V
V
V
OLD = 1.65V Max
OHD = 3.85V Min
IN = VCC
−75
5.5
4.0
40.0
µA
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
VCC
T
A = +25°C
T
A = −40°C to +85°C
L = 50 pF
Max
C
L = 50 pF
C
Symbol
Parameter
(V)
(Note 7)
3.3
Units
Min
4.0
3.0
3.0
2.5
4.5
3.5
4.0
2.5
Typ
8.0
6.5
7.0
5.5
9.5
7.0
8.0
6.0
Max
11.5
8.5
Min
tPLH
Propagation Delay
3.5
2.5
2.5
2.0
3.5
3.0
3.0
2.5
13.0
9.5
ns
ns
ns
ns
An to On
5.0
tPHL
tPLH
tPHL
Propagation Delay
An to On
3.3
10.0
7.5
11.0
8.5
5.0
Propagation Delay
En to On
3.3
12.0
8.5
13.0
10.0
11.0
8.5
5.0
Propagation Delay
En to On
3.3
10.0
7.5
5.0
Note 7: Voltage Range 3.3 is 3.3V ± 0.3V.
Voltage Range 5.0 is 5.0V ± 0.5V
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4
AC Electrical Characteristics for ACT
VCC
T
A = +25°C
T
A = −40°C to +85°C
L = 50 pF
Max
C
L = 50 pF
C
Symbol
Parameter
(V)
Units
(Note 8)
Min
Typ
Max
Min
tPLH
Propagation Delay
5.0
5.0
5.0
5.0
1.5
6.0
6.0
7.0
7.0
8.5
1.5
1.5
2.0
1.5
9.5
ns
ns
ns
ns
An to On
tPHL
tPLH
tPHL
Propagation Delay
1.5
2.5
2.0
9.5
10.0
9.5
10.5
11.0
10.5
An to On
Propagation Delay
En to On
Propagation Delay
En to On
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol
Parameter
Typ
Units
Conditions
CIN
Input Capacitance
4.5
pF
pF
VCC = OPEN
VCC = 5.0V
CPD
Power Dissipation Capacitance
40.0
5
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
Package Number M16A
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide
Package Number M16D
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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9
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