74ACTQ04SC_NL [FAIRCHILD]

Inverter, ACT Series, 6-Func, 1-Input, CMOS, PDSO14, 0.150 INCH , LEAD FREE, MS-012, SOIC-14;
74ACTQ04SC_NL
型号: 74ACTQ04SC_NL
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Inverter, ACT Series, 6-Func, 1-Input, CMOS, PDSO14, 0.150 INCH , LEAD FREE, MS-012, SOIC-14

光电二极管 逻辑集成电路
文件: 总9页 (文件大小:230K)
中文:  中文翻译
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May 2007  
74ACTQ04  
tm  
Quiet Series™ Hex Inverter  
Features  
General Description  
I reduced by 50%  
The ACTQ04 contains six inverters and utilizes Fairchild  
Quiet Series™ technology to guarantee quiet output  
switching and improved dynamic threshold performance.  
FACT Quiet Series™ features GTO™ output control and  
undershoot corrector in addition to a split ground bus for  
superior ACMOS performance.  
CC  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Improved latch-up immunity  
Outputs source/sink 24mA  
Has TTL-compatible inputs  
Ordering Information  
Order  
Number  
Package  
Number  
Package Description  
74ACTQ04SC  
74ACTQ04SJ  
74ACTQ04MTC  
M14A  
M14D  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
Pb-Free package per JEDEC J-STD-020B.  
Connection Diagram  
Logic Symbol  
IEEE/IEC  
Pin Description  
Pin Names  
Description  
A
Inputs  
Outputs  
n
O
n
FACT™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
Parameter  
Rating  
V
I
Supply Voltage  
–0.5V to +7.0V  
CC  
IK  
DC Input Diode Current  
V = –0.5V  
–20mA  
+20mA  
I
V = V + 0.5V  
I
CC  
V
DC Input Voltage  
–0.5V to V + 0.5V  
I
CC  
I
DC Output Diode Current  
OK  
V
= –0.5V  
–20mA  
+20mA  
O
V
= V + 0.5V  
O
CC  
V
DC Output Voltage  
DC Output Source or Sink Current  
–0.5V to V + 0.5V  
O
CC  
I
50mA  
50mA  
O
I
or I  
DC V or Ground Current per Output Pin  
CC  
GND  
STG  
CC  
T
Storage Temperature  
–65°C to +150°C  
300mA  
DC Latch-Up Source or Sink Current  
Junction Temperature  
T
140°C  
J
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to absolute maximum ratings.  
Symbol  
Parameter  
Rating  
V
Supply Voltage  
4.5V to 5.5V  
CC  
V
Input Voltage  
0V to V  
0V to V  
I
CC  
CC  
V
Output Voltage  
O
T
Operating Temperature  
Minimum Input Edge Rate:  
–40°C to +85°C  
125mV/ns  
A
V / t  
V
from 0.8V to 2.0V, V @ 4.5V, 5.5V  
CC  
IN  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
2
DC Electrical Characteristics  
T = +25°C T = –40°C to +85°C  
A
A
Symbol  
Parameter  
V
(V)  
Conditions  
Typ.  
Guaranteed Limits  
Units  
CC  
V
Minimum HIGH Level  
Input Voltage  
4.5  
V
= 0.1V  
CC  
1.5  
1.5  
2.0  
2.0  
0.8  
0.8  
4.4  
5.4  
2.0  
2.0  
0.8  
0.8  
4.4  
5.4  
V
IH  
OUT  
or V – 0.1V  
5.5  
4.5  
5.5  
4.5  
5.5  
V
Maximum LOW Level  
Input Voltage  
V
= 0.1V  
CC  
1.5  
V
V
IL  
OUT  
or V – 0.1V  
1.5  
V
Minimum HIGH Level  
Output Voltage  
I
= –50µA  
OUT  
4.49  
5.49  
OH  
V
I
= V or V :  
IN  
IL  
IH  
4.5  
5.5  
4.5  
5.5  
= –24mA  
3.86  
4.86  
3.76  
4.76  
0.1  
OH  
OH  
(1)  
I
I
= –24mA  
= 50µA  
V
Maximum LOW Level  
Output Voltage  
0.001 0.1  
0.001 0.1  
V
OL  
OUT  
0.1  
V
I
= V or V :  
IN  
IL  
IH  
4.5  
5.5  
5.5  
= 24mA  
0.36  
0.36  
0.1  
0.44  
0.44  
1.0  
OL  
OL  
(1)  
I
= 24mA  
I
Maximum Input  
Leakage Current  
V = V , GND  
µA  
IN  
I
CC  
I
Maximum I /Input  
5.5  
5.5  
5.5  
5.5  
V = V – 2.1V  
0.6  
1.5  
75  
mA  
mA  
mA  
µA  
CCT  
CC  
I
CC  
I
Minimum Dynamic  
V
V
V
= 1.65V Max.  
OLD  
OLD  
OHD  
(2)  
Output Current  
I
= 3.85V Min.  
–75  
20.0  
OHD  
I
Maximum Quiescent  
Supply Current  
= V or GND  
2.0  
1.5  
–0.6 –1.2  
CC  
IN  
CC  
(3)  
V
Quiet Output Maximum  
5.0  
5.0  
5.0  
5.0  
Figures 1 & 2  
1.1  
V
V
V
V
OLP  
Dynamic V  
OL  
(3)  
V
Quiet Output Minimum  
Dynamic V  
Figures 1 & 2  
OLV  
OL  
(4)  
V
Minimum HIGH Level  
Dynamic Input Voltage  
1.9  
1.2  
2.2  
0.8  
IHD  
(4)  
V
Maximum LOW Level  
Dynamic Input Voltage  
ILD  
Notes:  
1. All outputs loaded; thresholds on input associated with output under test.  
2. Maximum test duration 2.0ms, one output loaded at a time.  
3. Max number of outputs defined as (n). Data inputs are 0V to 3V. One output @ GND.  
4. Max number of data inputs (n) switching. (n–1) inputs switching 0V to 3V. Input-under-test switching:  
3V to threshold (V ), 0V to threshold (V ), f = 1MHz.  
ILD  
IHD  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
3
AC Electrical Characteristics  
T = +25°C,  
T = –40°C to +85°C,  
A
A
C = 50pF  
C = 50pF  
L
L
(5)  
Symbol  
Parameter  
V
(V)  
Min.  
Typ. Max.  
Min.  
Max.  
Units  
CC  
t
Propagation Delay,  
Data to Output  
5.0  
2.0  
6.5  
6.5  
0.5  
7.5  
7.5  
1.0  
2.0  
8.0  
ns  
PLH  
t
Propagation Delay,  
Data to Output  
5.0  
5.0  
2.0  
2.0  
8.0  
1.0  
ns  
ns  
PHL  
(6)  
t
, t  
Output to Output Skew  
OSHL OSLH  
Notes:  
5. Voltage range 5.0 is 5.0V 0.5V.  
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two  
separate outputs of the same device. The specification applies to any outputs switching in the same direction,  
either HIGH-to-LOW (t  
) or LOW-to-HIGH (t  
). Parameter guaranteed by design.  
OSHL  
OSLH  
Capacitance  
Symbol  
Parameter  
Conditions  
Typ.  
4.5  
Units  
pF  
C
C
Input Capacitance  
V
V
= OPEN  
= 5.0V  
IN  
CC  
Power Dissipation Capacitance  
74  
pF  
PD  
CC  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
4
FACT™ Noise Characteristics  
The setup of a noise characteristics measurement is  
critical to the accuracy and repeatability of the tests. The  
following is a brief description of the setup used to  
measure the noise characteristics of FACT.  
V
/V  
and V  
/V  
:
OLP OLV  
OHP OHV  
Determine the quiet output pin that demonstrates the  
greatest noise levels. The worst case pin will usually  
be the furthest from the ground pin. Monitor the output  
voltages using a 50coaxial cable plugged into a  
standard SMB type connector on the test fixture.  
Do not use an active FET probe.  
Equipment:  
Hewlett Packard Model 8180A Word Generator  
PC-163A Test Fixture  
Measure V  
and V  
on the quiet output during  
OLP  
OLV  
worst case transition for active and enable. Measure  
and V on the quiet output during the worst  
case active and enable transition.  
Tektronics Model 7854 Oscilloscope  
V
OHP  
OHV  
Procedure:  
1. Verify Test Fixture Loading: Standard Load 50pF,  
Verify that the GND reference recorded on the  
oscilloscope has not drifted to ensure the accuracy  
and repeatability of the measurements.  
500.  
2. Deskew the HFS generator so that no two channels  
have greater than 150ps skew between them. This  
requires that the oscilloscope be deskewed first. It is  
important to deskew the HFS generator channels  
before testing. This will ensure that the outputs switch  
simultaneously.  
V
and V  
:
ILD  
IHD  
Monitor one of the switching outputs using a 50Ω  
coaxial cable plugged into a standard SMB type  
connector on the test fixture. Do not use an active  
FET probe.  
3. Terminate all inputs and outputs to ensure proper  
loading of the outputs and that the input levels are at  
the correct voltage.  
First increase the input LOW voltage level, V , until  
IL  
the output begins to oscillator steps out a min of 2ns.  
Oscillation is defined as noise on the output LOW  
4. Set the HFS generator to toggle all but one output at  
a frequency of 1MHz. Greater frequencies will  
increase DUT heating and effect the results of the  
measurement.  
level that exceeds V limits, or on output HIGH levels  
IL  
that exceed V limits. The input LOW voltage level at  
IH  
which oscillation occurs is defined as V  
.
ILD  
Next decrease the input HIGH voltage level, V , until  
IH  
the output begins to oscillate or steps out a min of 2ns.  
Oscillation is defined as noise on the output LOW  
level that exceeds V limits, or on output HIGH levels  
IL  
that exceed V limits. The input HIGH voltage level at  
IH  
which oscillation occurs is defined as V  
.
IHD  
Verify that the GND reference recorded on the  
oscilloscope has not drifted to ensure the accuracy  
and repeatability of the measurements.  
Notes:  
7. V  
and V  
are measured with respect to ground  
OHV  
OLP  
reference.  
8. Input pulses have the following characteristics:  
f = 1MHz, t = 3ns, t = 3ns, skew < 150ps.  
r
f
Figure 1. Quiet Output Noise Voltage Waveforms  
5. Set the HFS generator input levels at 0V LOW and 3V  
HIGH for ACT devices and 0V LOW and 5V HIGH for  
AC devices. Verify levels with an oscilloscope.  
Figure 2. Simultaneous Switching Test Circuit  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
5
Physical Dimensions  
Dimensions are in inches (millimeters) unless otherwise noted.  
Figure 3. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Package Number M14A  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
6
Physical Dimensions (Continued)  
Dimensions are in millimeters unless otherwise noted.  
Figure 4. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
Package Number M14D  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
7
Physical Dimensions (Continued)  
Dimensions are in millimeters unless otherwise noted.  
Figure 5. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Package Number MTC14  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
8
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an  
exhaustive list of all such trademarks.  
ACEx®  
i-Lo™  
Power-SPM™  
PowerTrench®  
Programmable Active Droop™  
QFET®  
TinyBoost™  
TinyBuck™  
TinyLogic®  
TINYOPTO™  
TinyPower™  
TinyWire™  
TruTranslation™  
µSerDes™  
UHC®  
Across the board. Around the world.™  
ActiveArray™  
Bottomless™  
Build it Now™  
CoolFET™  
CROSSVOLT™  
CTL™  
Current Transfer Logic™  
ImpliedDisconnect™  
IntelliMAX™  
ISOPLANAR™  
MICROCOUPLER™  
MicroPak™  
MICROWIRE™  
Motion-SPM™  
MSX™  
QS™  
QT Optoelectronics™  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
ScalarPump™  
SMART START™  
SPM®  
STEALTH™  
SuperFET™  
SuperSOT-3  
SuperSOT-6  
SuperSOT-8  
SyncFET™  
DOME™  
UniFET™  
VCX™  
Wire™  
MSXPro™  
OCX™  
E2CMOS™  
EcoSPARK®  
EnSigna™  
OCXPro™  
OPTOLOGIC®  
OPTOPLANAR®  
PACMAN™  
PDP-SPM™  
POP™  
FACT Quiet Series™  
FACT®  
FAST®  
FASTr™  
Power220®  
FPS™  
FRFET®  
Power247®  
TCM™  
PowerEdge™  
PowerSaver™  
The Power Franchise®  
GlobalOptoisolator™  
GTO™  
HiSeC™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS  
HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE  
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER  
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S  
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR  
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,  
which, (a) are intended for surgical implant into the body or  
(b) support or sustain life, and (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in a significant injury of the user.  
device, or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In Design  
This datasheet contains the design specifications for product  
development. Specifications may change in any manner without notice.  
Preliminary  
First Production  
Full Production  
Not In Production  
This datasheet contains preliminary data; supplementary data will be  
published at a later date. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve design.  
No Identification Needed  
Obsolete  
This datasheet contains final specifications. Fairchild Semiconductor  
reserves the right to make changes at any time without notice to improve  
design.  
This datasheet contains specifications on a product that has been  
discontinued by Fairchild Semiconductor. The datasheet is printed for  
reference information only.  
Rev. I26  
©1990 Fairchild Semiconductor Corporation  
74ACTQ04 Rev. 1.4  
www.fairchildsemi.com  
9

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