74LCX86SJ [FAIRCHILD]
Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs; 低电压四2输入异或门与5V容限输入
| 型号： | 74LCX86SJ |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs |
| 文件： | 总7页 (文件大小：85K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
March 1995
Revised March 1999
74LCX86
Low Voltage Quad 2-Input Exclusive-OR Gate
with 5V Tolerant Inputs
General Description
The LCX86 contains four 2-input exclusive-OR gates. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
Features
■ 5V tolerant inputs
■ 2.3V–3.6V VCC specifications provided
■ 6.5 ns tPD max (VCC = 3.3V), 10 µA ICC max
The 74LCX86 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
■ Power down high impedance inputs and outputs
■ ±24 mA output drive (VCC = 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Machine model > 2000V
Human model > 200V
Ordering Code:
Order Number Package Number
Package Description
74LCX86M
M14A
M14D
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX86SJ
74LCX86MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A0–A3
Description
Inputs
B0–B3
Inputs
O0–O3
Outputs
© 1999 Fairchild Semiconductor Corporation
DS012415.prf
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Symbol
Parameter
Supply Voltage
Value
Conditions
Units
VCC
VI
−0.5 to +7.0
−0.5 to +7.0
V
V
DC Input Voltage
VO
IIK
DC Output Voltage
−0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 2)
V
DC Input Diode Current
DC Output Diode Current
−50
−50
VI < GND
mA
IOK
V
V
O < GND
O > VCC
mA
+50
IO
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
±50
mA
mA
mA
°C
ICC
±100
IGND
TSTG
±100
−65 to +150
Recommended Operating Conditions (Note 3)
Symbol
Parameter
Min
Max
Units
VCC
Supply Voltage
Operating
Data Retention
2.0
1.5
0
3.6
3.6
5.5
VCC
±24
±12
±8
V
VI
Input Voltage
Output Voltage
Output Current
V
V
VO
HIGH or LOW State
0
IOH/IOL
V
V
V
CC = 3.0V − 3.6V
CC = 2.7V − 3.0V
CC = 2.3V − 2.7V
mA
TA
Free-Air Operating Temperature
−40
85
°C
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0
10
ns/V
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 2: I Absolute Maximum Rating must be observed.
O
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
V
T = −40°C to +85°C
A
CC
Symbol
Parameter
Conditions
Units
(V)
Min
1.7
2.0
Max
V
HIGH Level Input Voltage
2.3 − 2.7
IH
V
V
2.7 − 3.6
2.3 − 2.7
2.7 − 3.6
2.3 − 3.6
2.3
V
V
LOW Level Input Voltage
HIGH Level Output Voltage
0.7
0.8
IL
I
= −100µA
V
- 0.2
OH
OH
CC
I
= -8 mA
= −12 mA
= −18 mA
= −24 mA
= 100µA
= 8mA
1.8
2.2
2.4
2.2
OH
I
2.7
OH
V
V
I
3.0
OH
I
3.0
OH
V
LOW Level Output Voltage
I
2.3 − 3.6
2.3
0.2
0.6
OL
OL
I
OL
I
= 12 mA
= 16 mA
= 24 mA
2.7
0.4
0.4
0.55
±5.0
10
OL
I
3.0
OL
I
3.0
OL
I
I
I
Input Leakage Current
0 ≤ V ≤ 5.5V
2.3 − 3.6
0
µA
µA
I
I
Power-Off Leakage Current
Quiescent Supply Current
V or V = 5.5V
I O
OFF
CC
V = V or GND
2.3 − 3.6
2.3 − 3.6
2.3 − 3.6
10
I
CC
µA
µA
3.6V ≤ V ≤ 5.5V
±10
500
I
∆I
Increase in I per Input
V
= V −0.6V
CC
CC
IH CC
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2
AC Electrical Characteristics
T
= −40°C to +85°C, R = 500Ω
L
A
V
= 3.3V ± 0.3V
V
= 2.7V
V
= 2.5V ± 0.2V
CC
CC
CC
Symbol
Parameter
Units
C
= 50 pF
C
= 50 pF
C = 30 pF
L
L
L
Min
1.5
1.5
Max
Min
Max
Min
1.5
1.5
Max
t
t
t
t
Propagation Delay
6.5
6.5
1.0
1.0
1.5
1.5
7.0
7.0
7.8
7.8
PHL
ns
ns
PLH
Output to Output Skew (Note 4)
OSHL
OSLH
Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
).
OSLH
OSHL
Dynamic Switching Characteristics
V
(V)
T = 25°C
A
CC
Symbol
Parameter
Conditions
= 50 pF, V = 3.3V, V = 0V
Units
Typical
0.8
V
V
Quiet Output Dynamic Peak V
C
C
C
C
3.3
2.5
3.3
2.5
OLP
OL
L
L
L
L
IH
IL
V
V
= 30 pF, V = 2.5V, V = 0V
0.6
IH
IL
Quiet Output Dynamic Valley V
= 50 pF, V = 3.3V, V = 0V
−0.8
−0.6
OLV
OL
IH
IL
= 30 pF, V = 2.5V, V = 0V
IH
IL
Capacitance
Symbol
Parameter
Conditions
= Open, V = 0V or V
Typical
Units
C
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
V
V
V
7
8
pF
pF
pF
IN
CC
CC
CC
I
CC
C
C
= 3.3V, V = 0V or V
I CC
OUT
PD
= 3.3V, V = 0V or V , f = 10 MHz
25
I
CC
3
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AC Loading and Waveforms Generic for LCX Family
FIGURE 1. AC Test Circuit
(CL includes probe and jig capacitance)
Test
Switch
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH,tPHZ
GND
3-STATE Output Low Enable and
Waveform for Inverting and Non-Inverting Functions
Disable Times for Logic
Setup Time, Hold TIme and Recovery TIme for Logic
Propagation Delay, Pulse Width and trec Waveforms
3-STATE Output High Enable and
Disable TImes for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Pulse Characteristics; f=1MHz, tr=tf=3ns)
VCC
Symbol
Vmi
3.3V ± 0.3V
1.5V
1.5V
2.7V
2.5V ± 0.2V
VCC/2
VCC/2
1.5V
1.5V
Vmo
Vx
V
V
OL + 0.3V
OH − 0.3V
V
V
OL + 0.3V
OH − 0.3V
V
V
OL + 0.15V
OH − 0.15V
Vy
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4
Schematic Diagram Generic for LCX Family
5
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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