74LVQ244SJ [FAIRCHILD]

Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs; 低压带3态输出的八路缓冲器/线路驱动器


型号：	74LVQ244SJ
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs 低压带3态输出的八路缓冲器/线路驱动器总线驱动器总线收发器逻辑集成电路光电二极管
文件：	总6页 (文件大小：92K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

May 1998

74LVQ244

Low Voltage Octal Buffer/Line Driver with 3-STATE

Outputs

General Description

Features

n Ideal for low power/low noise 3.3V applications

n Implements patented EMI reduction circuitry

The LVQ244 is an octal buffer and line driver designed to be

employed as a memory address driver, clock driver and bus

oriented transmitter or receiver which provides improved PC

board density.

n Available in SOIC JEDEC, SOIC EIAJ and QSOP

packages

n Guaranteed simultaneous switching noise level and

dynamic threshold performance

n Improved latch-up immunity

n Guaranteed incident wave switching into 75Ω

n 4 kV minimum ESD immunity

Ordering Code:

Order Number

74LVQ244SC

74LVQ244SJ

Package Number

M20B

Package Description

20-Lead (0.300" Wide) Molded Small Outline Package, SOIC, JEDEC

20-Lead Shrink Molded Small Outline Package, SOIC, EIAJ

20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP, JEDEC

M20D

74LVQ244QSC

MQA20

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

IEEE/IEC

Pin Assignment for SOIC and QSOP

DS011356-2

DS011356-1

DS011356

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Truth Tables

Inputs

OE₁

Outputs

I_n

(Pins 12, 14, 16, 18)

Inputs

Outputs

OE₂

I_n

(Pins 3, 5, 7, 9)

HIGH Voltage Level

LOW Voltage Level

Immaterial

High Impedance

Pin Descriptions

Pin Names

OE₁, OE₂

I₀–I₇

Description

3-STATE Output Enable Inputs

Inputs

O₀–O₇

Outputs

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Absolute Maximum Ratings (Note 1)

Recommended Operating

Conditions ^{(Note 2)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

DC Input Diode Current (I_IK

)

Supply Voltage (V_CC

)

2.0V to 3.6V

0V to V_CC

V_I−0.5V

−20 mA

+20 mA

Input Voltage (V_I)

V_IV_CC+ 0.5V

Output Voltage (V_O)

0V to V_CC

DC Input Voltage (V_I)

−0.5V to V_CC+ 0.5V

Operating Temperature (T_A)

Minimum Input Edge Rate ∆V/∆t

V_INfrom 0.8V to 2.0V

−40˚C to +85˚C

DC Output Diode Current (I_OK

)

V_O−0.5V

−20 mA

+20 mA

V_OV_CC+ 0.5V

V_CC3.0V

125 mV/ns

DC Output Voltage (V_O)

DC Output Source

−0.5V to V_CC+ 0.5V

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be op-

erated at these limits. The parametric values defined in the Electrical Charac-

teristics tables are not guaranteed at the absolute maximum ratings. The

“Recommended Operating Conditions” table will define the conditions for ac-

tual device operation.

50 mA

or Sink Current (I_O

DC V_CCor Ground Current

(I_CCor I_GND

)

400 mA

Note 2: Unused inputs must be held HIGH or LOW. They may not float.

Storage Temperature (T_STG

DC Latch-Up Source or

Sink Current

)

−65˚C to +150˚C

300 mA

DC Electrical Characteristics

V_CC

Symbol

Parameter

T_A+25˚C

T_A−40˚C to +85˚C

Units

Conditions

(V)

3.0

Typ

Guaranteed Limits

V_IH

Minimum High Level

Input Voltage

1.5

2.0

0.8

2.0

0.8

V_OUT0.1V

or V_CC− 0.1V

V_IL

Maximum Low Level

Input Voltage

1.5

V_OUT0.1V

or V_CC− 0.1V

I_OUT−50 µA

V_OH

Minimum High Level

Output Voltage

3.0

2.99

2.9

V_INV_ILor V_IH(Note 3)

2.58

2.48

I_OH−12 mA

I_OUT50 µA

V_OL

Maximum Low Level

Output Voltage

3.0

0.002

0.1

V_INV_ILor V_IH(Note 3)

0.36

0.44

I_OL12 mA

1.0

I_IN

Maximum Input

Leakage Current

3.6

0.1

µA

V_IV_CC, GND

V_OLD0.8V Max (Note 5)

I_OLD

I_OHD

I_CC

Minimum Dynamic (Note 4)

Output Current

3.6

µA

V_OHD2.0V Min (Note 5)

−25

40.0

Maximum Quiescent

Supply Current

4.0

V_INV_CC

or GND

I_OZ

Maximum 3-STATE

Leakage Current

V_I(OE) V_IL, V_IH

2.5

3.6

0.25

µA

V_IV_CC, GND

V_OV_CC, GND

V_OLP

V_OLV

V_IHD

V_ILD

Quiet Output

3.3

0.4

−0.4

1.7

0.8

(Notes 6, 7)

(Notes 6, 8)

Maximum Dynamic V_OL

Quiet Output

Minimum Dynamic V_OL

−0.8

2.0

Minimum High Level

Dynamic Input Voltage

Maximum Low Level

Dynamic Input Voltage

1.7

0.8

Note 3: All outputs loaded thresholds on input associated with output under test.

Note 4: Maximum test duration 2.0 ms, one output loaded at a time.

Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed for 74LVQ.

Note 6: Worst case package.

Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.

Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V ), 0V to threshold (V ),

ILD

IHD

1 MHz.

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AC Electrical Characteristics

T_A−40˚C to +85˚C

V_CC

(V)

T_A+25˚C

Symbol

Parameter

Units

C_L50 pF

Min

2.0

2.5

1.0

Typ

8.4

7.0

9.6

8.0

10.8

9.0

1.0

Max

12.7

9.0

Min

Max

14.0

9.5

t_PHL

t_PLH

t_PZL

Propagation Delay

Data to Output

2.7

2.0

2.5

1.0

3.3 0.3

Output Enable Time

2.7

16.9

12.0

19.0

13.5

1.5

18.0

12.5

20.0

14.0

1.5

t_PZH

t_PHZ

t_PLZ

3.3 0.3

Output Disable Time

2.7

3.3 0.3

t_OSHL

t_OSLH

Output to Output

2.7

Skew Data to Output (Note 9)

3.3 0.3

1.5

Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci-

fication applies to any outputs switching in the same direction, either HIGH to LOW (t

) or LOW to HIGH (t ). Parameter guaranteed by design.

OSLH

OSHL

Capacitance

Symbol

Parameter

Input Capacitance

Power Dissipation Capacitance

Typ

4.5

Units

Conditions

V_CCOpen

C_IN

C_PD(Note 10)

Note 10: is measured at 10 MHz.

V_CC3.3V

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Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead (0.300" Wide) Molded Small Outline Package, SOIC, JEDEC

Package Number M20B

20-Lead Shrink Molded Small Outline Package, SOIC, EIAJ

Package Number M20D

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP, JEDEC

(also known as QSOP)

Package Number MQA20

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-

VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI-

CONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or sys-

tems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, and (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can

be reasonably expected to result in a significant injury

to the user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

Fairchild Semiconductor

Corporation

Fairchild Semiconductor

Europe

Fairchild Semiconductor

Hong Kong Ltd.

Fairchild Semiconductor

Japan Ltd.

Americas

Fax: +49 (0) 1 80-530 85 86

Email: europe.support@nsc.com

Deutsch Tel: +49 (0) 8 141-35-0

8/F Room 808 Empire Centre

68 Mody Road, Tsimshatsui East

Kowloon, Hong Kong

Tel: 852-2722-8338

Fax: 852-2722-8383

4F, Natsume BI,

Customer Response Center

Tel: 1-888-522-5372

Fax: 972-910-8036

2-18-6 Yushima, Bunkyo-ku,

Tokyo 113-0034, Japan

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Fax: 81-3-3818-8450

English Tel: +44 (0) 1 793-85-68-56

Italy

Tel: +39 (0) 2 57 5631

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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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