74LVTH2245MTC [FAIRCHILD]
Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs and 25ヘ Series Resistors in the B Port Outputs; 低电压八路双向收发器3 -STATE输入/输出和25ヘ系列电阻在B端口输出
| 型号： | 74LVTH2245MTC |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs and 25ヘ Series Resistors in the B Port Outputs |
| 文件： | 总9页 (文件大小：108K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1999
Revised March 2005
74LVT2245 • 74LVTH2245
Low Voltage Octal Bidirectional Transceiver with
3-STATE Inputs/Outputs and 25: Series Resistors
in the B Port Outputs
General Description
Features
■ Input and output interface capability to systems at
The LVT2245 and LVTH2245 contain eight non-inverting
bidirectional buffers with 3-STATE outputs and are
intended for bus-oriented applications. The Transmit/
Receive (T/R) input determines the direction of data flow
through the bidirectional transceiver. Transmit (active-
HIGH) enables data from A Ports to B Ports; Receive
(active-LOW) enables data from B Ports to A Ports. The
Output Enable input, when HIGH, disables both A and B
Ports by placing them in a high impedance state. The
equivalent 25 -series resistor in the B Port helps reduce
output overshoot and undershoot.
5V VCC
■ Equivalent 25 series resistor on B Port outputs
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH2245),
also available without bushold feature (74LVT2245)
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink 12 mA/ 12 mA on B Port,
The LVTH2245 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
32 mA/ 64 mA on A Port
■ Latch-up performance exceeds 500 mA
■ ESD performance:
These transceivers are designed for low voltage (3.3V)
VCC applications, but with the capability to provide a TTL
Human-body model 2000V
Machine model 200V
interface to
a 5V environment. The LVT2245 and
LVTH2245 are fabricated with an advanced BiCMOS tech-
nology to achieve high speed operation similar to 5V ABT
while maintaining low power dissipation.
Charged-device model 1000V
Ordering Code:
Package
Order Number
Package Description
Number
74LVT2245WM
74LVT2245SJ
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVT2245MSA
74LVT2245MTC
MSA20
MTC20
MTC20
74LVT2245MTCX_NL
(Note 1)
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74LVTH2245WM
74LVTH2245SJ
74LVTH2245MSA
74LVTH2245MTC
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MSA20
MTC20
MTC20
74LVTH2245MTCX_NL
(Note 1)
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
© 2005 Fairchild Semiconductor Corporation
DS012173
www.fairchildsemi.com
Logic Symbols
Pin Descriptions
IEEE/IEC
Pin Names
Description
OE
Output Enable Input
Transmit/Receive Input
T/R
A0–A7
B0–B7
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Truth Table
Inputs
Outputs
OE
L
T/R
L
Bus B Data to Bus A
Bus A Data to Bus B
HIGH-Z State
L
H
H
X
H
L
X
HIGH Voltage Level
LOW Voltage Level
Immaterial
Connection Diagram
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2
Absolute Maximum Ratings(Note 2)
Symbol
VCC
Parameter
Supply Voltage
Value
0.5 to 4.6
0.5 to 7.0
0.5 to 7.0
0.5 to 7.0
50
Conditions
Units
V
V
VI
DC Input Voltage
Output Voltage
VO
Output in 3-STATE
V
Output in HIGH or LOW State (Note 3)
VI GND
IIK
IOK
IO
DC Input Diode Current
DC Output Diode Current
DC Output Current
mA
mA
50
VO GND
64
VO VCC Output at HIGH State
VO VCC Output at LOW State
mA
128
ICC
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
64
mA
mA
C
IGND
TSTG
128
65 to 150
Recommended Operating Conditions
Symbol
VCC
Parameter
Min
2.7
0
Max
3.6
5.5
32
Units
Supply Voltage
V
V
VI
Input Voltage
IOH
HIGH-Level Output Current
A Port
B Port
A Port
B Port
mA
mA
12
IOL
LOW-Level Output Current
64
12
TA
Free Air Operating Temperature
40
0
85
C
t/ V
Input Edge Rate, VIN 0.8V–2.0V, VCC 3.0V
10
ns/V
Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 3: I Absolute Maximum Rating must be observed.
O
3
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DC Electrical Characteristics
V
T
40 C to 85 C
CC
A
Symbol
Parameter
Units
Conditions
(V)
2.7
Min
Max
V
V
V
V
Input Clamp Diode Voltage
Input HIGH Voltage
1.2
V
V
V
I
18 mA
0.1V or
0.1V
IK
I
2.7–3.6
2.7–3.6
2.7
2.0
V
IH
O
O
Input LOW Voltage
0.8
V
V
CC
IL
Output HIGH Voltage
A Port
B Port
A Port
2.4
2.0
2.0
I
I
I
I
I
I
I
I
I
I
8 mA
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
OL
V
3.0
32 mA
12 mA
3.0
V
V
2.7–3.6
2.7
V
0.2
100 A
CC
V
Output LOW Voltage
0.5
0.4
24 mA
16 mA
32 mA
64 mA
12 mA
OL
3.0
V
3.0
0.5
3.0
0.55
0.8
B Port
3.0
V
V
2.7
0.2
100
0.8V
2.0V
A
I
Bushold Input Minimum Drive
75
75
V
I(HOLD)
I
I
3.0
3.0
A
A
(Note 4)
V
I
Bushold Input Over-Drive
Current to Change State
Input Current
500
500
(Note 5)
(Note 6)
I(OD)
(Note 4)
I
3.6
3.6
10
1
V
V
V
V
5.5V
0V or V
0V
I
I
I
I
I
Control Pins
Data Pins
CC
A
5
3.6
0
1
V
CC
I
Power Off Leakage Current
Power Up/Down
100
A
A
0V V or V
5.5V
OFF
I
O
I
V
V
V
V
V
V
V
0.5V to 3.0V
PU/PD
O
I
0–1.5V
100
3-STATE Current
GND or V
0.5V
CC
I
3-STATE Output Leakage Current
(Note 4) 3-STATE Output Leakage Current
3-STATE Output Leakage Current
(Note 4) 3-STATE Output Leakage Current
3-STATE Output Leakage Current
Power Supply Current
3.6
3.6
3.6
3.6
3.6
3.6
3.6
3.6
3.6
5
5
A
A
OZL
O
O
O
O
CC
I
0.0V
OZL
I
5
A
3.0V
OZH
I
5
A
3.6V
OZH
I
10
0.19
5
A
V
5.5V
OZH
O
I
mA
mA
mA
mA
Outputs High
Outputs Low
CCH
I
Power Supply Current
CCL
I
Power Supply Current
0.19
0.19
Outputs Disabled
CCZ
I
Power Supply Current
V
V
5.5V,
Outputs Disabled
One Input at V
CCZ
CC
O
I
Increase in Power Supply Current
(Note 7)
3.6
0.2
mA
0.6V
CC
CC
Other Inputs at V or GND
CC
Note 4: Applies to Bushold versions only (74LVTH2245).
Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than V or GND.
CC
Dynamic Switching Characteristics (Note 8)
V
T
25 C
Conditions
CC
A
Symbol
Parameter
Units
C
50 pF, R
500
(V)
3.3
3.3
Min
Typ
Max
L
L
V
V
Quiet Output Maximum Dynamic V
0.8
0.8
V
V
(Note 9)
(Note 9)
OLP
OLV
OL
Quiet Output Minimum Dynamic V
OL
Note 8: Characterized in SOIC package. Guaranteed parameter, but not tested.
Note 9: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. Output under test held LOW.
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4
AC Electrical Characteristics
T
40 C to 85 C
50 pF, R 500
A
C
L
L
Symbol
Parameter
Units
V
3.3V 0.3V
V
2.7V
Max
CC
CC
Min
1.2
1.2
1.2
1.2
1.3
1.7
1.3
1.7
2.0
2.0
2.0
2.0
Max
4.4
4.4
3.6
3.5
6.2
6.2
5.5
5.7
5.9
5.4
5.9
5.0
Min
1.2
1.2
1.2
1.2
1.3
1.7
1.3
1.7
2.0
2.0
2.0
2.0
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Propagation Delay Data to B Port Output
Propagation Delay Data to A Port Output
Output Enable Time for B Port Output
Output Enable Time for A Port Output
Output Disable Time for B Port Output
Output Disable Time for A Port Output
5.1
5.1
4.0
4.0
7.3
7.3
7.1
6.7
6.5
5.7
6.5
5.1
1.0
PLH
ns
ns
ns
ns
ns
ns
ns
ns
PHL
PLH
PHL
PZH
PZL
PZH
PZL
PHZ
PLZ
PHZ
PLZ
A Port Output to Output Skew
(Note 10)
OSHL
OSLH
OSHL
OSLH
1.0
1.0
B Port Output to Output Skew
(Note 10)
1.0
Note 10: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
).
OSLH
OSHL
Capacitance (Note 11)
Symbol
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
Typical
Units
pF
C
C
V
V
0V, V 0V or V
4
8
IN
CC
I
CC
3.0V, V
0V or V
CC
pF
I/O
CC
O
Note 11: Capacitance is measured at frequency f 1 MHz, per MIL-STD-883, Method 3012.
5
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
www.fairchildsemi.com
8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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9
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