74LVTH244 [FAIRCHILD]
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs; 低压带3态输出的八路缓冲器/线路驱动器
| 型号： | 74LVTH244 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs |
| 文件： | 总8页 (文件大小：87K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 1999
Revised August 1999
74LVT244 •74LVTH244
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
Features
■ Input and output interface capability to systems at
The LVT244 and LVTH244 are octal buffers and line drivers
designed to be employed as memory address drivers,
clock drivers and bus oriented transmitters or receivers
which provide improved PC board density.
5V VCC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH244),
also available without bushold feature (74LVT244)
The LVTH244 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
■ Live insertion/extraction permitted
These octal buffers and line drivers are designed for low-
voltage (3.3V) VCC applications, but with the capability to
■ Power Up/Down high impedance provides glitch-free
bus loading
provide a TTL interface to a 5V environment. The LVT244
and LVTH244 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
■ Outputs source/sink −32 mA/+64 mA
■ Functionally compatible with the 74 series 244
■ Latch-up performance exceeds 500 mA
Ordering Code:
Order Number
74LVT244WM
74LVT244SJ
Package Number
M20B
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
M20D
74LVT244MSA
74LVT244MTC
74LVTH244WM
74LVTH244SJ
74LVTH244MSA
74LVTH244MTC
MSA20
MTC20
M20B
M20D
MSA20
MTC20
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation
DS500154
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Connection Diagram
Pin Descriptions
Pin Names
Description
3-STATE Output
Enable Inputs
OE1, OE2
I0–I7
Inputs
O0–O7
Output
Truth Tables
Inputs
Outputs
OE1
In
(Pins 12, 14, 16, 18)
L
L
L
H
X
L
H
Z
H
Inputs
Outputs
OE2
In
(Pins 3, 5, 7, 9)
L
L
L
H
X
L
H
Z
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
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2
Absolute Maximum Ratings(Note 1)
Symbol
VCC
Parameter
Supply Voltage
Value
−0.5 to +4.6
−0.5 to +7.0
−0.5 to +7.0
−0.5 to +7.0
−50
Conditions
Units
V
VI
DC Input Voltage
V
VO
DC Output Voltage
Output in 3-STATE
V
Output in HIGH or LOW State (Note 2)
V
IIK
IOK
IO
DC Input Diode Current
DC Output Diode Current
DC Output Current
VI < GND
mA
mA
−50
V
V
V
O < GND
64
O > VCC Output at HIGH State
O > VCC Output at LOW State
mA
128
ICC
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
±64
mA
mA
°C
IGND
TSTG
±128
−65 to +150
Recommended Operating Conditions
Symbol
VCC
Parameter
Min
2.7
0
Max
3.6
5.5
−32
64
Units
Supply Voltage
V
V
VI
Input Voltage
IOH
IOL
TA
HIGH-Level Output Current
LOW-Level Output Current
mA
Free-Air Operating Temperature
−40
85
°C
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0
10
ns/V
Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 2: I Absolute Maximum Rating must be observed.
O
3
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DC Electrical Characteristics
T
=−40°C to +85°C
A
V
(V)
CC
Symbol
Parameter
Units
Conditions
Min
Typ
Max
−1.2
0.8
(Note 3)
V
V
V
V
Input Clamp Diode Voltage
Input HIGH Voltage
2.7
2.7–3.6
2.7–3.6
2.7–3.6
2.7
V
I = −18 mA
IK
I
2.0
V
≤ 0.1V or
IH
IL
O
O
V
Input LOW Voltage
V
≥ V − 0.1V
CC
Output HIGH Voltage
V
−0.2
V
V
I
I
I
I
I
I
I
I
= −100 µA
= −8 mA
= −32 mA
= 100 µA
= 24 mA
= 16 mA
= 32 mA
= 64 mA
OH
CC
OH
OH
OH
OL
OL
OL
OL
OL
2.4
2.0
3.0
V
V
Output LOW Voltage
2.7
0.2
0.5
V
OL
2.7
V
3.0
0.4
V
3.0
0.5
V
3.0
0.55
V
I
Bushold Input Minimum Drive
3.0
75
−75
500
−500
µA
µA
µA
µA
µA
µA
µA
µA
µA
V = 0.8V
I
I(HOLD)
(Note 4)
V = 2.0V
I
I
Bushold Input Over-Drive
Current to Change State
3.0
(Note 5)
(Note 6)
I(OD)
(Note 4)
I
Input Current
3.6
3.6
3.6
10
±1
−5
1
V = 5.5V
I
I
Control Pins
Data Pins
V = 0V or V
I CC
V = 0V
I
V = V
I
CC
I
I
Power Off Leakage Current
Power up/down 3-STATE
Output Current
0
±100
0V ≤ V or V ≤ 5.5V
I O
OFF
V
= 0.5V to 3.0V
PU/PD
O
0–1.5V
±100
µA
V = GND or V
I
CC
I
I
I
I
I
I
I
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
Power Supply Current
3.6
3.6
3.6
3.6
3.6
3.6
3.6
−5
5
µA
µA
µA
V
V
V
= 0.5V
= 3.0V
OZL
OZH
O
O
+
10
< V ≤ 5.5V
CC O
OZH
0.19
5
mA Outputs HIGH
mA Outputs LOW
mA Outputs Disabled
CCH
CCL
CCZ
Power Supply Current
Power Supply Current
0.19
0.19
+
Power Supply Current
mA
V
≤ V ≤ 5.5V,
CCZ
CC O
Outputs Disabled
mA One Input at V − 0.6V
∆I
Increase in Power Supply Current
(Note 7)
3.6
0.2
CC
CC
Other Inputs at V or GND
CC
Note 3: All typical values are at V = 3.3V, T = 25°C.
CC
A
Note 4: Applies to bushold versions only (74LVTH244).
Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than V or GND.
CC
Dynamic Switching Characteristics (Note 8)
T
= 25°C
V
(V)
A
Conditions
CC
Symbol
Parameter
Units
C
= 50 pF, R = 500Ω
L
L
Min
Typ
0.8
Max
V
V
Quiet Output Maximum Dynamic V
3.3
3.3
V
V
(Note 9)
(Note 9)
OLP
OL
Quiet Output Minimum Dynamic V
−0.8
OLV
OL
Note 8: Characterized in SOIC package. Guaranteed parameter, but not tested.
Note 9: Max number of outputs defined as (n). n−1 data inputs are driven 0V to 3V. Output under test held LOW.
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4
AC Electrical Characteristics
T
= −40°C to +85°C
A
C
= 50 pF, R = 500Ω
L
L
V
= 3.3V ± 0.3V
V
= 2.7V
CC
Symbol
Parameter
Units
CC
Min
Typ
Max
Min
Max
(Note 10)
t
t
t
t
t
t
t
t
Propagation Delay Data to Output
Output Enable Time
1.1
1.3
1.1
1.4
1.9
1.8
3.8
3.9
4.5
4.4
4.9
4.4
1.1
1.3
1.1
1.4
1.9
1.8
4.0
4.2
5.3
5.0
5.1
4.4
PLH
ns
ns
ns
ns
PHL
PZH
PZL
Output Disable Time
PHZ
PLZ
Output to Output Skew
(Note 11)
OSHL
OSLH
1.0
1.0
Note 10: All typical values are at V = 3.3V, T = 25°C.
CC
A
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
). Parameter guaranteed by design.
OSLH
OSHL
Capacitance (Note 12)
Symbol
Parameter
Input Capacitance
Output Capacitance
Conditions
= 0V, V = 0V or V
Typical
Units
pF
C
V
V
3
6
IN
CC
I
CC
C
= 3.0V, V = 0V or V
CC
pF
OUT
CC
O
Note 12: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.
5
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
7
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
Package Number MSA20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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8
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