74VCX08_08 [FAIRCHILD]

Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs; 低电压四2输入与门与3.6V容限输入和输出
74VCX08_08
型号: 74VCX08_08
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs
低电压四2输入与门与3.6V容限输入和输出

文件: 总12页 (文件大小:732K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
February 2008  
74VCX08  
Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant  
Inputs and Outputs  
Features  
General Description  
1.2V to 3.6V V supply operation  
The VCX08 contains four 2-input ꢀND gates. This prod-  
CC  
uct is designed for low voltage (1.2V to 3.6V) V appli-  
cations with I/O compatibility up to 3.6V.  
3.6V tolerant inputs and outputs  
CC  
t  
:
PD  
The VCX08 is fabricated with an advanced CMOS  
technology to achieve high-speed operation while main-  
taining low CMOS power dissipation.  
– 2.8ns max. for 3.0V to 3.6V V  
CC  
Power-off high impedance inputs and outputs  
Static Drive (I /I  
)
OH OL  
24mꢀ ꢁ 3.0V V  
CC  
Uses proprietary Quiet Series™ noise/EMI reduction  
circuitry  
Latchup performance exceeds 300mꢀ  
ESD performance:  
– Human body model > 2000V  
– Machine model > 250V  
Leadless DQFN package  
Ordering Information  
Package  
Order Number  
Number  
Package Description  
74VCX08M  
M14ꢀ  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"  
Narrow  
(1)  
74VCX08BQX  
MLP14ꢀ  
MTC14  
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),  
JEDEC MO-241, 2.5 x 3.0mm  
74VCX08MTC  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,  
4.4mm Wide  
Note:  
1. DQFN package available in Tape and Reel only.  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
ꢀll packages are lead free per JEDEC: J-STD-020B standard.  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
Connection Diagrams  
Logic Symbol  
Pin Assignments for SOIC and TSSOP  
IEEE/IEC  
Pad Assignments for DQFN  
(Top View)  
Pin Description  
Pin Names  
Description  
ꢀ , B  
Inputs  
Outputs  
n
n
O
n
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
Parameter  
Rating  
V
Supply Voltage  
–0.5V to +4.6V  
–0.5V to 4.6V  
CC  
V
DC Input Voltage  
DC Output Voltage  
HIGH or LOW State  
I
V
O
(2)  
–0.5V to V +0.5V  
CC  
V
= 0V  
–0.5V to +4.6V  
–50mꢀ  
CC  
I
DC Input Diode Current, V < 0V  
IK  
I
I
DC Output Diode Current  
OK  
V
< 0V  
–50mꢀ  
+50mꢀ  
O
V
> V  
CC  
O
I
/ I  
DC Output Source/Sink Current  
+50mꢀ  
OH OL  
I
or GND DC V or Gound Current per Supply Pin  
100mꢀ  
CC  
CC  
T
Storage Temperature Range  
–65°C to +150°C  
STG  
Note:  
2. I ꢀbsolute Maximum Rating must be observed.  
O
(3)  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to absolute maximum ratings.  
Symbol  
Parameter  
Rating  
V
Power Supply Operating  
Input Voltage  
1.2V to 3.6V  
–0.3V to 3.6V  
0V to V  
CC  
V
I
V
Output Voltage, HIGH or LOW State  
Output Current  
O
CC  
I
/ I  
OH OL  
V
V
V
V
V
= 3.0V to 3.6V  
= 2.3V to 2.7V  
= 1.65V to 2.3V  
= 1.4V to 1.6V  
= 1.2V  
24mꢀ  
18mꢀ  
CC  
CC  
CC  
CC  
CC  
6mꢀ  
2mꢀ  
100ꢂꢀ  
T
Free ꢀir Operating Temperature  
Minimum Input Edge Rate, V = 0.8V to 2.0V, V = 3.0V  
–40°C to +85°C  
10ns/V  
t / V  
IN  
CC  
Note:  
3. Floating or unused inputs must be held HIGH or LOW  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
3
DC Electrical Characteristics  
Symbol  
Parameter  
V
(V)  
Conditions  
Min  
2.0  
Max  
Units  
CC  
V
HIGH Level Input Voltage  
2.7–3.6  
2.3–2.7  
1.65–2.3  
1.4–1.6  
1.2  
V
IH  
1.6  
0.65 × V  
0.65 × V  
0.65 × V  
CC  
CC  
CC  
V
LOW Level Input Voltage  
HIGH Level Output Voltage  
2.7–3.6  
2.3–2.7  
1.65–2.3  
1.4–1.6  
1.2  
0.8  
0.7  
V
V
IL  
0.35 × V  
0.35 × V  
0.05 x V  
CC  
CC  
CC  
V
2.7–3.6  
2.7  
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
= –100ꢂꢀ  
= –12mꢀ  
= –18mꢀ  
= –24mꢀ  
= –100ꢂꢀ  
= –6mꢀ  
= –12mꢀ  
= –18mꢀ  
= –100ꢂꢀ  
= –6mꢀ  
= –100ꢂꢀ  
= –2mꢀ  
= –100ꢂꢀ  
= 100ꢂꢀ  
= 12mꢀ  
= 18mꢀ  
= 24mꢀ  
= 100ꢂꢀ  
= 12mꢀ  
= 18mꢀ  
= 100ꢂꢀ  
= 6mꢀ  
V
– 0.2  
CC  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OH  
OL  
OL  
OL  
OL  
OL  
OL  
OL  
OL  
OL  
OL  
OL  
OL  
2.2  
3.0  
2.4  
2.2  
3.0  
2.3–2.7  
2.3  
V
– 0.2  
CC  
2.0  
1.8  
1.7  
2.3  
2.3  
1.65–2.3  
1.65  
V
V
V
– 0.2  
CC  
1.25  
– 0.2  
1.4–1.6  
1.4  
CC  
1.05  
– 0.2  
1.2  
CC  
V
LOW Level Output Voltage  
2.7–3.6  
2.7  
0.2  
0.4  
0.4  
0.55  
0.2  
0.4  
0.6  
0.2  
0.2  
0.2  
0.35  
0.05  
5.0  
10  
V
OL  
3.0  
3.0  
2.3–2.7  
2.3  
2.3  
1.65–2.3  
1.65  
1.4–1.6  
1.4  
= 100ꢂꢀ  
= 2mꢀ  
1.2  
= 100ꢂꢀ  
I
Input Leakage Current  
1.2–3.6  
0
0 V 3.6V  
ꢂꢀ  
ꢂꢀ  
ꢂꢀ  
I
I
I
Power-OFF Leakage Current  
Quiescent Supply Current  
0 (V , V ) 3.6V  
I O  
OFF  
I
1.2–3.6  
V = V or GND  
20  
CC  
I
CC  
V
V
V 3.6V  
20  
CC  
I
I  
Increase in I per Input  
2.7–3.6  
= V –0.6V  
750  
ꢂꢀ  
CC  
CC  
IH  
CC  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
4
(4)  
AC Electrical Characteristics  
T = –40°C to  
A
+85°C  
Figure  
Symbol  
Parameter  
V
(V)  
Conditions  
Min.  
0.6  
0.8  
1.0  
1.0  
1.5  
Max.  
2.8  
Units Number  
CC  
t
, t  
Propagation Delay  
3.3 0.3 C = 30pF, R = 500Ω  
ns  
Fig. 1  
Fig. 2  
PHL PLH  
L
L
2.5 0.2  
3.7  
1.8 0.15  
7.4  
1.5 0.1 C = 15pF, R = 2kΩ  
14.8  
37.0  
0.5  
Fig. 3  
Fig. 4  
L
L
1.2  
3.3 0.3 C = 30pF, R = 500Ω  
t
, t  
Output to Output  
ns  
OSHL OSLH  
L
L
(5)  
Skew  
2.5 0.2  
0.5  
1.8 0.15  
0.75  
1.5  
1.5 0.1 C = 15pF, R = 2kΩ  
L
L
1.2  
1.5  
Note:  
4. For C = 50pF, add approximately 300ps to the ꢀC Maximum specification.  
L
5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate  
outputs of the same device. The specification applies to any outputs switching in the same direction, either  
HIGH-to-LOW (t  
) or LOW-to-HIGH (t  
).  
OSHL  
OSLH  
Dynamic Switching Characteristics  
T = 25°C  
A
Symbol  
Parameter  
V
(V)  
Conditions  
Typical  
0.25  
0.6  
Unit  
CC  
V
Quiet Output Dynamic Peak V  
1.8  
C = 30pF, V = V  
,
V
OLP  
OL  
L
IH  
CC  
V
= 0V  
IL  
2.5  
3.3  
1.8  
2.5  
3.3  
1.8  
2.5  
3.3  
0.8  
V
Quiet Output Dynamic Valley V  
C = 30pF, V = V  
,
–0.25  
–0.6  
–0.8  
1.5  
V
V
OLV  
OL  
L
IH  
CC  
V
= 0V  
IL  
V
Quiet Output Dynamic Valley V  
C = 30pF, V = V  
,
OHV  
OH  
L
IH  
CC  
V
= 0V  
IL  
1.9  
2.2  
Capacitance  
T = +25°C  
A
Symbol  
Parameter  
Conditions  
Typical  
6.0  
Units  
pF  
C
Input Capacitance  
Output Capacitance  
V = 0V or V , V = 1.8V, 2.5V or 3.3V  
I CC CC  
IN  
C
V = 0V or V , V = 1.8V, 2.5V or 3.3V  
7.0  
pF  
OUT  
I
CC CC  
C
Power Dissipation  
Capacitance  
V = 0V or V , f = 10MHz, V = 1.8V, 2.5V or 3.3V  
20.0  
pF  
PD  
I
CC  
CC  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
5
AC Loading and Waveforms (V 3.3V 0.3V to 1.8V 0.15V)  
CC  
Test  
Switch  
t
, t  
Open  
PLH PHL  
Figure 1. AC Test Circuit  
V
CC  
Symbol  
3.3V 0.3V  
1.5V  
2.5V 0.2V  
1.8V 0.15V  
V
V
V
/ 2  
/ 2  
V
V
/ 2  
/ 2  
mi  
CC  
CC  
CC  
CC  
V
1.5V  
mo  
Figure 2. Waveform for Inverting and Non-inverting Functions  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
6
AC Loading and Waveforms (V 1.5 0.1V to 1.2V)  
CC  
Test  
Switch  
t
, t  
Open  
PLH PHL  
t
, t  
V
x 2 at V = 1.5V 0.1V  
PZL PLZ  
CC  
CC  
t
, t  
GND  
PZH PHZ  
Figure 3. AC Test Circuit  
V
CC  
Symbol  
1.5V 0.1V  
V
V
V
/ 2  
/ 2  
mi  
CC  
CC  
V
mo  
Figure 4. Waveform for Inverting and Non-Inverting Functions  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
7
Tape and Reel Specification  
Tape Format for DQFN  
Package Designator  
Tape Section  
Number of Cavities  
125 (Typ.)  
Cavity Status  
Empty  
Cover Tape Status  
Sealed  
BQX  
Leader (Start End)  
Carrier  
3000  
Filled  
Sealed  
Trailer (Hub End)  
75 (Typ.)  
Empty  
Sealed  
Tape Dimensions inches (millimeters)  
Reel Dimensions inches (millimeters)  
Tape Size  
A
B
C
D
N
W1  
W2  
12mm  
13.0 (330.0)  
0.059 (1.50)  
0.512 (13.00) 0.795 (20.20) 2.165 (55.00)  
0.488 (12.4)  
0.724 (18.4)  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
8
Physical Dimensions  
8.75  
8.50  
0.65  
A
7.62  
14  
8
B
5.60  
4.00  
3.80  
6.00  
1.70  
1.27  
1
7
PIN ONE  
INDICATOR  
0.51  
0.35  
1.27  
(0.33)  
LAND PATTERN RECOMMENDATION  
M
0.25  
C B A  
1.75 MAX  
SEE DETAIL A  
1.50  
1.25  
0.25  
0.19  
0.25  
0.10  
C
0.10  
C
NOTES: UNLESS OTHERWISE SPECIFIED  
A) THIS PACKAGE CONFORMS TO JEDEC  
MS-012, VARIATION AB, ISSUE C,  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS DO NOT INCLUDE MOLD  
FLASH OR BURRS.  
0.50  
0.25  
X 45°  
R0.10  
R0.10  
GAGE PLANE  
D) LANDPATTERN STANDARD:  
SOIC127P600X145-14M  
E) DRAWING CONFORMS TO ASME Y14.5M-1994  
F) DRAWING FILE NAME: M14AREV13  
0.36  
8°  
0°  
0.90  
0.50  
SEATING PLANE  
(1.04)  
DETAIL A  
SCALE: 20:1  
Figure 5. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
9
Physical Dimensions (Continued)  
Figure 6. 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
10  
Physical Dimensions (Continued)  
0.43 TYP  
0.65  
1.65  
6.10  
0.45  
12.00°  
TOP & BOTTOM  
R0.09 min  
A. CONFORMS TO JEDEC REGISTRATION MO-153,  
VARIATION AB, REF NOTE 6  
B. DIMENSIONS ARE IN MILLIMETERS  
R0.09min  
1.00  
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,  
AND TIE BAR EXTRUSIONS  
D. DIMENSIONING AND TOLERANCES PER ANSI  
Y14.5M, 1982  
E. LANDPATTERN STANDARD: SOP65P640X110-14M  
F. DRAWING FILE NAME: MTC14REV6  
Figure 7. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
11  
TRADEMARKS  
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global  
subsidiaries, and is not intended to be an exhaustive list of all such trademarks.  
ACEx®  
PDP-SPM™  
SupreMOS™  
FPS™  
Power220®  
SyncFET™  
Build it Now™  
CorePLUS™  
CROSSVOLT™  
CTL™  
Current Transfer Logic™  
EcoSPARK®  
EZSWITCH™ *  
FRFET®  
POWEREDGE®  
Power-SPM™  
PowerTrench®  
Programmable Active Droop™  
QFET®  
®
Global Power ResourceSM  
Green FPS™  
Green FPS™e-Series™  
GTO™  
i-Lo™  
IntelliMAX™  
ISOPLANAR™  
MegaBuck™  
MICROCOUPLER™  
MicroFET™  
The Power Franchise®  
TinyBoost™  
TinyBuck™  
TinyLogic®  
TINYOPTO™  
TinyPower™  
TinyPWM™  
TinyWire™  
µSerDes™  
UHC®  
QS™  
QT Optoelectronics™  
Quiet Series™  
RapidConfigure™  
SMART START™  
SPM®  
STEALTH™  
SuperFET™  
SuperSOT-3  
SuperSOT-6  
SuperSOT-8  
®
Fairchild®  
Fairchild Semiconductor®  
FACT Quiet Series™  
FACT®  
MicroPak™  
MillerDrive™  
Motion-SPM™  
OPTOLOGIC®  
FAST®  
Ultra FRFET™  
UniFET™  
VCX™  
OPTOPLANAR®  
FastvCore™  
®
FlashWriter® *  
* EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor.  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS  
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE  
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS  
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S  
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR  
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,  
which, (a) are intended for surgical implant into the body or  
(b) support or sustain life, and (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in a significant injury of the user.  
device, or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
This datasheet contains the design specifications for product  
development. Specifications may change in any manner without notice.  
Advance Information  
Formative or In Design  
This datasheet contains preliminary data; supplementary data will be  
published at a later date. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve design.  
Preliminary  
First Production  
Full Production  
Not In Production  
This datasheet contains final specifications. Fairchild Semiconductor  
reserves the right to make changes at any time without notice to improve  
the design.  
No Identification Needed  
Obsolete  
This datasheet contains specifications on a product that has been  
discontinued by Fairchild Semiconductor. The datasheet is printed for  
reference information only.  
Rev. I33  
©1999 Fairchild Semiconductor Corporation  
74VCX08 Rev. 1.9.0  
www.fairchildsemi.com  
12  

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SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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VISHAY