CD4020 [FAIRCHILD]

14-Stage Ripple Carry Binary Counters . 12-Stage Ripple Carry Binary Counters . 14-Stage Ripple Carry Binary Counters; 14级纹波进位二进制计数器。 12级纹波进位二进制计数器。 14级纹波进位二进制计数器
CD4020
型号: CD4020
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

14-Stage Ripple Carry Binary Counters . 12-Stage Ripple Carry Binary Counters . 14-Stage Ripple Carry Binary Counters
14级纹波进位二进制计数器。 12级纹波进位二进制计数器。 14级纹波进位二进制计数器

计数器
文件: 总8页 (文件大小:84K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
October 1987  
Revised January 1999  
CD4020BC • CD4040BC • CD4060BC  
14-Stage Ripple Carry Binary Counters •  
12-Stage Ripple Carry Binary Counters •  
14-Stage Ripple Carry Binary Counters  
General Description  
Features  
Wide supply voltage range: 1.0V to 15V  
The CD4020BC, CD4060BC are 14-stage ripple carry  
binary counters, and the CD4040BC is a 12-stage ripple  
carry binary counter. The counters are advanced one count  
on the negative transition of each clock pulse. The  
counters are reset to the zero state by a logical “1” at the  
reset input independent of clock.  
High noise immunity: 0.45 VDD (typ.)  
Low power TTL compatibility: Fan out of 2 driving 74L  
or 1 driving 74LS  
Medium speed operation: 8 MHz typ. at VDD = 10V  
Schmitt trigger clock input  
Ordering Code:  
Order Number  
CD4020BCM  
CD4020BCN  
CD4040BCM  
CD4040BCSJ  
CD4040BCN  
CD4060BCM  
CD4060BCN  
Package Number  
M16A  
Package Description  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
N16E  
M16A  
M16D  
N16E  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
M16A  
N16E  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
Pin Assignments for DIP and SOIC  
CD4020BC  
Pin Assignments for DIP, SOIC and SOP  
CD4040BC  
Top View  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005953.prf  
www.fairchildsemi.com  
Connection Diagrams (Continued)  
Pin Assignments for DIP and SOIC  
CD4060BC  
Top View  
Schematic Diagrams  
CD4020BC  
CD4040BC  
www.fairchildsemi.com  
2
CD4060BC  
CD4060B Typical Oscillator Connections  
RC Oscillator  
Crystal Oscillator  
3
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
(Note 2)  
Recommended Operating  
Conditions  
Supply Voltage (VDD  
)
0.5V to +18V  
0.5V to VDD +0.5V  
65°C to +150°C  
Supply Voltage (VDD  
Input Voltage (VIN  
Operating Temperature Range (TA)  
)
+3V to +15V  
0V to VDD  
Input Voltage (VIN  
)
)
Storage Temperature Range (TS)  
Package Dissipation (PD)  
Dual-In-Line  
40°C to +85°C  
Note 1: “Absolute Maximum Ratings” are those values beyond which the  
safety of the device cannot be guaranteed. They are not meant to imply  
that the devices should be operated at these limits. The tables of “Recom-  
mended Operating Conditions” and “Electrical Characteristics” provide con-  
ditions for actual device operation.  
700 mW  
500 mW  
Small Outline  
Lead Temperature (TL)  
(Soldering, 10 seconds)  
Note 2: V = 0V unless otherwise specified.  
SS  
260°C  
DC Electrical Characteristics (Note 2)  
40°C  
+25°C  
+85°C  
Symbol  
Parameter  
Conditions  
= 5V, V = V or V  
SS  
Units  
Min  
Max  
Min  
Typ  
Max  
20  
Min  
Max  
I
Quiescent Device Current  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
20  
40  
150  
300  
600  
0.05  
0.05  
0.05  
µA  
µA  
µA  
V
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
IN  
DD  
= 10V, V = V or V  
40  
IN  
DD  
SS  
SS  
= 15V, V = V or V  
80  
80  
IN  
DD  
V
LOW Level Output Voltage  
HIGH Level Output Voltage  
LOW Level Input Voltage  
HIGH Level Input Voltage  
= 5V  
0.05  
0.05  
0.05  
0
0
0.05  
0.05  
0.05  
OL  
OH  
IL  
= 10V  
= 15V  
= 5V  
V
0
V
V
V
V
4.95  
9.95  
4.95  
9.95  
5
4.95  
9.95  
V
= 10V  
= 15V  
10  
15  
2
V
14.95  
14.95  
14.95  
V
= 5V, V = 0.5V or 4.5V  
1.5  
3.0  
4.0  
1.5  
3.0  
4.0  
1.5  
3.0  
4.0  
V
O
= 10V, V = 1.0V or 9.0V  
4
V
O
= 15V, V = 1.5V or 13.5V  
6
V
O
= 5V, V = 0.5V or 4.5V  
3.5  
7.0  
3.5  
7.0  
3
3.5  
7.0  
V
IH  
O
= 10V, V = 1.0V or 9.0V  
6
V
O
= 15V, V = 1.5V or 13.5V  
11.0  
0.52  
1.3  
11.0  
0.44  
1.1  
9
11.0  
0.36  
0.9  
V
O
I
LOW Level Output Current  
(Note 3)  
= 5V, V = 0.4V  
0.88  
2.25  
8.8  
mA  
mA  
mA  
mA  
mA  
mA  
µA  
µA  
OL  
O
= 10V, V = 0.5V  
O
= 15V, V = 1.5V  
3.6  
3.0  
2.4  
O
I
HIGH Level Output Current  
(Note 3)  
= 5V, V = 4.6V  
0.52  
1.3  
3.6  
0.44 0.88  
0.36  
0.9  
2.4  
OH  
O
= 10V, V = 9.5V  
1.1  
3.0  
2.25  
8.8  
O
= 15V, V = 13.5V  
O
5  
I
Input Current  
= 15V, V = 0V  
0.30  
10  
0.30  
1.0  
IN  
IN  
5  
= 15V, V = 15V  
0.30  
10  
0.30  
1.0  
IN  
Note 3: Data does not apply to oscillator points φ and φ of CD4060BC. I  
and I are tested one output at a time.  
0
0
OH  
OL  
www.fairchildsemi.com  
4
AC Electrical Characteristics (Note 4)  
CD4020BC, CD4040BC TA = 25°C, CL = 50 pF, RL = 200k, t = t = 20 ns, unless otherwise noted  
r
f
Symbol  
, t  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
t
t
t
t
t
f
t
t
Propagation Delay Time to Q  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 5V  
250  
100  
75  
550  
210  
ns  
ns  
PHL1 PLH1  
1
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
= 10V  
= 15V  
= 5V  
150  
ns  
, t  
Interstage Propagation Delay Time  
from Q to Q  
150  
60  
330  
ns  
PHL PLH  
= 10V  
= 15V  
= 5V  
125  
ns  
n
n+1  
45  
90  
ns  
, t  
Transition Time  
100  
50  
200  
ns  
THL TLH  
= 10V  
= 15V  
= 5V  
100  
ns  
40  
80  
ns  
, t  
Minimum Clock Pulse Width  
Maximum Clock Rise and Fall Time  
Maximum Clock Frequency  
Reset Propagation Delay  
Minimum Reset Pulse Width  
125  
50  
335  
ns  
WL WH  
= 10V  
= 15V  
= 5V  
125  
ns  
40  
100  
ns  
, t  
No Limit  
No Limit  
No Limit  
ns  
rCL fCL  
= 10V  
= 15V  
= 5V  
ns  
ns  
1.5  
4
4
MHz  
MHz  
MHz  
ns  
CL  
= 10V  
= 15V  
= 5V  
10  
5
12  
200  
100  
80  
450  
210  
170  
450  
210  
170  
7.5  
PHL(R)  
WH(R)  
= 10V  
= 15V  
= 5V  
ns  
ns  
200  
100  
80  
ns  
= 10V  
= 15V  
ns  
ns  
C
C
Average Input Capacitance  
Any Input  
5
pF  
pF  
IN  
Power Dissipation Capacitance  
50  
PD  
Note 4: AC Parameters are guaranteed by DC correlated testing.  
5
www.fairchildsemi.com  
AC Electrical Characteristics (Note 5)  
CD4060BC TA = 25°C, CL = 50 pF, RL = 200k, t = t = 20 ns, unless otherwise noted  
r
f
Symbol  
, t  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
t
t
t
t
t
f
t
t
Propagation Delay Time to Q  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 5V  
550  
250  
200  
150  
60  
1300  
525  
ns  
ns  
PHL4 PLH4  
4
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
DD  
= 10V  
= 15V  
= 5V  
400  
ns  
, t  
Interstage Propagation Delay Time  
from Q to Q  
330  
ns  
PHL PLH  
= 10V  
= 15V  
= 5V  
125  
ns  
n
n+1  
45  
90  
ns  
, t  
Transition Time  
100  
50  
200  
ns  
THL TLH  
= 10V  
= 15V  
= 5V  
100  
ns  
40  
80  
ns  
, t  
Minimum Clock Pulse Width  
Maximum Clock Rise and Fall Time  
Maximum Clock Frequency  
Reset Propagation Delay  
Minimum Reset Pulse Width  
170  
65  
500  
ns  
WL WH  
= 10V  
= 15V  
= 5V  
170  
ns  
50  
125  
ns  
, t  
No Limit  
No Limit  
No Limit  
ns  
rCL fCL  
= 10V  
= 15V  
= 5V  
ns  
ns  
1
3
4
3
8
MHz  
MHz  
MHz  
ns  
CL  
= 10V  
= 15V  
= 5V  
10  
200  
100  
80  
200  
100  
80  
5
450  
210  
170  
450  
210  
170  
7.5  
PHL(R)  
WH(R)  
= 10V  
= 15V  
= 5V  
ns  
ns  
ns  
= 10V  
= 15V  
ns  
ns  
C
C
Average Input Capacitance  
Any Input  
pF  
pF  
IN  
Power Dissipation Capacitance  
50  
PD  
Note 5: AC Parameters are guaranteed by DC correlated testing.  
www.fairchildsemi.com  
6
Physical Dimensions inches (millimeters) unless otherwise noted  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
Package Number M16A  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
Package Number M16D  
7
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Package Number N16E  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.  

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