DM74164 [FAIRCHILD]
8-Bit Serial In/Parallel Out Shift Registers; 8位串行输入/并行输出移位寄存器
| 型号： | DM74164 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 8-Bit Serial In/Parallel Out Shift Registers |
| 文件： | 总4页 (文件大小：52K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 1986
Revised February 2000
DM74164
8-Bit Serial In/Parallel Out Shift Registers
General Description
Features
■ Gated (enable/disable) serial inputs
■ Fully buffered clock and serial inputs
■ Asynchronous clear
These 8-bit shift registers feature gated serial inputs and
an asynchronous clear. A LOW logic level at either serial
input inhibits entry of the new data, and resets the first flip-
flop to the LOW level at the next clock pulse, thus providing
complete control over incoming data. A HIGH logic level on
either input enables the other input, which will then deter-
mine the state of the first flip-flop. Data at the serial inputs
may be changed while the clock is HIGH or LOW, but only
information meeting the setup and hold time requirements
will be entered. Clocking occurs on the LOW-to-HIGH level
transition of the clock input. All inputs are diode-clamped to
minimize transmission-line effects.
■ Typical clock frequency 36 MHz
■ Typical power dissipation 185 mW
Ordering Code:
Order Number Package Number
Package Description
DM74164
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Function Table
Inputs
Outputs
QA
QB
QH
Clear
Clock
A
X
X
H
L
B
X
X
H
X
L
…
…
…
…
…
…
L
X
L
↑
↑
↑
L
QA0
H
L
L
H
H
H
H
QB0
QAn
QAn
QAn
QH0
QGn
QGn
QGn
L
X
L
H = HIGH Level (steady state)
L = LOW Level (steady state)
X = Don’t Care (any input, including transitions)
↑ = Transition from LOW-to-HIGH level
Q
,
Q
, Q
= The level of Q , Q , or Q , respectively, before the
H0 A B H
A0
B0
indicated steady-state input conditions were established.
, Q = The level of Q or Q before the most recent ↑ transition of the
Q
An
Gn
A
G
clock; indicates a one-bit shift.
© 2000 Fairchild Semiconductor Corporation
DS006552
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Logic Diagram
Timing Diagram
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2
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Supply Voltage
Input Voltage
7V
5.5V
Operating Free Air Temperature Range
Storage Temperature Range
0°C to +70°C
−65°C to +150°C
Recommended Operating Conditions
Symbol
VCC
Parameter
Supply Voltage
Min
4.75
2
Nom
Max
Units
V
5
5.25
VIH
VIL
IOH
IOL
fCLK
tW
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 2)
Pulse Width
V
0.8
−0.4
8
V
mA
mA
MHz
0
20
20
15
5
25
Clock
Clear
ns
(Note 2)
tSU
tH
Data Setup Time (Note 2)
Data Hold Time (Note 2)
ns
ns
°C
TA
Free Air Operating Temperature
0
70
Note 2: T = 25°C and V = 5V.
A
CC
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions
Input Clamp Voltage = Min, I = −14 mA
Typ
Min
Max
Units
(Note 3)
V
V
V
V
V
V
V
V
V
V
V
V
−1.5
V
V
I
CC
CC
I
HIGH Level
= Min, I = Max
OH
OH
2.4
3.2
0.2
Output Voltage
= Max, V = Min
IH
IL
V
LOW Level
= Min, I = Max
CC OL
OL
0.4
V
Output Voltage
= Min, V = Max
IL
IH
I
I
I
I
I
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit Output Current
Supply Current
= Max, V = 5.5V
1
40
mA
µA
I
CC
CC
CC
CC
CC
I
= Max, V = 2.4V
IH
I
= Max, V = 0.4V
−1.6
−27.5
54
mA
mA
mA
IL
I
= Max (Note 4)
= Max (Note 5)
−9
OS
CC
37
Note 3: All typicals are at V = 5V, T = 25°C.
CC
A
Note 4: Not more than one output should be shorted at a time.
Note 5: I is measured with all outputs OPEN, SERIAL inputs grounded, the CLOCK input at 2.4V, and a momentary ground, then 4.5V, applied to the
CC
CLEAR input.
Switching Characteristics
at VCC = 5V and T = 25°C
A
R
= 800Ω
L
C
= 15 pF
C = 50 pF
L
Symbol
Parameter
From (Input)
To (Output)
Units
L
Min
25
Max
Min
Max
f
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
MHz
ns
MAX
t
t
t
PLH
PHL
PHL
Clock to Output
Clock to Output
Clear to Output
27
32
36
30
37
42
ns
ns
3
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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4
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