FAN53601 [FAIRCHILD]
6 MHz 600 mA / 1 A Synchronous Buck Regulator; 6兆赫600毫安/ 1 A同步降压稳压器
| 型号： | FAN53601 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 6 MHz 600 mA / 1 A Synchronous Buck Regulator |
| 文件： | 总14页 (文件大小：996K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 2012
FAN53601 / FAN53611
6 MHz 600 mA / 1 A Synchronous Buck Regulator
Features
Description
The FAN53601/11 is a 6 MHz, step-down switching voltage
regulator, available in 600 mA or 1 A options, that delivers a
fixed output from an input voltage supply of 2.3 V to 5.5 V.
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600 mA or 1 A Output Current Capability
24 µA Typical Quiescent Current
6 MHz Fixed-Frequency Operation
Best-in-Class Load Transient Response
Best-in-Class Efficiency
Using
a
proprietary architecture with synchronous
rectification, the FAN53601/11 is capable of delivering a
peak efficiency of 92%, while maintaining efficiency over
80% at load currents as low as 1 mA.
The regulator operates at a nominal fixed frequency of
6 MHz, which reduces the value of the external components
to as low as 470 nH for the output inductor and 4.7 µF for the
output capacitor. In addition, the Pulse Width Modulation
(PWM) modulator can be synchronized to an external
frequency source.
2.3 V to 5.5 V Input Voltage Range
0.8 V to 2 V Fixed Output Voltage
Low Ripple Light-Load PFM Mode
Forced PWM and External Clock Synchronization
Internal Soft-Start
At moderate and light loads, Pulse Frequency Modulation
(PFM) is used to operate the device in Power-Save Mode
with a typical quiescent current of 24 µA. Even with such a
low quiescent current, the part exhibits excellent transient
response during large load swings. At higher loads, the
system automatically switches to fixed-frequency control,
operating at 6 MHz. In Shutdown Mode, the supply current
drops below 1 µA, reducing power consumption. For
applications that require minimum ripple or fixed frequency,
PFM Mode can be disabled using the MODE pin.
Input Under-Voltage Lockout (UVLO)
Thermal Shutdown and Overload Protection
Optional Output Discharge
6-Bump WLCSP, 0.4 mm Pitch
Applications
.
.
.
.
.
6-Bump WLCSP, 0.4mm Pitch
3G, 4G, WiFi®, WiMAX™, and WiBro® Data Cards
Tablets
The FAN53601/11 is available in 6-bump, 0.4 mm pitch,
Wafer-Level Chip-Scale Package (WLCSP).
MODE
SW
VIN
EN
DSC, DVC
Netbooks®, Ultra-Mobile PCs
A1
B1
C1
A2
B2
C2
L1
CIN
2.2 F
470nH
FB
GND
COUT
F
All trademarks are the property of their respective owners.
Figure 1. Typical Application
Ordering Information
Output
Max. Output
Active
Temperature
Range
Part Number
Package
Packing
Voltage(1)
Current
Discharge(2)
FAN53611AUC11X
FAN53611UC123X
FAN53601UC182X
Notes:
1.100 V
1.233 V
1.820 V
1 A
Yes
No
WLCSP-6,
0.4 mm Pitch
Tape and
Reel
1 A
–40 to +85°C
600 mA
No
1. Other voltage options available on request. Contact a Fairchild representative.
2. All voltage and output current options are available with or without active discharge. Contact a Fairchild representative.
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
Pin Configurations
Figure 2. Bumps Facing Down
Figure 3. Bumps Facing Up
Pin Definitions
Pin #
Name
Description
MODE. Logic 1 on this pin forces the IC to stay in PWM Mode. A logic 0 allows the IC to
automatically switch to PFM during light loads. The regulator also synchronizes its switching
frequency to four times the frequency provided on this pin. Do not leave this pin floating.
A1
MODE
B1
C1
C2
SW
FB
Switching Node. Connect to output inductor.
Feedback / VOUT. Connect to output voltage.
GND
Ground. Power and IC ground. All signals are referenced to this pin.
Enable. The device is in Shutdown Mode when voltage to this pin is < 0.4 V and enabled when
> 1.2 V. Do not leave this pin floating.
B2
A2
EN
VIN
Input Voltage. Connect to input power source.
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above
the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended
exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings
are stress ratings only.
Symbol
VIN
Parameter
Min.
–0.3
–0.3
–0.3
–0.3
Max.
7.0
VIN + 0.3(3)
VIN + 0.3(3)
VIN + 0.3(3)
Units
Input Voltage
V
V
V
V
VSW
Voltage on SW Pin
EN and MODE Pin Voltage
Other Pins
VCTRL
Human Body Model per JESD22-A114
Charged Device Model per JESD22-C101
3.5
1.5
Electrostatic Discharge
Protection Level
ESD
kV
TJ
TSTG
TL
Junction Temperature
Storage Temperature
–40
–65
+150
+150
+260
°C
°C
°C
Lead Soldering Temperature, 10 Seconds
Note:
3. Lesser of 7 V or VIN+0.3 V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding
them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
2.3
0
Typ.
Max.
5.5
600
1
Units
V
VCC
Supply Voltage Range
Output Current for FAN53601
Output Current for FAN53611
Inductor
mA
A
IOUT
0
L
CIN
COUT
TA
470
2.2
4.7
nH
µF
μF
Input Capacitor
Output Capacitor
1.6
–40
–40
12.0
+85
Operating Ambient Temperature
Operating Junction Temperature
°C
TJ
+125
°C
Thermal Properties
Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer 1s2p
boards in accordance to JEDEC standard JESD51. Special attention must be paid to not exceed junction temperature TJ(max) at a
given ambient temperate TA.
Symbol
Parameter
Typical
Unit
Junction-to-Ambient Thermal Resistance
150
°C/W
JA
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
3
Electrical Characteristics
Minimum and maximum values are at VIN = VEN = 2.3 V to 5.5 V, VMODE = 0 V (AUTO Mode), TA = -40°C to +85°C; circuit of
Figure 1, unless otherwise noted. Typical values are at TA = 25°C, VIN = VEN = 3.6 V.
Symbol Parameter
Power Supplies
Conditions
Min.
Typ.
Max.
Units
No Load, Not Switching
PWM Mode
24
8
50
µA
mA
µA
V
IQ
Quiescent Current
I(SD)
Shutdown Supply Current
EN = GND
0.25
2.15
200
1.00
2.27
VUVLO Under-Voltage Lockout Threshold Rising VIN
VUVHYST Under-Voltage Lockout Hysteresis
Logic Inputs: EN and MODE Pins
mV
VIH
VIL
Enable HIGH-Level Input Voltage
Enable LOW-Level Input Voltage
1.2
V
V
0.4
VLHYST Logic Input Hysteresis Voltage
IIN Enable Input Leakage Current
Switching and Synchronization
100
mV
µA
Pin to VIN or GND
0.01
1.00
fSW
Switching Frequency(4)
VIN = 3.6 V, TA = 25°C
5.4
1.3
6.0
1.5
6.6
1.7
MHz
MHz
fSYNC
MODE Synchronization Range(4)
Square Wave at MODE Input
Regulation
ILOAD = 0 to 1 A
PWM Mode
1.207
1.207
1.784
1.784
1.075
1.075
1.233
1.233
1.820
1.820
1.100
1.100
180
1.272
1.259
1.875
1.856
1.136
1.125
300
1.233 V
1.820 V
1.100 V
ILOAD = 0 to 1 A
PWM Mode
Output Voltage
Accuracy
VO
V
ILOAD = 0 to 1 A
PWM Mode
tSS
Soft-Start
From EN Rising Edge
µs
Output Driver
PMOS On Resistance
NMOS On Resistance
VIN = VGS = 3.6 V
175
165
1100
1750
230
150
15
m
m
mA
mA
RDS(on)
VIN = VGS = 3.6 V
Open-Loop for FAN53601
Open-Loop for FAN53611
EN = GND
900
1250
2000
ILIM(OL) PMOS Peak Current Limit
1500
RDIS
Output Discharge Resistance
Thermal Shutdown
TTSD
THYS
°C
Thermal Shutdown Hysteresis
°C
Notes:
4. Limited by the effect of tOFF minimum (see Operation Description section).
5. The Electrical Characteristics table reflects open-loop data. Refer to the Operation Description and Typical Characteristics
Sections for closed-loop data.
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
4
Typical Performance Characteristics
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), VOUT = 1.82 V, and TA = 25°C.
95%
90%
85%
80%
75%
70%
92%
90%
88%
86%
84%
82%
80%
78%
76%
74%
72%
70%
68%
66%
64%
62%
60%
- 40C, AUTO
+25C, AUTO
+85C, AUTO
- 40C, PWM
+25C, PWM
+85C, PWM
2.7 VIN
3.6 VIN
4.2 VIN
5.0 VIN
0
200
400
600
800
1000
0
200
400
600
800
1000
Load Current (mA)
Load Current (mA)
Figure 4. Efficiency vs. Load Current and
Figure 5. Efficiency vs. Load Current
Input Voltage, Auto Mode, Dotted for Decreasing Load
and Temperature, Auto Mode, Dotted for FPWM
90%
88%
86%
84%
82%
80%
78%
76%
74%
72%
70%
90%
88%
86%
84%
82%
80%
78%
76%
74%
72%
70%
- 40C, AUTO
+25C, AUTO
+85C, AUTO
- 40C, PWM
+25C, PWM
+85C, PWM
68%
66%
64%
62%
60%
2.7 VIN
3.6 VIN
4.2 VIN
5.0 VIN
68%
66%
64%
0
200
400
600
800
1000
0
200
400
600
800
1000
Load Current (mA)
Load Current (mA)
Figure 6. Efficiency vs. Load Current and
Figure 7. Efficiency vs. Load Current
Input Voltage, VOUT = 1.23 V, Auto Mode, Dotted
for Decreasing Load
and Temperature, VOUT=1.23 V, Auto Mode,
Dotted for FPWM
3
3
2.7VIN, AUTO
3.6VIN, AUTO
4.2VIN, AUTO
5.0VIN, AUTO
2.7VIN, PWM
3.6VIN, PWM
4.2VIN, PWM
5.0VIN, PWM
2.7VIN, AUTO
3.6VIN, AUTO
4.2VIN, AUTO
5.0VIN, AUTO
2.7VIN, PWM
3.6VIN, PWM
4.2VIN, PWM
5.0VIN, PWM
2
1
2
1
0
0
-1
-2
-1
-2
0
200
400
600
800
1000
0
200
400
600
800
1000
Load Current (mA)
Load Current (mA)
Figure 8. ∆VOUT (%) vs. Load Current and Input Voltage,
Normalized to 3.6 VIN, 500 mA Load, FPWM, Dotted for
Auto Mode
Figure 9. ∆VOUT (%) vs. Load Current and Input Voltage,
VOUT=1.23 V, Normalized to 3.6 VIN, 500 mA Load, FPWM,
Dotted for Auto Mode
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
5
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), VOUT = 1.82 V, and TA = 25°C.
350
300
250
200
150
100
50
350
300
250
200
150
100
50
PWM
PFM
PWM
PFM
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Input Voltage (V)
Figure 10. PFM / PWM Boundary vs. Input Voltage
Figure 11. PFM / PWM Boundary vs. Input Voltage,
VOUT=1.23 V
35
15
- 40C, EN=VIN
- 40C
+25C, EN=VIN
+85C, EN=VIN
- 40C, EN=1.8V
+25C
+85C
12
30
+25C, EN=1.8V
+85C, EN=1.8V
9
6
3
0
25
20
15
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Input Voltage (V)
Figure 12. Quiescent Current vs. Input Voltage and
Temperature, Auto Mode; EN=VIN Solid, Dotted for
EN=1.8 V (-40oC, +25oC, +85oC)
Figure 13. Quiescent Current vs. Input Voltage and
Temperature, Mode=EN=VIN (FPWM)
25
7,500
6,000
4,500
2.7VIN, AUTO
3.6VIN, AUTO
5.0VIN, AUTO
20
2.7VIN, PWM
3.6VIN, PWM
5.0VIN, PWM
15
10
5
3,000
2.7VIN, AUTO
3.6VIN, AUTO
5.0VIN, AUTO
1,500
2.7VIN, PWM
3.6VIN, PWM
5.0VIN, PWM
0
0
0
200
400
600
800
1000
0
200
400
600
800 1000
Load Current (mA)
Load Current (mA)
Figure 14. Output Ripple vs. Load Current and
Input Voltage, FPWM, Dotted for Auto Mode
Figure 15. Frequency vs. Load Current and
Input Voltage, Auto Mode, Dotted for FPWM
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
6
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), VOUT = 1.82 V, and TA = 25°C.
Figure 16. Load Transient, 10-200-10 mA, 100 ns Edge
Figure 17. Load Transient, 200-800-200 mA, 100 ns Edge
Figure 18. Line Transient, 3.3-3.9-3.3 VIN, 10 µs Edge,
Figure 19. Line Transient, 3.3-3.9-3.3 VIN, 10 µs Edge,
36 mA Load
600 mA Load
Figure 20. Combined Line / Load Transient, 3.9-3.3 VIN,
Figure 21. Combined Line / Load Transient, 3.3-3.9 VIN,
10 µs Edge, 400-36 mA Load, 100 ns Edge 3.9-3.3 VIN,
10 µs Edge
10 µs Edge, 36-400 mA Load, 100 ns Edge
Figure 22. Startup, 50 Ω Load
Figure 23. Startup, 3 Ω Load
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
7
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), VOUT = 1.82 V, and TA = 25°C.
Figure 24. Shutdown, 10k Ω Load, No Output Discharge Figure 25. Shutdown, No Load, Output Discharge Enabled
Figure 26. Over-Current, Load Increasing Past Current
Limit, FAN53601
Figure 27. 250 mΩ Fault, Rapid Fault, Hiccup, FAN53601
Figure 28. Over-Current, Load Increasing Past Current
Limit, FAN53611
Figure 29. 250 mΩ Fault, Rapid Fault, Hiccup, FAN53611
70
70
36mA Load
24mA Load
600mA Load
500mA Load
60
60
50
40
30
20
50
40
30
20
0.1
1
10
100
1000
0.1
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 30. PSRR, 50 Ω and 3 Ω Load
Figure 31. PSRR, 50 Ω and 3 Ω Load, VOUT=1.23 V
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
8
Operation Description
The FAN53601/11 is a 6 MHz, step-down switching voltage
regulator available in 600 mA or 1 A options that delivers a
fixed output from an input voltage supply of 2.3 V to 5.5 V.
The current required to charge COUT during soft-start
commonly referred to as “displacement current” is given as:
dV
Using
a
proprietary architecture with synchronous
(1)
IDISP COUT
rectification, the FAN53601/11 is capable of delivering a
peak efficiency of 92%, while maintaining efficiency over
80% at load currents as low as 1 mA.
dt
dV
where
refers to the soft-start slew rate.
dt
The regulator operates at a nominal fixed frequency of
6 MHz, which reduces the value of the external components
to as low as 470 nH for the output inductor and 4.7 µF for the
output capacitor. In addition, the PWM modulator can be
synchronized to an external frequency source.
To prevent shut down during soft-start, the following condition
must be met:
(2)
I
I
I
DISP
LOAD MAX(DC)
where IMAX(DC) is the maximum load current the IC is
guaranteed to support.
Control Scheme
The FAN53601/11 uses a proprietary, non-linear, fixed-
frequency PWM modulator to deliver a fast load transient
response, while maintaining a constant switching frequency
over a wide range of operating conditions. The regulator
performance is independent of the output capacitor ESR,
allowing for the use of ceramic output capacitors. Although
this type of operation normally results in a switching frequency
that varies with input voltage and load current, an internal
frequency loop holds the switching frequency constant over a
large range of input voltages and load currents.
Startup into Large COUT
Multiple soft-start cycles are required for no-load startup if
COUT is greater than 15 F. Large COUT requires light initial
load to ensure the FAN53601/11 starts appropriately. The IC
shuts down for 1.3 ms when IDISP exceeds ILIMIT for more
than 200 s of current limit. The IC then begins a new soft-
start cycle. Since COUT retains its charge when the IC is off,
the IC reaches regulation after multiple soft-start attempts.
For very light loads, the FAN53601/11 operates in
discontinuous current (DCM) single-pulse PFM Mode, which
produces low output ripple compared with other PFM
architectures. Transition between PWM and PFM is
seamless, allowing for a smooth transition between DCM
and CCM.
MODE Pin
Logic 1 on this pin forces the IC to stay in PWM Mode. A
logic 0 allows the IC to automatically switch to PFM during
light loads. If the MODE pin is toggled with a frequency
between 1.3 MHz and 1.7 MHz, the converter synchronizes
its switching frequency to four times the frequency on the
MODE pin.
Combined
with
exceptional
transient
response
characteristics, the very low quiescent current of the
controller maintains high efficiency; even at very light loads;
while preserving fast transient response for applications
requiring tight output regulation.
The MODE pin is internally buffered with a Schmitt trigger,
which allows the MODE pin to be driven with slow rise and
fall times. An asymmetric duty cycle for frequency
synchronization is also permitted as long as the minimum
time below VIL(MAX) or above VIH(MAX) is 100 ns.
Enable and Soft-Start
When EN is LOW, all circuits are off and the IC draws ~50 nA
of current. When EN is HIGH and VIN is above its UVLO
threshold, the regulator begins a soft-start cycle. The output
ramp during soft-start is a fixed slew rate of 50 mV/s from 0
to 1 VOUT, then 12.5 mV/s until the output reaches its
setpoint. Regardless of the state of the MODE pin, PFM Mode
is enabled to prevent current from being discharged from COUT
if soft-start begins when COUT is charged.
Current Limit, Fault Shutdown, and Restart
A heavy load or short circuit on the output causes the current
in the inductor to increase until a maximum current threshold
is reached in the high-side switch. Upon reaching this point,
the high-side switch turns off, preventing high currents from
causing damage. The regulator continues to limit the current
cycle-by-cycle. After 16 cycles of current limit, the regulator
triggers an over-current fault, causing the regulator to shut
down for about 1.3 ms before attempting a restart.
In addition, all voltage options can be ordered with a feature
that actively discharges FB to ground through a 230 path
when EN is LOW. Raising EN above its threshold voltage
activates the part and starts the soft-start cycle. During soft-
start, the internal reference is ramped using an exponential
RC shape to prevent overshoot of the output voltage. Current
limiting minimizes inrush during soft-start.
If the fault is caused by short circuit, the soft-start circuit
attempts to restart and produces an over-current fault after
about 200 s, which results in a duty cycle of less than 15%,
limiting power dissipation.
The closed-loop peak-current limit is not the same as the
open-loop tested current limit, ILIM(OL), in the Electrical
Characteristics table. This is primarily due to the effect of
propagation delays of the IC current limit comparator.
The current-limit fault response protects the IC in the event
of an over-current condition present during soft-start. As a
result, the IC may fail to start if heavy load is applied during
startup and/or if excessive COUT is used.
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
9
The calculation for switching frequency is given by:
Under-Voltage Lockout (UVLO)
When EN is HIGH, the under-voltage lockout keeps the part
from operating until the input supply voltage rises high
enough to properly operate. This ensures no misbehavior of
the regulator during startup or shutdown.
1
fSW min
, 6MHz
(3)
tSW (MAX )
where:
VOUT IOUT ROFF
IOUT RON VOUT
Thermal Shutdown (TSD)
tSW (MAX ) 40ns 1
(4)
V
IN
When the die temperature increases, due to a high load
condition and/or a high ambient temperature; the output
switching is disabled until the die temperature falls sufficiently.
The junction temperature at which the thermal shutdown
activates is nominally 150°C with a 15°C hysteresis.
where:
ROFF = RDSON _ N DCRL
ON = RDSON _ P DCRL
R
Minimum Off-Time Effect on Switching
Frequency
tOFF(MIN) is 40 ns. This imposes constraints on the maximum
VOUT
that the FAN53601/11 can provide or the maximum
VIN
output voltage it can provide at low VIN while maintaining a
fixed switching frequency in PWM Mode.
When VIN is LOW, fixed switching is maintained as long as:
VOUT
1 tOFF(MIN) fSW 0.7 .
VIN
The switching frequency drops when the regulator cannot
provide sufficient duty cycle at 6 MHz to maintain regulation.
This occurs when VOUT is 1.82 V and VIN is below 2.7 V at
high load currents (see Figure 32).
7,500
6,000
4,500
2.7VIN, AUTO
2.3VIN, AUTO
2.7VIN, PWM
2.3VIN, PWM
3,000
1,500
0
0
200
400
600
800
1000
Load Current (mA)
Figure 32. Frequency vs. Load Current to Demonstrate
tOFFMIN Effect, VIN=2.3 V and 2.7 V, VOUT=1.82 V,
Auto Mode, FPWM Dotted
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
10
Applications Information
Selecting the Inductor
The increased RMS current produces higher losses through
the RDS(ON) of the IC MOSFETs, as well as the inductor DCR.
The output inductor must meet both the required inductance
and the energy-handling capability of the application. The
inductor value affects average current limit, the PWM-to-
PFM transition point, output voltage ripple, and efficiency.
Increasing the inductor value produces lower RMS currents,
but degrades transient response. For a given physical
inductor size, increased inductance usually results in an
inductor with lower saturation current and higher DCR.
The ripple current (∆I) of the regulator is:
Table 1 shows the effects of inductance higher or lower than
the recommended 1 H on regulator performance.
VOUT
VIN
VIN VOUT
L fSW
I
(5)
Output Capacitor
The maximum average load current, IMAX(LOAD), is related to
the peak current limit, ILIM(PK), by the ripple current, given by:
Table 2 suggests 0402 capacitors. 0603 capacitors may
further improve performance in that the effective capacitance
is higher. This improves transient response and output ripple.
I
2
(6)
IMAX(LOAD) ILIM(PK)
Increasing COUT has no effect on loop stability and can
therefore be increased to reduce output voltage ripple or to
improve transient response. Output voltage ripple, ∆VOUT, is:
The transition between PFM and PWM operation is
determined by the point at which the inductor valley current
crosses zero. The regulator DC current when the inductor
current crosses zero, IDCM, is:
2
f
C
2D
ESR
1
SW
OUT
V
I
OUT
L
(9)
1D
8 f
C
SW OUT
I
2
(7)
IDCM
Input Capacitor
The 2.2 F ceramic input capacitor should be placed as
close as possible between the VIN pin and GND to minimize
the parasitic inductance. If a long wire is used to bring power
to the IC, additional “bulk” capacitance (electrolytic or
tantalum) should be placed between CIN and the power
source lead to reduce the ringing that can occur between the
inductance of the power source leads and CIN.
The FAN53601/11 is optimized for operation with L = 470 nH,
but is stable with inductances up to 1H (nominal). The
inductor should be rated to maintain at least 80% of its value
at ILIM(PK)
.
Efficiency is affected by the inductor DCR and inductance
value. Decreasing the inductor value for a given physical size
typically decreases the DCR; but because ∆I increases, the
RMS current increases, as do the core and skin effect losses.
The effective capacitance value decreases as VIN increases
due to DC bias effects.
I2
12
2
(8)
IRMS
IOUT(DC)
Table 1. Effects of Changes in Inductor Value (from 470nH Recommended Value) on Regulator Performance
Inductor Value
Increase
IMAX(LOAD)
Increase
Decrease
∆VOUT
Decrease
Increase
Transient Response
Degraded
Decrease
Improved
Table 2. Recommended Passive Components and their Variation Due to DC Bias
Component
Description
Vendor
Min.
Typ.
Max.
470 nH,
2012,90 mꢀ,
1.1 A
Murata LQM21PNR47MC0
Murata LQM21PNR54MG0
Hitachi Metals HLSI 201210R47
L1
300 nH 470 nH 520 nH
Murata or Equivalent GRM155R60J225ME15
GRM188R60J225KE19D
2.2 F, 6.3 V,
CIN
1.0 F
1.6 F
2.2 F
4.7 F
X5R, 0402
Murata or Equivalent GRM155R60G475M
GRM155R60E475ME760
4.7 F, X5R,
COUT
0402
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
11
PCB Layout Guidelines
There are only three external components: the inductor and
the input and output capacitors. For any buck switcher IC,
including the FAN53601/11, it is important to place a low-ESR
input capacitor very close to the IC, as shown in Figure 33.
The input capacitor ensures good input decoupling, which
helps reduce noise appearing at the output terminals and
ensures that the control sections of the IC do not behave
erratically due to excessive noise. This reduces switching
cycle jitter and ensures good overall performance. It is
important to place the common GND of CIN and COUT as close
as possible to the C2 terminal. There is some flexibility in
moving the inductor further away from the IC; in that case,
VOUT should be considered at the COUT terminal.
Figure 33. PCB Layout Guidance
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
12
Physical Dimensions
F
0.03 C
E
A
2X
0.40
B
D
A1
BALL A1
INDEX AREA
(Ø0.20)
Cu Pad
0.40
F
(Ø0.30)
Solder Mask
Opening
0.03 C
2X
TOP VIEW
RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
0.06 C
E
0.378±0.018
0.208±0.021
0.625
0.547
0.05 C
SEATING PLANE
D
C
SIDE VIEWS
Ø0.260±0.010
6X
NOTES:
0.40
A. NO JEDEC REGISTRATION APPLIES.
B. DIMENSIONS ARE IN MILLIMETERS.
0.005
C A B
C
B
A
C. DIMENSIONS AND TOLERANCES PER
ASMEY14.5M, 1994.
(Y) +/-0.018
F
0.40
D. DATUM C, THE SEATING PLANE IS DEFINED
BY THE SPHERICAL CROWNS OF THE BALLS.
2
1
(X) +/-0.018
E. PACKAGE TYPICAL HEIGHT IS 586 MICRONS
±39 MICRONS (547-625 MICRONS).
BOTTOM VIEW
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
G. DRAWING FILENAME: UC006ACrev4.
Figure 1. 6-Bump WLCSP, 0.4mm Pitch
Product-Specific Dimensions
Product
D
E
X
Y
FAN53611AUC11X
FAN53611UC123X
FAN53601UC182X
1.160 ±0.030
1.160 ±0.030
1.160 ±0.030
0.860 ±0.030
0.860 ±0.030
0.860 ±0.030
0.230
0.230
0.230
0.180
0.180
0.180
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without
notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most
recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which
covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
13
© 2010 Fairchild Semiconductor Corporation
FAN53601 / FAN53611 • Rev. 1.0.1
www.fairchildsemi.com
14
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