FAN53602UC123X [ONSEMI]

1.2A Synchronous Buck Regulator;


型号：	FAN53602UC123X
厂家：	ONSEMI
描述：	1.2A Synchronous Buck Regulator 开关
文件：	总10页 (文件大小：1121K)
中文：	中文翻译
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Synchronous Buck

Regulator 6ꢀMHz, 1.2ꢀA

FAN53602

DESCRIPTION

The FAN53602 is a 6 MHz, step−down switching voltage regulator

that delivers a fixed output from an input voltage supply of 2.3 V to

5.5 V. Using a proprietary architecture with synchronous rectification,

the FAN53602 is capable of delivering a constant load of 1.2 A.

The regulator operates at a nominal fixed frequency of 6 MHz,

which reduces the value of the external components to as low as

470 nH for the output inductor and 4.7 ꢀ F for the output capacitor.

In addition, the Pulse Width Modulation (PWM) modulator can be

synchronized to an external frequency source.

At moderate and light loads, Pulse Frequency Modulation (PFM) is

used to operate the device in Power−Save Mode with a typical

quiescent current of 24 ꢀ A. Even with such a low quiescent current,

the part exhibits excellent transient response during large load swings.

At higher loads, the system automatically switches to fixed−frequency

control, operating at 6 MHz. In Shutdown Mode, the supply current

drops below 1 ꢀ A, reducing power consumption. For applications that

require minimum ripple or fixed frequency, PFM Mode can be

disabled using the MODE pin.

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WLCSP6 1.16x0.86x0.586

CASE 567QE

MARKING DIAGRAM

12KK

XYZ

The FAN53602 is available in 6−bump, 0.4 mm pitch, Wafer−Level

Chip−Scale Package (WLCSP).

= Alphanumeric Device Marking

= Lot Run Code

= Alphabetical Year Code

= 2 Weeks Date Code

= Assembly Plant Code

Features

• 1.2 A Output Current Capability

• 24 ꢀ A Typical Quiescent Current

• 6 MHz Fixed−Frequency Operation

• Best−in−Class Load Transient Response

• Best−in−Class Efficiency

ORDERING INFORMATION

See detailed ordering and shipping information on page 2 of

this data sheet.

• 2.3 V to 5.5 V Input Voltage Range

• Low Ripple Light−Load PFM Mode

• Forced PWM and External Clock Synchronization

• Internal Soft−Start

• Input Under−Voltage Lockout (UVLO)

• Thermal Shutdown and Overload Protection

• 6−Bump WLCSP, 0.4 mm Pitch

VIN

MODE

470nH

A1 A2

B1 B2

C1 C2

2.2 ꢀ F

GND

4.7 ꢀ F

OUT

Application

Figure 1. Typical Application

• 3G, 4G, WiFi , WiMAXt, and WiBrot Data Cards

• Tablets

• DSC, DVC

• Netbooks

Publication Order Number:

FAN53602/D

October, 2019 − Rev. 2

FAN53602

Table 1. ORDERING INFORMATION

†

Part Number

Output Voltage

Package

Temperature Range

Packing Method

3000 / Tape & Reel

Device Marking

FAN53602UC123X

1.233 V

WLCSP − 6, 0.4 mm

−40 to 85°C

Pitch

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

PIN CONFIGURATION

VIN

MODE

A1 MODE

VIN

C2 GND

GND

Figure 2. Bumps Facing Down

Figure 3. Bumps Facing Up

Table 2. PIN DEFINITIONS

Pin #

Name

Description

MODE

MODE. Logic 1 on this pin forces the IC to stay in PWM Mode. A logic 0 allows the IC to

automatically switch to PFM during light loads. The regulator also synchronizes its switching

frequency to four times the frequency provided on this pin. Do not leave this pin floating.

Switching Node. Connect to output inductor.

Feedback / VOUT. Connect to output voltage.

GND

Ground. Power and IC ground. All signals are referenced to this pin.

Enable. The device is in Shutdown Mode when voltage to this pin is < 0.4 V and enabled

when > 1.2 V. Do not leave this pin floating.

VIN

Input Voltage. Connect to input power source.

Table 3. ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Min.

−0.3

Max.

Unit

Input Voltage

7.0

Voltage on SW Pin

EN and Mode Pin Voltage

Other Pins

+ 0.3 (Note 1)

CTRL

ESD

Electrostatic Discharge

Protection Level

Human Body Model per JESD22−A114

Charged Device Model per JESD22−C101

2.0

1.5

Junction Temperature

Storage Temperature

−40

−65

+150

+260

°C

STG

Lead Soldering Temperature, 10 Seconds

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Lesser of 7 V or V + 0.3 V.

Table 4. THERMAL PROPERTIES

Symbol

Parameter

Typ.

Unit

JAn

Junction−to−Ambient Thermal Resistance

125

°C/W

NOTE: Junction−to−ambient thermal resistance is a function of application and board layout. This data is measured with four−layer 2s2p

boards without vias in accordance to JEDEC standard JESD51. Special attention must be paid to not exceed junction temperature

at a given ambient temperature T .

J(max)

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FAN53602

Table 5. RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Supply Voltage Range

Min.

2.3

Typ.

Max.

Unit

5.5

Output Current

1200

ꢀ F

ꢀ H

°C

OUT

Inductor

470

2.2

4.7

Input Capacitor

Output Capacitor

1.6

−40

12.0

+85

OUT

Operating Ambient Temperature

Operating Junction Temperature

+125

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

Table 6. ELECTRICAL CHARACTERISTICS ( Note 2) Minimum and Maximum Values are at V = V = 2.3 V to

5.5 V, V

= 0 V (AUTO Mode), T = −40°C to +85°C, circuit of Figure 1, unless otherwise noted. Typical values are at T = 25°C,

MODE

= V = 3.6 V.

Symbol

Parameter

Condition

Power Supplies

Min.

Typ.

Max.

Unit

Quiescent Current

No Load, Not Switching

PWM Mode

ꢀ A

Shutdown Supply Current

EN = GND, V = 3.6 V,

0.25

2.15

200

1.00

2.27

(SD)

Under−Voltage Lockout Threshold

Under−Voltage Lockout Hysteresis

Rising VIN

UVLO

UVHYST

Logic Inputs: EN and MODE Pins

Enable HIGH−Level Input Voltage

Enable Low−Level Input Voltage

Logic Input Hysteresis Voltage

Enable Input Leakage Current

1.2

LHYST

0.4

100

ꢀ A

Pin to VIN or GND

0.01

1.00

Switching and Synchronization

Switching Frequency (Note 3)

VIN = 3.6 V, T = 25°C, PWM Mode,

5.4

1.3

6.0

1.5

6.6

1.7

MHz

IOUT = 10 mA

MODE Synchronization Range (Note 3)

Square Wave at MODE Input

SYNC

Regulation

Output Voltage Accuracy

VIN = 3.6 V, IOUT = 0 mA, PWM

AUTO Mode, IOUT = 0 to 1.2 A

1.202

1.171

1.233

180

1.264

1.281

300

Soft−Start

VIN = 4.5 V, From EN Rising

Edge to 95% VOUT

ꢀ

Output Driver

PMOS On Resistance

NMOS On Resistance

PMOS Peak Current Limit

Thermal Shutdown

VIN = V = 3.6 V

175

165

1.95

150

ꢁ

DS(on)

VIN = V = 3.6 V

VIN = 3.6 V, T = 25°C

1.70

2.20

LIM(OL)

°C

TSD

HYS

Thermal Shutdown Hysteresis

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

2. The Electrical Characteristics table reflects open−loop data. Refer to the Operation Description and Typical Characteristics Sections for

closed−loop data.

3. Limited by the effect of t

minimum (see Operation Description section).

OFF

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FAN53602

TYPICAL PERFORMANCE CHARACTERISTIC

Unless otherwise noted, V = V = 3.6 V, V

= 0 V (AUTO Mode), V = 1.233 V, , T = 25°C

OUT A

MODE

Figure 5. Efficiency vs. Load Current

and Temperature

Figure 4. Efficiency vs. Load Current

and Input Voltage

Figure 7. VOUT Accuracy vs. Load Current

and Temperature

Figure 6. VOUT Accuracy vs. Load Current

and Input Voltage

Figure 9. Output Ripple vs. Load Current

and Input Voltage

Figure 8. Switching Frequency vs. Load Current

and Input Volatage

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FAN53602

TYPICAL PERFORMANCE CHARACTERISTIC (continued)

Unless otherwise noted, V = V = 3.6 V, V

= 0 V (AUTO Mode), V = 1.233 V, , T = 25°C

OUT A

MODE

Figure 11. Quiescent Current vs. Input Volatage

and Temperature, FPWM Mode

Figure 10. Quiescent Current vs. Input Voltage

and Temperature

Figure 12. Load Transient, 10 mA ꢀ 200 mA in 1 ms

Figure 13. Load Transient, 150 mA ꢀ 1200 mA in 1 ms

Figure 14. Line Transient, 3.3 V ꢀ 3.9 V in 10 ms,

Figure 15. Startup, 800 mA Load

1200 mA Load

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FAN53602

OPERATION DESCRIPTION

To prevent shut down during soft−start, the following

condition must be met:

The FAN53602 is a 6 MHz, step−down switching voltage

regulator that delivers a fixed output from an input voltage

supply of 2.3 V to 5.5 V. Using a proprietary architecture

with synchronous rectification, the FAN53602 is capable

of delivering a constant 1.2 A load current.

_DISP) I_LOADt I_MAX(DC)

(eq. 2)

Where I

is the maximum load current the IC is

MAX(DC)

guaranteed to support.

The regulator operates at a nominal fixed frequency of

6 MHz, which reduces the value of the external components

to as low as 470 nH for the output inductor and 4.7 ꢀ F for

the output capacitor. In addition, the PWM modulator can be

synchronized to an external frequency source.

Startup into Large C_OUT

Multiple soft−start cycles are required for no−load startup

if COUT is greater than 15 ꢀ F. Large COUT requires light

initial load to ensure the FAN53602 starts appropriately.

The IC shuts down for 1.3 ms when IDISP exceeds ILIMIT

for more than 200 ꢀ s of current limit. The IC then begins

a new soft−start cycle. Since COUT retains its charge when

the IC is off, the IC reaches regulation after multiple

soft−start attempts.

Control Scheme

The FAN53602 uses

proprietary, non−linear,

fixed−frequency PWM modulator to deliver a fast load

transient response, while maintaining a constant switching

frequency over a wide range of operating conditions.

The regulator performance is independent of the output

capacitor ESR, allowing for the use of ceramic output

capacitors. Although this type of operation normally results

in a switching frequency that varies with input voltage

and load current, an internal frequency loop holds

the switching frequency constant over a large range of input

voltages and load currents.

For very light loads, the FAN53602 operates

in Discontinuous Current Mode (DCM) single−pulse PFM

Mode, which produces low output ripple compared

with other PFM architectures. Transition between PWM

and PFM is seamless, allowing for a smooth transition

between DCM and CCM.

MODE Pin

Logic 1 on this pin forces the IC to stay in PWM Mode.

A logic 0 allows the IC to automatically switch to PFM

during light loads. If the MODE pin is toggled with

a frequency between 1.3 MHz and 1.7 MHz, the converter

synchronizes its switching frequency to four times

the frequency on the MODE pin.

The MODE pin is internally buffered with a Schmitt

trigger, which allows the MODE pin to be driven with slow

rise and fall times. An asymmetric duty cycle for frequency

synchronization is also permitted as long as the minimum

time below V

or above V

is 100 ns.

IL(MAX)

IH(MAX)

Current Limit, Fault Shutdown and Restart

Combined with exceptional transient response

characteristics, the very low quiescent current

of the controller maintains high efficiency; even at very

light loads, while preserving fast transient response for

applications requiring tight output regulation.

A heavy load or short circuit on the output causes

the current in the inductor to increase until a maximum

current threshold is reached in the high−side switch. Upon

reaching this point, the high−side switch turns off,

preventing high currents from causing damage.

The regulator continues to limit the current cycle−by−cycle.

After 16 cycles of current limit, the regulator triggers

an over−current fault, causing the regulator to shut down

for about 1.3 ms before attempting a restart.

If the fault is caused by short circuit, the soft−start circuit

attempts to restart and produces an over−current fault after

about 200 ꢀ s, which results in a duty cycle of less than 15%,

limiting power dissipation.

Enable and Soft−Start

When EN is LOW, all circuits are off and the IC draws

~250 nA of current. When EN is HIGH and VIN is above its

UVLO threshold, the regulator begins a soft−start cycle.

The output ramp during soft−start is a fixed slew rate of

50 mV/ꢀ s from VOUT = 0 to 1 V, then 12.5 mV/ꢀ s until

the output reaches its setpoint. Regardless of the state of

the MODE pin, PFM Mode is enabled to prevent current

from being discharged from COUT if soft−start begins when

COUT is charged.

The current−limit fault response protects the IC in

the event of an over−current condition present during

soft−start. As a result, the IC may fail to start if heavy load

is applied during startup and/or if excessive COUT is used.

The current required to charge COUT during soft−start

commonly referred to as “displacement current” is given as:

The closed−loop peak−current limit is not the same as the

open−loop tested current limit, ILIM(OL), in the Electrical

Characteristics table. This is primarily due to the effect of

propagation delays of the IC current limit comparator.

Under−Voltage Lockout (UVLO)

When EN is HIGH, the under−voltage lockout keeps

the part from operating until the input supply voltage rises

high enough to properly operate. This ensures no

misbehavior of the regulator during startup or shutdown.

_DISP+ C_OUT@

(eq. 1)

Where

refers to the soft−start slew rate.

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FAN53602

Thermal Shutdown (TSD)

The transition between PFM and PWM operation is

determined by the point at which the inductor valley current

crosses zero. The regulator DC current when the inductor

When the die temperature increases, due to a high load

condition and/or a high ambient temperature; the output

switching is disabled until the die temperature falls

sufficiently. The junction temperature at which the thermal

shutdown activates is nominally 150°C with a 15°C

hysteresis.

current crosses zero, I , is:

DCM

ꢂ I

I_DCM

(eq. 7)

The FAN53602 is optimized for operation with

L = 470 nH, but is stable with inductances up to 1 ꢀ H

(nominal). The inductor should be rated to maintain at least

Minimum Off−Time Effect on Switching Frequency

is 40 ns. This imposes constraints on

V_OUT

OFF(MIN)

80% of its value at I

LIM(PK)

Efficiency is affected by the inductor DCR and inductance

value. Decreasing the inductor value for a given physical

size typically decreases the DCR; but because ꢂI increases,

the RMS current increases, as do the core and skin effect

losses.

the maximum

that the FAN53602 can provide or the

V_IN

maximum output voltage it can provide at low VIN while

maintaining a fixed switching frequency in PWM Mode.

When VIN is LOW, fixed switching is maintained as long as:

V_IN

^OUTv 1 * t_OFF(MIN)@ f_SW[ 0.7

ꢂ I²

₊Ǹ

I_RMS

I_OUT(DC)

)

(eq. 8)

The switching frequency drops when the regulator cannot

provide sufficient duty cycle at 6 MHz to maintain

regulation.

The increased RMS current produces higher losses

through the R

of the IC MOSFETs, as well as the

DS(ON)

inductor DCR.

The calculation for switching frequency is given by:

Increasing the inductor value produces lower RMS

currents, but degrades transient response. For a given

physical inductor size, increased inductance usually results

in an inductor with lower saturation current and higher DCR.

Table 7 shows the effects of inductance higher or lower

than the recommended 1 ꢀ H on regulator performance.

_{, 6 MHz}Ǔ

_SW+ min

(eq. 3)

t_SW(MAX)

Where:

_OUT) I_OUT@ R_OFF

_{+ 40 ns @}ǒ_{1 )}

t_SW(MAX)

_IN* I_OUT@ R_ON* V_OUT

Output Capacitor

(eq. 4)

Table 8 suggests 0402 capacitors. 0603 capacitors may

further improve performance in that the effective

capacitance is higher. This improves transient response

and output ripple.

Where:

_OFF+ R_{DSON_N}) DCR_L

_ON+ R_{DSON_P}) DCR_L

Increasing C

has no effect on loop stability and can

OUT

therefore be increased to reduce output voltage ripple or to

improve transient response. Output voltage ripple, ꢂV

is:

OUT

APPLICATIONS INFORMATION

Selecting the Inductor

The output inductor must meet both the required

inductance and the energy−handling capability of

the application. The inductor value affects average current

limit, the PWM−to−PFM transition point, output voltage

ripple, and efficiency.

_SW@ C_OUT@ ESR²

_{ꢂ I}ƪ

ꢂ

)

(

)

2 @ D @ 1 * D

8 @ f_SW@ C_OUT

(eq. 9)

Input Capacitor

The 2.2 ꢀ F ceramic input capacitor should be placed as

close as possible between the VIN pin and GND to minimize

the parasitic inductance. If a long wire is used to bring power

to the IC, additional “bulk” capacitance (electrolytic or

The ripple current (ꢂI) of the regulator is:

V_OUT

V_IN

_IN* V_OUT

L @ f_SW

_@ǒ

ꢂ

[

(eq. 5)

The maximum average load current, I

tantalum) should be placed between C and the power

MAX(LOAD)

, by the ripple

is related to the peak current limit, I

current, given by:

source lead to reduce the ringing that can occur between

LIM(PK)

the inductance of the power source leads and C .

The effective capacitance value decreases as VIN

increases due to DC bias effects.

ꢂ I

_MAX(LOAD)+ I_LIM(PK)

(eq. 6)

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FAN53602

Table 7. EFFECTS OF CHANGES IN INDUCTOR VALUE (FROM 470 nH RECOMMENDED VALUE) ON REGULATOR

PERFORMANCE

Inductor Value

Increase

Transient Response

Degraded

MAX(LOAD)

OUT

Increase

Decrease

Increase

Decrease

Improved

Table 8. RECOMMENDED PASSIVE COMPONENTS AND THEIR VARIATION DUE TO DC BIAS

Component

Description

Vendor

Min.

Typ.

Max.

0.47 ꢀ H/5.3 A/26 m

ꢁ

Murata DFE201610E−R47M

470 nH

ꢃ ꢄ ꢅ x 1.6 1.0 mm

2.2 ꢀ F, 6.3 V, X5R, 0402

4.7 ꢀ F, X5R, 0402

Murata or Equivalent GRM155R60J225ME15

GRM188R60J225KE19D

1.0 ꢀ F

1.6 ꢀ F

2.2 ꢀ F

4.7 ꢀ F

Murata or Equivalent GRM155R60G475M

GRM155R60E475ME760

OUT

PCB LAYOUT GUIDELINES

There are only three external components: the inductor

and the input and output capacitors. For any buck switcher

IC, including the FAN53602, it is important to place

a low−ESR input capacitor very close to the IC, as shown

in Figure 16. The input capacitor ensures good input

decoupling, which helps reduce noise appearing

at the output terminals and ensures that the control sections

of the IC do not behave erratically due to excessive noise.

This reduces switching cycle jitter and ensures good overall

performance. It is important to place the common GND

of CIN and COUT as close as possible to the C2 terminal.

There is some flexibility in moving the inductor further

away from the IC; in that case, VOUT should be considered

at the COUT terminal.

Figure 16. PCB Layout Guidance

PRODUCT−SPECIFIC DIMENSIONS

1.160 0.030

0.860 0.030

0.230

0.180

Wi−Fi is a registered trademark of the Wi−Fi Alliance.

WiMAX is a trademark of WiMAX Forum.

WiBro is a trademark and brand of Telecommunications Technology Association.

All brand names and product names appearing in this document are registered trademarks or trademarks of their respective holders.

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MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

WLCSP6 1.16x0.86x0.586

CASE 567QE

ISSUE O

DATE 31 OCT 2016

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DOCUMENT NUMBER:

DESCRIPTION:

98AON13324G

WLCSP6 1.16x0.86x0.586

PAGE 1 OF 1

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

FAN53602UC123X [ONSEMI]

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