FAN7554_03 [FAIRCHILD]
Versatile PWM Controller; 多功能PWM控制器型号: | FAN7554_03 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Versatile PWM Controller |
文件: | 总22页 (文件大小:986K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN7554
Versatile PWM Controller
Features
Description
• Current mode control
The FAN7554 is a fixed frequency current mode PWM
controller. It is specially designed for off-line and DC to DC
converter applications with minimal external components.
These integrated circuits feature a trimmed oscillator for
precise duty cycle control, a temperature compensated
reference, an ON/OFF control, a high gain error amplifier, a
current sensing comparator, and a high current totem-pole
output. The FAN7554 has various protection functions such
as an over load protection, an over current protection, and
the over voltage protection, which include built-in auto
restart circuit. The FAN7554 is available in the 8-DIP
package as well as the 8-SOP package.
• Pulse by pulse current limiting
• Low external components
• Under voltage lockout(UVLO): 9V/15V
• Stand-by current: typ. 100uA
• Power saving mode current: typ. 200uA
• Operating current: typ. 7mA
• Soft start
• On/off control
• Over load protection(OLP)
• Over voltage protection(OVP)
• Over current protection(OCP)
• Over current limit(OCL)
• Operating frequency up to 500kHz
• 1A totem-pole output current
8-DIP
1
Applications
• Off-Line & DC-DC converter
8-SOP
1
Rev. 1.0.3
©2003 Fairchild Semiconductor Corporation
FAN7554
Internal Block Diagram
Rt/Ct
4
Vcc
7
Vref
8
OVP
+
3.5V
_
+
S
R
_
34V
Q
off
UVLO
Vref
uA
+
PWR
/
SAVE
Vref
100
_
_
+
on
2
1
S/S
15V/9V
1k
1.5V
0.3V
+
OSC
CLK
_
14V
6
OUT
S
PWM
MAX. 1V
R
Q
_
FB
2R
+
R
1mA
Vref
Vcc
Offset(0.1V)
UVLO-out
3
5
I S
5uA
6V
OCL
+
OLP
+
S
Q
_
_
2V
R
OVP-out
OCL-out
GND
Absolute Maximum Ratings
( Ta = 25°C, unless otherwise specified )
Parameter
Symbol
Value
Unit
Supply voltage
Vcc
30
±1
V
A
V
V
Output current
I
O
Input voltage to FB pin
Input voltage to IS pin
V
FB
-0.3 to V
SD
OC
V
-0.3 to V
IS
Power dissipation at T ≤ 25°C
A
8-DIP
8-SOP
P
0.85
0.42
W
D
Operating temperature
Storage temperature
T
-25 to +85
°C
°C
OPR
T
-55 to +150
STG
Thermal resistance, junction-to-air (Note1)
8-DIP
8-SOP
Rθja
147.8
291.4
°C/W
Note:
1. Junction -to -air thermal resistance test environments.
- JESD51-2 : Integrated circuits thermal test method environmental conditions-natural convection (still air).
- JESD51-3 : Low effective thermal conductivity test board for leaded surface mount packages.
- JESD51-10 : Test boards for through-hole perimeter leaded package thermal measurements.
2
FAN7554
Temperature Characteristics
( -25°C ≤ Ta ≤ 85°C )
Parameter
Symbol
Value
±0.5
±5
Unit
Vref temperature stability
Fosc temperature stability
∆V
3
REF
%
%
∆F
2
OSC
PIN Array
Vref
Vcc
OUT
GND
8
6
5
7
YWW
F AN7 5 5 4
1
2
3
4
Rt/Ct
FB
S/S
IS
PIN Definitions
Pin Number
Pin Name
FB
Pin Function Description
1
2
3
4
5
6
7
8
Inverting(-) input of pwm comparator, on/off control & OLP sensing terminal.
S/S
Soft start
IS
Non-inverting(+) input of PWM comparator, OCL sensing terminal
Rt/Ct
GND
OUT
Vcc
Oscillator time constant(Rt/Ct)
Ground
Output of gate driver
Power supply
Vref
Output of 5V reference
3
FAN7554
Electrical Characteristics
(Ta = 25°C, Vcc=16V, Rt=10kΩ, Ct=3.3nF unless otherwise specified)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
< REFERENCE SECTION >
Reference output voltage
Line regulation
V
∆V
∆V
T =25°C , Iref =1mA
4.90
5.00
6
5.10
20
V
REF
j
Vcc =12V ~ 25V
-
-
-
mV
mV
A
REF1
REF2
Load regulation
Iref =1mA ~ 20mA
6
25
Short circuit output current
< OSCILLATOR SECTION >
Oscillation frequency
Frequency change with Vcc
Ramp high voltage
I
T = 25°C
j
0.1
0.18
SC
F
T = 25°C
j
45
50
0.05
2.8
1.2
-
55
1.0
-
kHz
%
OSC
∆F
Vcc = 12V ~ 25V
-
-
OSC1
V
-
-
V
RH
Ramp low voltage
V
-
-
V
RL
Discharge current
Idisch
V
= 3.3V
6.1
9.4
mA
RT/CT
< PWM SECTION >
Sense threshold voltage
Feedback threshold voltage
Feedback source current
Max. duty cycle
V
V
V
V
= 5V
0.8
0.2
-
1.0
0.3
1.0
95
-
1.2
0.4
-
V
V
TH(IS)
FB
IS
V
= 0V
= 0V, V
TH(FB)
I
= 5V
mA
%
FB
FB
S/S
D
-
-
92
-
98
0
(MAX)
Min. duty cycle
D
%
(MIN)
< PROTECTION SECTION >
Shutdown delay current
Shutdown feedback voltage
Over current protection
Over voltage protection
< ON/OFF CONTROL SECTION >
Off mode sink current
Off threshold voltage
< SOFT-START SECTION >
Soft start current
I
4V ≤ V ≤ V
FB
3.5
5.4
1.6
30
5
6
6.5
6.6
2.4
38
uA
V
SD
SD
V
V
V
> 5V
SD
OC
FB
IS
V
> 1.5V,
ton > 500nS
2
V
V
-
34
V
OVP
I
V
V
< V
< V
, V
= 5V
-
4
-
mA
V
SINK
FB
FB
TH(FB) S/S
V
1.2
1.5
1.8
OFF
TH(FB)
I
V
= 5V, V
S/S
= 0V
-
-
1.1
5.2
-
-
mA
V
S/S
FB
Soft start limit voltage
<OUTPUT SECTION>
Low output voltage1
High output voltage1
Low output voltage2
High output voltage2
Rising time (Note1)
V
Vcc = 16V
LIM(S/S)
V
V
V
V
= 18V, I = 50mA
-
13
-
0.15
15
0.4
17
2.5
16
-
V
V
OL1
CC
CC
CC
O
V
= 18V, I = -50mA
O
OH1
V
= 18V, I = 200mA
1.5
14
V
OL2
O
V
Vcc = 18V, Io = -200mA
T = 25°C, C = 1nF
12
-
V
OH2
t
80
ns
ns
R
j
L
Falling time (Note1)
t
F
T = 25°C, C = 1nF
-
40
-
j
L
<UVLO SECTION>
Start threshold voltage
Min. operating voltage
V
-
-
13.2
8.2
15
9
16.2
10.2
V
V
TH(ST)
V
OPR(M)
4
FAN7554
Electrical Characteristics (Continued)
(Ta = 25°C, Vcc=16V, Rt =10kΩ, Ct = 3.3nF unless otherwise specified)
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
<TOTAL STAND-BY CURRENT SECTION>
Start-up current
I
-
-
-
-
-
0.1
7
0.2
10
mA
mA
mA
ST
Operating supply current
Off State current
I
OP
I
V
<V
,V <V
FB TH(FB) S/S OFF
0.2
0.4
OFF
Note:
1. These parameters, although guaranteed, are not 100% tested in production.
5
FAN7554
Typical Perfomance Characteristics
100.000
10.000
1.000
10000.0
1000.0
0. 33n
1. 1n
1K
100.0
2K
3. 3n
5K
11n
10K
20K
50K
100K
10.0
33n
1.0
0.1
0.100
1
10
100
0.1
1
10
100
Rt[ Kohm]
Ct[ nF]
Figure 1. Rt vs. Frequency
Figure 2. Ct vs. Dead Time
800
700
600
500
400
300
200
100
0
95.0
85.0
75.0
65.0
55.0
45.0
35.0
25.0
15.0
1K
2K
5K
Tr
Tf
10K
20K
50K
100K
0.1
1
10
100
1
10
100
Ct [ nF]
Cloa d [ nF]
Figure 3. Ct vs. Duty
Figure 4. Cload vs. Tr & Tf
6
FAN7554
Typical Performance Characteristics(Continued)
Figure 6. Temperature vs. Operating Supply Current
Figure 5. Temperature vs. Start-up Current
Figure 7. Temperature vs. Reference Voltage
Figure 8. Temperature vs. Oscillation frequency
Figure 10. Temperature vs. Min. Operating Voltage
Figure 9. Temperature vs. Start Threshold Voltage
7
FAN7554
Operation Description
The FAN7554 has all the basic features of the current mode SMPS control IC. Its basic configuration includes the UVLO with
6V hysteresis, a band gap reference, the oscillator that can oscillate up to 500kHz according to R /C (connected externally), a
t
t
PWM logic circuit , a gate driver, and the feedback circuit that has the current source and soft start function. The FAN7554 has
various functions such as an over load protection, an over current protection, and an over voltage protection. The over load
protection forces the FAN7554 to stop its operation if the load current is higher than the preset value. The protection circuit
can also be prevented from operating during transient states by ensuring that a certain amount of the time passes before the
protection circuit operates. The shutdown circuit is configured for an auto-restart, so the FAN7554 automatically restarts when
Vcc drops to 9V (stop voltage).
Start-Up
The start-up circuit is made up of an under voltage lock out (UVLO), the protection for low voltage conditions, and the 5V
reference (V ), which supplies bias voltage to the control circuit after start-up. The start voltage of the UVLO is 15V , and
ref
the stop voltage after turn on is 9V. It has a 6V hysteresis. The minimum operating current for start-up threshold is typically
100uA, and this can reduce the power dissipation on the start-up resistor. The Vref is composed of the band gap reference
circuit with its superior temperature characteristics and supplies power to all the FAN7554 circuits and R /C , with the
t
t
exceptions of the ULVO circuit and ON/OFF control circuit.
DC Link
Icc(mA)
7.0
VCC
7
UVLO
Internal bias
5V
Good logic
Vref
0.01
15V/9V
Vcc (V)
FAN7554
Figure 11. Low Current Start-Up & Bandgap Reference Circuit
9
15
Figure 12. Start-Up & Circuit Characteristics
Soft Start
The SMPS output load usually contains a capacitive load component. During initial start-up, the output voltage increases at a
fixed time constant because of this component. If the feedback loop, which controls the output voltage, was to start without
the soft start circuit, the feedback loop would appear to be open during initial start-up , so, at start-up, the feedback voltage
applied to the PWM comparator’s inverting input (-) reaches its maximum value(1V).
During this time, the peak value of the drain current would stay at the maximum value, and the maximum power would be
delivered to the secondary load side from the start. When the maximum power is delivered to the secondary side for this initial
fixed time, the entire circuit is seriously stressed. The use of a soft start can avoid such stresses. At start-up, the soft start
capacitor Cs is charged by 1mA and 100uA current sources.
The voltage of the inverting terminal of the PWM comparator increases to 1/3 of the Cs voltage at a fixed time constant.
Subsequently, the drain peak current is limited by the gradual increase in the Cs voltage and this causes the output voltage to
increase smoothly. When the Cs voltage becomes greater than 3V, the diode Ds turns off consequently, the feedback capacitor
Cfb is charged by 1mA and 5uA current sources. This charge voltage determines the comparator’s inverting voltage. Then, Cs
voltage charges to 5V by 100uA current source. The soft start capacitor Cs is discharged when the UVLO good logic starts, so
the soft start is repeated at re-start.
8
FAN7554
S/S
2
100uA
5V
Ds
2R
Output drive
R
1mA
Cfb
Cs
5V
5uA
Vcc
FAN7554
1
FB
Figure 13. Soft Start Circuit & Circuit Flow
Oscillator
As shown in figure14, the oscillator frequency is programmed by values selected for timing components Rt and C . Capacitor
t
C is charged to almost 2.8V through resistor Rt from the 5V reference and discharged to 1.2V by an internal current source.
t
The oscillator generates the clock signal while the timing capacitor C is discharged. The gate drive output becomes low during
t
the clock time. Rt and C selection determine the oscillator frequency and maximum duty cycle. Charge and discharge times
t
can be calculated through the equations below.
Charging time : tc = 0.55×R ×C
t
t
Discharging time : td = R ×C ×ln[(0.0063×R - 2.8) / (0.0063×R - 3.8)]
t
t
t
t
where the oscillator frequency : fosc = (tc + td)-1 (±10%)
When R > 5kΩ, fosc = 1 / (0.55×R ×C ) = 1.8 / (R ×C )
t
t
t
t
t
Vhigh(2.8V)
Vref
Sawtooth waveform
8
[ Rt > 5kΩ]
Vlow(1.2V)
Rt
Ct
tc
td
CT
4
Gate Drive
Internal clock
Vhigh(2.8V)
Discharge
2.8V
/1.2V
Sawtooth waveform
Vlow(1.2V)
[ Rt < 5kΩ]
td
tc
FAN7554
Internal clock
Figure 15. Sawtooth & Clock Waveform
Figure 14. Oscillator Circuit
9
FAN7554
Feedback
As shown in figure16, the internal oscillator clock turns on the MOSFET. The feedback comparator operates to turn it off
again, when the MOSFET current reaches a set value proportional to Vfb. The feedback capacitor Cfb is charged by the inter-
nal current sources , 1mA and 5uA, and is discharged by the secondary side photo-coupler to control the output voltage.
DRIN
OUT
OSC
6
2R
Vfb/3
Vfb
Q
S
R
R
1mA
5uA
Cfb
IS
Vsense
5V
3
Vcc
Rs
FAN7554
1
FB
Figure 16. Feedback & PWM Circuit
Delayed Shutdown
During the normal operation, the feedback voltage is between 0~3V. If the output terminal overloads or an error happens to
the feedback loop, the delayed shutdown circuit operates. When the feedback voltage is less than 3V, the feedback capacitor is
charged by current sources, 1mA and 5uA; when the feedback voltage becomes greater than 3V, the capacitor is charged by the
5uA current source because diode D1 turns off. When the feedback voltage is less than 3V, the charge slope becomes an expo-
nential function and, when it is greater than 3V, the charge slope becomes linear. When the feedback voltage reaches almost
6V, the FAN7554 shuts down. The shut down circuit is configured for
auto-restart, so it automatically restarts when Vcc reaches the under voltage 9V.
FB
1
DRIN
5uA
OUT
OSC
6
Vcc
2R
Q
S
R
D1
R
1mA
Cfb
IS
5V
3
Rs
Over Current
Comparator
Shutdown
Q
S
R
6V
FAN7554
UVLO - out
Figure 17-A . Delayed Shutdown & Feedback Circuit
10
FAN7554
Vfb
6V
Slope (dv/dt) = 5uA / Cfb
Shutdown start point
3V
t1
t
t2
Figure 17-B . Delayed Shutdown & Feedback Waveform
Gate Driver
The gate drive circuit has the totem-pole output configuration. The output has 1A peak current and 200mA average current
drive ability.
7
DRAIN
Clock
Q
OUT
6
Shutdown
FAN7554
Figure 18. Gate Drive Circuit
ON/OFF Control
The FAN7554 is able to use the feedback pin for ON/OFF control by placing NPN transistor between the cathode of the
KA431 and ground as shown in figure 19. When the transistor turns on, the current flows through the photo diode and
saturates the photo transistor. As a result, the feedback voltage is dropped to zero. When the feedback voltage is below 0.3V,
the soft start voltage starts to discharge by connecting the internal resistor 1kΩ in parallel with the external capacitor Cs. When
the soft start voltage becomes less than 1.5V, all the blocks in the FAN7554 are turned off , with the exceptions of the UVLO
block and ON/OFF control block. The operation current is about 200uA. So the stand-by power is reduced and SMPS
efficiency is improved. When the feedback voltage exceeds 0.3V, the FAN7554 normally operates by turning on Vref block.
11
FAN7554
VCC
7
Vref
3.5V
1.5V
S
R
Q
100uA
UVLO
OFF
ON
S/S
FB
PWR
/
SAVE
5V
2
1
Vref
15V/9V
1K Ω
0.3V
Good logic
Vo
Cs
Internal bias
Cfb
5uA
FAN7554
Vcc
Remote control
Figure 19. ON/OFF Control Circuit
Vref
Icc
5V
4.5mA
0.2mA
t
VS/S
Slope (dv/dt) = 100uA / Cs
5V
Slope (dv/dt) = 1kΩ * Cs
3V
Slope (dv/dt) = (1mA +100uA) / Cs
1.5V
t
Vfb
Slope (dv/dt) = (1mA +5A) / Cfb
OFF Signal
0.3~3V
Slope (dv/dt) = (5uA) / Cfb
ON Signal
0.3V
Normal State
Normal State
OFF State
t
Figure 20. ON-OFF Control Circuit Waveforms
12
FAN7554
Protection Circuits
The FAN7554 has many built-in protection circuits that do not need additional components, providing reliability without cost
increase. These protection circuits have the auto-restart configuration. In this configuration, the protection circuits reset when
Vcc is below UVLO stop threshold (9V) and restarts when Vcc is above UVLO start threshold voltage (15V)
Over Voltage Protection
Abnormalities may occur in the SMPS secondary side feedback circuit. First, when the feedback pin is short to the ground, the
feedback voltage is zero and the FAN7554 is unable to start switching. Second, when the feedback circuit is open, the
secondary voltage generally becomes much greater than the rated voltage as the primary side continues to switch at the
maximum current level. This may cause the blowing off the fuse or, in serious cases, fires. It is possible that the devices
directly connected to the secondary output without a regulator could be destroyed. Even in these cases, the over voltage
protection circuit operates. Since Vcc is proportional to the output , in an over voltage situation, it also will increase. In the
FAN7554, the protection circuit operates when Vcc exceeds 34V. Therefore ,in normal operation, Vcc must be set below 34V.
Over Load Protection
An overload is the state in which the load is operating normally but in excess of the preset load. The overload protection circuit
can force the FAN7554 to stop its operation . The protection can also operate in transient states such as initial SMPS operation.
Because the transient state returns to the normal state after a fixed time, the protection circuit need not to operate during this
time. That is, the FAN7554 needs the time to detect and decide whether it is an overload condition or not. The protection
circuit can be prevented from operating during transient states by ensuring that a certain amount of time passes before the
protection circuit operates. The above operations are executed as follows: Since the FAN7554 adopts a current mode, it is
impossible for current to flow above a maximum level. For a fixed input voltage, this limits power. Therefore, if the power at
the output exceeds this maximum, Vo, shown in figure21, becomes less than the set voltage, and the KA431pulls in only the
given minimum current. As a result, the photo-coupler’s secondary side current becomes zero. The same goes for the
photo-coupler’s primary side current. Consequently, when the full current 1mA flows through the internal resistor
(2R + R = 3R), Vfb becomes approximately 3V and from that time, the 5uA current source begins to charge Cfb, the
photo-coupler’s secondary current is almost zero. The FAN7554 shuts down when Vfb reaches 6V.
S
R
Q
Shutdown
6V
UVLO out
OSC
Vfb
Vo
2R
R
1mA
5uA
Cfb
S
R
Q
5V
Vcc
FAN7554
1
KA431
FB
V
6V
Shutdown start point
3V
t1
Time Constant = 3R * Cfb
t2
t
5uA = (Cfb *3V)/t2
Figure 21. Delayed Shutdown
13
FAN7554
FAN7554 Flyback Converter Demo Circuit (Fsw:100kHz)
12V/3.5A
L201
BD
D201
NTC
T101
R103
C102
R104
C104
R203
R204
C201
C202
R102
R101
D101
C103
C301 C302
LF101
R202
R201
IC301
C101
TNR
Q101
D102
R106
R105
R205 C203
IC201
FUSE
D103
R108
8
7
6
5
Vref Vcc OUT GND
R107
FAN7554 IC101
Input:85 ~ 265VAC
50/60Hz
FB S/S IS Rt/Ct
C109
R109
1
2
3
4
R110
R111
C105
C108
C106
C107
IC301
14
FAN7554
Part List For FAN7554 Flyback Converter Demo Board
Part
FUSE
NTC
Value
FUSE
Note
Part
Value
CAPACITOR
100nF/ 275V
100nF/ 275V
470nF/ 400WV
103/ 1kV
104
Note
250 2A
NTC
-
-
C101
C102
C103
C104
C105
C106
C107
C108
C109
C201
C202
C203
C301
C302
Box Capacitor
Box Capacitor
Electrolytic
Film Capacitor
Ceramic
5D-11
RESISTOR
330kΩ
-
R101
R102
1W
-
1uF/ 10V
101
Electrolytic
Ceramic
R103, R104
R105
100kΩ
22Ω
1W
-
122
Ceramic
R106
4.7kΩ
12kΩ
-
22uF/ 50V
330uF
Electrolytic
Electrolytic
Electrolytic
Ceramic
R107
-
R108
10Ω
-
330uF
R109
1kΩ
-
104
R110
0.5Ω
2W
-
-
R201
1kΩ
-
-
-
-
-
-
-
R202
1kΩ
R203
4.7kΩ
1.2kΩ
-
INDUCTOR
30mH
R204
LF101
L201
-
-
R205
6.4uH
MOSFET
FQP6N70
IC
DIODE
Q101
Fairchild
D201
D101
D102
D103
BD
MBRF10100CT
UF4007
-
Fairchild
IC101
IC201
IC301
FAN7554
KA431
Opto-coupler
Fairchild
Fairchild
Fairchild
1N4148
-
UF4004
Fairchild
-
G3SBA60
15
FAN7554
Transformer Specification
Schematic Diagram (Top view)
3mm
6mm
2mm
12
1
10
NP
9
8
3
NB
11
N
P
N12V
N
12V
4
5
7
6
NB
N
P
bottom
top
Winding Specification
No. Pin(S → F)
Wire
Turns
44
Winding Method
N
1 → 3
7 → 11
1 → 3
5 → 4
0.35φ × 1
0.35φ × 4
0.35φ × 1
0.35φ × 1
-
-
-
-
P
N
12V
12
N
44
P
B
N
13
Electrical Characteristic
Closure
Pin
Spec.
Remarks
Inductance
1 - 3
1 - 3
400uH ±10%
10uH MAX .
100kHz, 1V
2
nd All short
Leakagel
16
FAN7554
FAN7554 forward converter demo circuit ( fsw:100kHz)
L201
D201
BD
+12V/2A
T101
R103
D102
R104
C104
C201
C202
R105
R106
C102
C103
C301 C302
D202
+5V/3A
L101
D103
R107
D104
L202
R201
C101
C105
C204
C203
R203
R101
R102
R202
IC2
R108
8
7
6
5
Q101
R110
FUSE
Vref Vcc OUT GND
R113
FAN7554
D101
C106
RT101
F/B S/S IS Rt/Ct
1
R109
3
2
4
Input: 85 ~ 265VAC
50/60Hz
R112
R111
C110
C111
IC301
C107
C108
C109
R204
IC301
C205
IC201
17
FAN7554
Part List For FAN7554 Forward Converter Demo Board
Part
FUSE
RT101
Value
FUSE
Note
Part
Value
CAPACITOR
470nF/ 275V
470nF/ 400WV
223/ 630V
33uF/ 35V
104
Note
250 2A
NTC
-
-
C101
C102, C103
C104
Box Capacitor
Electrolytic
Film
DSC 10D-11
RESISTOR
330kΩ
-
C105
Film Capacitor
Ceramic
Electrolytic
Ceramic
Ceramic
Film
R101
R102
1W
C106
-
C107
1uF/ 35V
101
R103, R104
R105, R106
R107
56kΩ
1W
C108
220kΩ
10Ω
1W
C109
122
-
C110
272
R108
20Ω
-
C111
333
Film
R109
4.7kΩ
-
C201, C202
C203
1000uF/ 35V
330uF/ 16V
2200uF/ 16V
104
Electrolytic
Electrolytic
Electrolytic
Ceramic
Ceramic
R110
1.2kΩ
-
R111
0.5Ω//0.5Ω//0.5Ω
1kΩ
2W
C204
R112
-
-
-
-
-
C205
R113
12kΩ
C301, C302
332/ 1kV
INDUCTOR
30mH
R201, R202
R203
10kΩ
1kΩ
LF101
L201
-
-
R204
330Ω
-
MOSFET
SSH8N80
IC
DIODE
Q101
Fairchild
D101
D102
D103
D201
D202
BD
1N4004
-
-
-
-
-
FR157
IC101
IC201
IC301
-
FAN7554
KA431
Opto-Coupler
-
Fairchild
Fairchild
Fairchild
-
UF4007
MBRF10100CT
MBR3045PT
PBS406GU
18
FAN7554
Transformer specification
Schematic Diagram (Top view)
1
13, 14
Np ; 32turn
Ns,12 ; 5turn
Nvcc ; 6turn
Np ; 32turn
Ns,12 ; 5turn
Ns,5 ; 4turn
Np ; 32turn
3
8, 9
6
Ns,5 ; 4turn
Nvcc ; 5turn
7
10,11,12
Winding Specification
No.
Pin(S → F)
1 → 3
Wire
Turns
N
P
0.65 φ × 1
0.65 φ × 4
0.65 φ × 4
0.65 φ × 1
0.65 φ × 1
32
4
N , 5
S
8 → 11
4 → 9
N , 12
S
5
N
P
1 → 3
32
5
N
7 → 6
VCC
Core : Powder 27 pi 16grade
5V : 12T ( 1 φ × 2 )
12V : 27T ( 1.2 φ × 1 )
19
FAN7554
Mechanical Dimensions
Package
Dimensions in millimeters
8-SOP
Symbol
Min
-
Nom
Max
1.75
0.25
1.50
0.51
0.25
5.00
4.00
A
A1
A2
B
-
0.15
1.45
0.37
0.20
4.90
3.90
1.27BSC
5.99
-
0.10
1.25
0.35
0.19
4.80
3.80
C
D
E
e
H
5.79
0.25
0.50
6.20
0.50
0.90
h
L
0.70
0.36 BSC
-
GP
q
0
-
8
aaa
bbb
-
0.25
0.10
-
-
20
FAN7554
Mechanical Dimensions (Continued)
Package
Dimensions in millimeters
8-DIP
21
FAN7554
Ordering Information
Product Number
FAN7554
Package
8-DIP
Operating Temperature
-25°C ~ 85°C
FAN7554D
8-SOP
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
10/2/03 0.0m 001
Stock#DSxxxxxxxx
2003 Fairchild Semiconductor Corporation
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