FAN8006D3 [FAIRCHILD]
4-CH Motor Driver; 4 - CH电机驱动器
| 型号： | FAN8006D3 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 4-CH Motor Driver |
| 文件： | 总14页 (文件大小：235K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN8006D3
Features
Description
• 4-Channel BTL (Balanced transformer-less) driver
• Built-in thermal shutdown circuit
• Built-in power save circuit
The FAN8006D3 is a monolithic integrated circuit, suitable
for 4-CH motor driver which drives focus actuator, tracking
actuator, sled motor and loading motor of a CD-media sys-
tem.
• Separated power supply
• Operating supply voltage: 4.5V ~ 13.2V
• Corresponds to 3.3V or 5V DSP
28-SSOPH-375SG2
Target Application
Ordering Information
• Compact disk player
• Digital video disk player
• Compact disk ROM
Device
Package
Ope. Temp.
FAN8006D3 28-SSOPH-375SG2 −35°C ~ +85°C
FAN8006D3TF
28-SSOPH-375SG2 −35°C ~ +85°C
Rev. 1.0.0
©2002 Fairchild Semiconductor Corporation
FAN8006D3
FAN8006D3 Pin Assignments
FIN(GND)
FAN8006D3
FIN(GND)
28
27
26
22
21
20
19
25
24
23
18
17
16
15
1
2
3
5
6
7
8
9
10
11
12
13
4
14
2
FAN8006D3
Pin Definitions
Pin Number
Pin Name
BIAS
I/O
I
Pin Function Description
1
2
3
4
5
6
7
8
Bias voltage input
OPIN1(+)
OPIN1(−)
OPOUT1
IN2
I
Op-amp CH1 input (+)
Op-amp CH1 input (−)
Op-amp CH1 output
CH2 input
I
O
I
MUTE
I
CH1 mute control when STBY1 is logic high
CH2 standby control
Signal ground
STBY2
GND
I
-
9
PowVcc1 CH1
PowVcc2 CH2
VO2(−)
-
BTL CH1 power supply
BTL CH2 power supply
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
-
O
O
O
O
O
O
O
O
-
Drive2 output (
Drive2 output (+)
Drive1 output (
Drive1 output (+)
−)
VO2(+)
VO1(−)
−)
VO1(+)
VO4(+)
Drive4 output (
Drive4 output (
Drive3 output (
Drive3 output (−)
+)
VO4(−)
−)
VO3(+)
+)
VO3(−)
PowVcc3 CH3/4
STBY1
BTL CH3/4 power supply
Input for CH1/3/4 standby control
Ground
I
GND
-
OPOUT3
OPIN3(−)
OPIN3(+)
OPOUT4
OPIN4(−)
OPIN4(+)
PreVcc
O
I
Op-amp CH3 output
Op-amp CH3 input (−)
Op-amp CH3 input (+)
Op-amp CH4 output
Op-amp CH4 input (−)
Op-amp CH4 input (+)
Vcc for pre block
I
O
I
I
-
3
FAN8006D3
Internal Block Diagram
FIN
(GND)
28
27
+
26
25
24
+
23
22
21
20
19
18
17
16
15
−
−
TSD
+
+
−
−
−
−
+
+
20k
−
−
+
+
LEVEL
SHIFT
10k
20k
PowVcc
CH3/4
LEVEL
SHIFT
PowVcc
CH3/4
10k
10k
LEVEL
SHIFT
LEVEL
SHIFT
PowVcc CH1
PowVcc CH2
10k
20k
−
+
+
−
20k
−
−
+
+
−
−
+
+
−
+
2
1
3
4
5
6
7
8
9
10
11
12
13
14
(GND)
FIN
4
FAN8006D3
Equivalent Circuits (Continued)
POWER OUTPUT
CHANNEL OPAMP INPUT
9
10
19
28
28
28
2KΩ
2KΩ
11 12
13 14
15 16
17 18
2
3
25Ω
1KΩ
25Ω
1KΩ
24
27
23
26
CHANNEL OP-AMP OUTPUT
BIAS INPUT
28
28
20KΩ
20KΩ
28
10KΩ
25Ω
1
27p
25Ω
20KΩ
4
22 25
CHANNEL 2 INPUT
STANDBY 1/2 INPUT
28
28
28
28
28
20KΩ
20KΩ
20KΩ
1KΩ
25Ω
25Ω
7
20
10KΩ
25Ω
80KΩ
40KΩ
5
40KΩ
1KΩ
20KΩ
1KΩ
1KΩ
5
FAN8006D3
Equivalent Circuits
MUTE INPUT
28
6
40KΩ
25Ω
6
FAN8006D3
Absolute Maximum Ratings ( Ta=25°C)
Parameter
Symbol
Value
Unit
V
Maximum supply voltage
Power dissipation
PreVcc
15
max
note
PD
2.5
W
Operating temperature range
Storage temperature range
NOTE:
TOPR
TSTG
−35 ~ +85
°C
°C
−55 ~ +150
Pd is measured
base on the JE-
DEC/STD(JESD
51-2)
Epoxy board
Pd=2.5W
1. Test PCB is single layer PCB which has only 1 signal plane. PCB size is 76mm × 114mm × 1.6mm.
2. Power dissipation is reduced for using above Ta=25°C. It’s slope is -20.0mW/°C.
3. Do not exceed P and SOA (Safe Operating Area).
D
Pd (mW)
2,000
SOA
1,500
500
0
0
25
50
75
100
125
150
175
85
Ambient temperature, Ta [°C]
Recommended Operating Conditions ( Ta=25°C)
Parameter
Supply voltage
Symbol
PreVcc
Min.
4.5
4.5
4.5
4.5
Typ.
Max.
13.2
Unit
-
-
-
-
V
V
V
V
Supply voltage
Supply voltage
Supply voltage
PowVcc CH1
PowVcc CH2
PowVcc CH3/4
PreVcc
PreVcc
PreVcc
7
FAN8006D3
Electrical Characteristics
(Unless otherwise specified, Ta=25°C, PreV =12V, PowVcc CH1=PowVcc CH3/4=5V, PowVcc CH2=12V,
cc
RL=8Ω,24Ω)
Parameter
Quiescent current1
Symbol
ICC1
Conditions
Min.
Typ. Max.
Unit
mA
mA
mA
mA
mA
V
STBY1,2=0.5V,Mute=2V,RL=∞
-
0.1
1
31.0
8.5
17.0
24.5
-
STBY1,2=2V,Mute=0.5V,RL=∞
Quiescent current2
ICC2
-
22.0
STBY2=2V, STBY1,Mute=0.5V
Quiescent current3
ICC3
-
5.5
STBY2=0.5V, STBY1,Mute=2V
Quiescent current4
ICC4
-
-
12.0
STBY2,Mute=0.5V,STBY1=2V,
Quiescent current5
ICC5
17.5
Mute on voltage
VMON
VMOFF
VSTON1
VSTOFF1
VSTON2
VSTOFF2
-
-
-
-
-
-
2.0
-
-
-
-
-
-
-
Mute off voltage
0.5
0.5
-
V
STBY1 on voltage
-
V
STBY1 off voltage
2.0
-
V
STBY2 on voltage
0.5
-
V
STBY2 off voltage
2.0
V
BTL DRIVE CIRCUIT
Channel 1,3,4(RL=8Ω)
Output offset voltage 1,3,4
Maximum output voltage 1,3,4
Closed loop voltage gain 1,3,4
Ripple rejection ratio 1,3,4
Slew rate 1,3,4
VOF1,3,4
VOM1,3,4
GVC1,3,4
-
-
-
-
-
−50
3.6
17
-
-
+50
mV
V
4.0
18
60
1
-
19
-
dB
RR
SR
dB
1,3,4
1,3,4
-
-
V/µs
Channel 2(RL=24Ω)
Output offset voltage 2
Maximum output voltage 2
Closed loop voltage gain 2
Ripple rejection ratio 2
Slew rate 2
VOF2
-
-
-
-
-
−50
9.5
17
-
-
10.5
18
60
1
+50
mV
V
VOM2
GVC2
-
19
-
dB
RR
SR
dB
2
2
-
-
V/µs
INPUT OP-AMP
Input offset voltage
VOFOP
IBOP
-
-
−10
-
-
+10
mV
nA
V
Input bias current
-
400
High level output voltage
Low level output voltage
Output sink current
VOHOP
VOLOP
ISINK
PreVcc=5V, RL=∞
PreVcc=5V, RL=∞
PreVcc=5V, RL=50Ω
4.5
-
-
-
-
0.5
V
3
-
-
-
mA
mA
dB
dB
V/µs
dB
V
Output source current
Open loop voltage gain
Ripple rejection ratio
Slew rate
ISOURCE PreVcc=5V, RL=50Ω
2
-
GVO
RROP
SROP
V = -75dB, 1KHz
IN
-
75
60
1
80
-
-
V = 120KHz, 2V
IN PP
-
-
V = -20dB, 120Hz
IN
-
-
-
Common mode rejection ratio
Common mode input range
CMRR V = -20dB, 1KHz
IN
-
CMIR
PreVcc=5V
-0.3
4
8
FAN8006D3
Application Information
1. Standby/Mute Input
FAN8006D3 have 2 independent standby inputs that is , pin #7(STBY2) and pin #20(STBY1), and 1 independent mute
input(pin #7). The digital logics of these functions are as below.
STBY1=>Low
Mute=>Low Mute=>High
STBY1=>High
STBY2
Mute=>Low
Mute=>High
High
Low
CH 1
CH3/4
CH2
high impedance
-
-
-
-
standby
operate
-
operate
-
-
-
operate standby
2. Mute Timing Chart
If the mute input(pin #6) voltage rises above 2.0V, the output(CH1) current can be muted under normal operating conditions,
make sure to open pin #7 or pull it down below 0.5V. Below figure is high impedance mute timing chart.
PreVcc = 12V
Voltage
PowVcc CH1= 5V
BIAS = 1.65V
2[V]
RL = 8Ω
Mute(pin #6)
T
≤ 125µsec
m
0
time
T
m
Voltage
V
om
Vout
(pin#13,14)
0.5[mV]
0
time
9
FAN8006D3
3. CH2 Drive Output Schematic
−
M
11
12
DO
DO+
Inside IC
Power amp
10K
10K
−
−
−
R
10
PowVccCH2
+
Current Conveyor Type 2
R
PowVccCH2
20K
−
1
Bias
10K
5
• The reference voltage BIAS is given externally through pin 1.
• The input signal is amplified by (20K/10K) times and then fed to the current conveyor type 2 circuit and the power amp
circuit.
• The power amp circuit produces the differential output voltages and drives two output power amplifier circuits.
• Since the differential gain of the power amplifier is equal to 2 × (1+10K / 10K) , the output signal of the input OP-amp is
amplified totally 8.
• If the total gain is insufficient or large, external resistor can be used to adjust the gain.
10
FAN8006D3
4. CH1/3/4 Drive Output Schematic
−
M
13 16 18
14 15 17
DO
DO+
Inside IC
Power amp
10K
10K
−
−
−
R
19
9
+
PowVccCH1
(PowVccCH3/4)
Current Conveyor Type 2
R
PowVccCH1
(PowVccCH3/4)
20K
−
1
Bias
10K
−
4
22 25
23
3
26
2
24 27
• The reference voltage BIAS is given externally through pin 1.
• The input OP-amp output signal is amplified by (20K/10K) times and then fed to the current conveyor type 2 circuit and the
power amp circuit.
• The power amp circuit produces the differential output voltages and drives two output power amplifier circuits.
• Since the differential gain of the power amplifier is equal to 2 × (1+10K / 10K) , the output signal of the input OP-amp is
amplified totally 8.
• If the total gain is insufficient or large, the input OP-amp and the external resistors can be used to adjust the gain.
11
FAN8006D3
Application Circuits
(Voltage control mode)
BIAS
VOLTAGE
1
2
28
27
BIAS
PreVcc
12V
SERVO AMP
FOCUS
OPIN1(+)
OPIN4(+)
3
4
5
6
7
26
SLED
OPIN1(−)
OPOUT1
IN2
OPIN4(−)
OPOUT4 25
OPIN3(+) 24
TRACKING
LOADING
MUTE
23
22
OPIN3(−)
MUTE
STBY
STBY2
OPOUT3
FAN8006D3
8
9
21
20
19
18
17
16
15
GND
GND
STBY1
STBY1
PowVcc CH1
PowVcc CH3/4
10
11
12
PowVcc CH2
VO2(−)
VO3(−)
LOADING
MOTOR
SLED MOTOR
VO3(+)
VO2(+)
13 VO1(−)
VO4(−)
FOCUS
ACTUATOR
TRACKING
ACTUATOR
14
VO4(+)
VO1(+)
12
FAN8006D3
13
FAN8006D3
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
user.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
www.fairchildsemi.com
6/24/02 0.0m 001
Stock#DSxxxxxxxx
2002 Fairchild Semiconductor Corporation
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