FAN8026G3_NL [FAIRCHILD]
CD Motor Driver, 5 Channel, PDSO28, 0.375 INCH, LEAD FREE, HEAT SINK, SSOP-28;
| 型号： | FAN8026G3_NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | CD Motor Driver, 5 Channel, PDSO28, 0.375 INCH, LEAD FREE, HEAT SINK, SSOP-28 驱动 CD 光电二极管 接口集成电路 |
| 文件： | 总14页 (文件大小：250K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN8026G3
5-CH Motor Driver
Features
Description
• 5-CH Balanced transformerless (BTL) driver
• Operating supply voltage : 4.5 V ~ 13.2V
• Built-in thermal shut down circuit (TSD)
• Built-in channel mute circuit
The FAN8026G3 is a monolithic integrated circuit suitable
for a 5-CH motor driver which drives a tracking actuator, a
focus actuator, a sled motor, a spindle motor, and a tray
motor of the CDP/CAR-CD/DVDP systems.
• Built-in 1-OP AMP
28-SSOPH-375SG3
Typical application
Ordering information
• Compact disk player
Operating
Device
Package
• Video compact disk player
• Car compact disk player
• Digital video disk player
temp
FAN8026G3
FAN8026G3X
FAN8026G3_NL
FAN8026G3X_NL
28-SSOPH-375-SG2 -35°C ~ +85°C
28-SSOPH-375-SG2 -35°C ~ +85°C
28-SSOPH-375-SG2 -35°C ~ +85°C
28-SSOPH-375-SG2 -35°C ~ +85°C
note1
note2
Notes:
1. X : Tape&Reel
2. NL : Lead free
Rev. 1.0.0
©2004 Fairchild Semiconductor Corporation
FAN8026G3
Pin Assignments
DO5-
28
DO5+
27
DO4-
26
VM2
24
MUTE
23
REF
22
IN3
21
OUT3
20
SVCC DO1+
DO1-
17
DO2+
16
DO2-
15
DO4+
25
FIN
19
18
FAN8026G3
1
2
3
4
5
6
7
FIN
8
9
10
11
IN1
12
13
14
OPIN+ OPIN- OPOUT
IN5
OUT5
IN4
OUT4
GND
IN2
OUT2
VM1
DO3+
DO3-
2
FAN8026G3
Pin Definitions
Pin Number
Pin Name
I/O
I
I
O
I
O
I
O
-
I
O
I
-
O
O
O
O
O
O
-
O
I
I
I
-
O
O
O
O
Pin Function Description
1
2
3
4
OPIN+
OPIN-
OPOUT
IN5
OP-AMP Input(+)
OP-AMP Input(-)
OP-AMP Output
CH5 Op-amp Input(-)
CH5 Op-amp Output
CH4 Op-amp Input(-)
CH4 Op-amp Output
Ground
CH2 Op-amp Input(-)
CH2 Op-amp Output
CH1 Input
Power Supply Voltage(For CH2,CH3)
CH3 Drive Output(+)
5
6
OUT5
IN4
7
8
9
OUT4
GND
IN2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
OUT2
IN1
VM1
DO3+
DO3-
DO2-
DO2+
DO1-
DO1+
SVCC
OUT3
IN3
REF
MUTE
VM2
DO4+
DO4-
DO5+
DO5-
CH3 Drive Output(-)
CH2 Drive Output(-)
CH2 Drive Output(+)
CH1 Drive Output(-)
CH1 Drive Output(+)
Power Supply Voltage(For Signal,CH1)
CH3 Op-amp Output
CH3 Op-amp Input(-)
CH1,2,3,4,5 Input Reference
MUTE(CH2,3,4,5)
Power Supply Voltage(For CH4,CH5,Normal Op-amp)
CH4 Drive Output(+)
CH4 Drive Output(-)
CH5 Drive Output(+)
CH5 Drive Output(-)
3
FAN8026G3
Internal Block Diagram
VM2
1
2
OPIN+
OPIN-
3
OPOUT
SVCC
VM2
5
4
OUT5
IN5
10K
10K
27
28
DO5+
DO5-
SVCC
24
VM2
VM2
OUT4
IN4
7
6
10K
10K
25
26
DO4+
DO4-
8
SGND
TSD
SVCC
SVCC
SVCC
VM1
VM1
SVCC
20
21
OUT3
IN3
10K
10K
10K
10K
13
14
DO3+
DO3-
12
16
15
VM1
DO2+
DO2-
10
9
OUT2
IN2
10K
MUTE 23
CH2,3,4,5
19
18
17
SVCC
DO1+
DO1-
REF
IN1
22
11
4
FAN8026G3
Equivalent Circuits
BTL CH1 Input
BTL CH2,3,4,5 Op-amp Input
SVCC
SVCC
SVCC
SVCC
4
9
6
21
1K
100
1K
1K
11
BTL CH2,3,4,5 Op-amp Output
BTL CH1 Driver Output
SVCC SVCC
SVCC SVCC
5
7
20K
10 20
17
18
30K
BTL CH2,3 Driver Output
BTL CH4,5 Driver Output
SVCC VM1
SVCC VM2
20K
20K
13 14
25 26
15 16
27 28
30K
30K
5
FAN8026G3
Equivalent Circuits (Continued)
Mute
REF
SVCC
SVCC
SVCC
1K
40K
40K
50
40K
40K
22
23
Op-amp Input
Op-amp Output
VM2
VM2
VM2
VM2
VM2
3
1
2
1K
1K
6
FAN8026G3
Absolute Maximum Ratings ( Ta=25°C)
Parameter
Symbol
SVCC
VM1
Value
15
15
Unit
V
V
Maximum supply voltage
VM2
P
D
15
V
Power dissipation
Operating temperature
Storge temperature
Notes:
2.5note1,2,3
−35 ~ +85
−55 ~ +150
W
°C
°C
T
OPR
T
STG
1. When mounted on glass epoxy PCB (76 × 114 × 1.6mm)
2. Power dissipation is reduced at the rate of -20mW/°C for TA≥25°C.
3. Do not exceed Pd and SOA(Safe Operating Area).
Pd (mW)
3,000
2,000
SOA
1,000
0
0
25
50
75
100
125
150
175
Ambient temperature, Ta [°C]
Recommended Operating Conditions ( Ta=25°C)
Parameter
Symbol
SVCC
VM1
Min.
4.5
4.5
Typ.
Max.
13.2
SVCC
SVCC
Unit
V
V
Supply voltage1
Supply voltage2
Supply voltage3
-
-
-
VM2
4.5
V
7
FAN8026G3
Electrical Characteristics
(Unless otherwise specified, Ta=25°C, SVCC=8V, VM1=5V, VM2=5V, Vref=1.65V)
Parameter
Symbol
Conditions
MUTE Off
MUTE On
Pin23=Variation
Pin23=Variation
Pin22=Variation
Pin22=Variation
-
Min.
-
-
2.0
-
-
1.0
1.0
Typ. Max.
Unit
mA
mA
V
V
V
Quiescent current 1*note1
Quiescent current 2*note1
MUTE on voltage
I
21
12
-
-
-
-
CC1
I
CC2
Vmon
Vmoff
Vrmon
Vrmoff
Vrefin1
MUTE off voltage
-
-
-
0.5
0.4
-
Reference MUTE on voltage
Reference MUTE off voltage
REF Input voltage range
V
V
-
3.3
CH1 LOADING DRIVER CIRCUIT (RL=12Ω)
Output offset voltage1
Maximum output voltage1
Close-loop voltage gain1
V
Vom1
Gvf1
V =1.65V
IN
-50
6
10
-
+50
-
14
mV
V
dB
OF1
-
6.5
12
V =100mVpp, f=1kHz
IN
CH2,3 BTL DRIVER CIRCUIT (RL=8Ω)
Output offset voltage2,3,4,5
Maximum output voltage2,3,4,5
Close-loop voltage gain2,3,5
Close-loop voltage gain4
INPUT OP-AMP CIRCUIT
Input offset voltage1
V
V =1.65V
IN
-50
3.6
10.5
11.5
-
+50
-
14.5
15.5
mV
V
dB
dB
OF2,3,4,5
Vom2,3,4,5
Gvf2,3,5
Gvf4
-
4.0
12.5
13.5
V =100mVpp, f=1kHz
IN
V =100mVpp, f=1kHz
IN
V
-
-
-10
-
7
-
1
0.5
-0.3
-
-
-
-
-
-
-
-
-
-
75
65
1
+10
300
-
0.5
-
-
mV
nA
V
OF1
Input bias current1
I
B1
High level output voltage1
Low level output voltage1
Output sink current1
Output source current1
Common mode input range1*note1
Open loop voltage gain1*note1
Ripple rejection ratio1*note1
Slew rate1*note1
V
SVCC=8V
OH1
V
-
-
-
-
V
OL1
I
mA
mA
V
dB
dB
V/us
SINK1
I
SOU1
Vicm1
7.0
G
f=1kHz, V = -75dB
IN
f=120Hz, V = -20dB
IN
f=120Hz, 2Vp-p
-
-
-
VO1
RR1
SR1
Note:
1.Guaranteed field. ( No EDS/ Final test . )
8
FAN8026G3
Electrical characteristics (Countinued)
(Unless otherwise specified, Ta=25°C, SVCC=8V, VM1=5V, VM2=5V, Vref=1.65V)
Parameter
Symbol
Conditions
Min.
Typ. Max.
Unit
NORMAL OP-AMP CIRCUIT
Input offset voltage
Input bias current
V
I
-
-
-10
-
-
-
-
-
-
-
75
65
1
+10
300
-
0.5
-
-
mV
nA
V
OF2
-
4.5
-
B2
High level output voltage
Low level output voltage
Output sink current
Output source current
Common mode input range1*note1
Open loop voltage gain*note1
Ripple rejection ratio*note1
Slew rate*note1
V
VM2=5V
OH2
V
-
-
-
-
V
OL2
I
1
mA
mA
V
dB
dB
V/us
SINK2
I
0.5
-0.3
-
-
-
SOU2
Vicm1
G
RR2
SR2
4.0
f=1kHz, V = -75dB
IN
f=120Hz, V = -20dB
IN
f=120Hz, 2Vp-p
-
-
-
VO2
Note:
1.Guaranteed field. ( No EDS/ Final test . )
9
FAN8026G3
Application information
1. MUTE Function
When the mute pin is low(GND), the TR Q1 is turned on and the bias
circuit is enabled. On the other hand, when the mute pin is high , the TR
Q1 is turned off and the bias circuit is disabled.
Bias Current
CH2,3,4,5
23
It will make all the circuit blocks except CH1 off, so low power quies-
Q1
cent state can be established.
• Truth table is as follows
Pin 23
High
Low
FAN8026
Mute-On
Mute-Off
2. TSD Function
SVCC
• When the chip temperature reaches to 175°C by abnormal condition,
the TSD circuit is activated
IREF
Output driver
Bias
• This makes the bias current of the output drivers shut down, and all
the output drivers are on cut-off state. Therefore the chip temperature
begins to decrease.
• When the chip temperature falls to 155°C, the TSD circuit is
deactivated and the output drivers start to operate normally.
R1
R2
Q0
Hysteresis
Ihys
R3
3. Notice
• If REF(pin23) is lower than 0.7V, BTL output is off.
• Under voltage protecton function. ( If SVcc is lower than 3.8V, Chip is disable. Hysterisis is 0.2V)
• Mute on BTL output voltage is as followed:
- Mute on BTL output(CH2,3,4,5) = VM / 2
- Mute on BTL output CH1 = ((PVcc2-0.6) / 2
• Each output to output and output to GND short should be kept away.
10
FAN8026G3
Typical Application Circuit
DO3-
14
DO2-
15
Spindl
e
Motor
Sled
Motor
M
M
M
DO3+
VM1
13
12
16
17
DO2+
DO1-
Loadin
g
Motor
IN1
11
10
9
5V
18 DO1+
OUT2
IN2
19
20
SVCC
OUT3
8V
GND
8
21 IN3
OUT4
IN4
7
22 REF
6
5
23
24
MUTE
VM2
OUT5
5V
4
3
2
1
DO4+
IN5
25
Focus
Actuat
or
OPOUT
26 DO4-
Trackin
OPIN-
OPIN+
DO5+
DO5-
27
28
g
Actuato
r
SERVO
11
FAN8026G3
Test Circuits
A
A
A
A
A
A
V
V
V
V
28
27
25
24
23
22
FIN
20
19
18
17
16
15
21
26
FAN8026G3
1
2
3
4
5
6
7
FIN
8
9
10
A
11
A
12
A
13
14
V
IN+ IN- OUT
OP-AMP
A
A
A
A
A
OP-AMP
IN-
IN+
SW6
OUT
SW7
SW8
v
SW9
12
FAN8026G3
Package Dimension
28-SSOPH-375-SG2
13
FAN8026G3
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
3/17/04 0.0m 001
Stock#DSxxxxxxxx
2004 Fairchild Semiconductor Corporation
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