FAN8036-NL [FAIRCHILD]
5-CH Motor Driver + 2-Regulator; 5 - CH电机驱动器+ 2稳压
| 型号： | FAN8036-NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 5-CH Motor Driver + 2-Regulator |
| 文件： | 总23页 (文件大小：389K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN8036
5-CH Motor Driver + 2-Regulator
Features
Description
• 4-CH Balanced Transformerless (BTL) Driver
• 1-CH (Forward Reverse) Control DC Motor Driver
• Operating Supply Voltage (4.5V ~ 13.2V)
• Built in Thermal Shut Down Circuit (TSD)
• Built in Channel Mute Circuit
The FAN8036 is a monolithic integrated circuit suitable for
a 5-CH motor driver which drives the tracking actuator,
focus actuator, sled motor, spindle motor, and tray motor of
the CDP/CAR-CD/DVDP systems.
• Built in Power Save Mode Circuit
• Built in TSD Monitor Circuit
48-QFPH-1414
• Built in 2 Regulators
• Built in 2-OP AMPs
Typical Application
Ordering Information
• Compact Disk Player
Device
Package
Operating Temperature
-35°C ~ +85°C
• Video Compact Disk Player
• Car Compact Disk Player
• Digital Video Disk Player
FAN8036L
48-QFPH-1414
FAN8036_NL 48-QFPH-1414
-35°C ~ +85°C
Rev. 1.0.1
©2003 Fairchild Semiconductor Corporation
FAN8036
Pin Assignments
REGVCC
OPOUT2
FIN
IN1+
OPIN2-
OPIN1- OPOUT1 SVCC
OPIN1+
VREF
OPIN2+
PVCC1 DO1+
(GND)
43
37
38
48
47
46
45
44
42
41
40
39
IN1-
1
2
3
4
36
35
34
33
DO1-
DO2+
OUT1
IN2+
IN2-
DO2-
PGND1
5
6
32 REGO1
OUT2
RES1
31
REGO2
FIN
FIN
(GND)
FAN8036
(GND)
DO3+
30
RES2
7
8
29 DO3-
REGCTL
IN3+
28
DO4+
9
27
DO4-
IN3-
10
26
PGND2
OUT3
IN4+
11
12
25 DO5+
18
REV SGND
24
13
14
15
16
17
19
20
21
22
23
FIN
DO5-
TSD_M PVCC2
IN4- OUT4
CTL
FWD
MUTE123 MUTE4 PS
(GND)
2
FAN8036
Pin Definitions
Pin Number
Pin Name
IN1−
I/O
I
Pin Function Descrition
CH1 OP-AMP Input (−)
1
2
3
4
5
6
7
8
9
OUT1
IN2+
IN2−
OUT2
RES1
RES2
REGCTL
IN3+
IN3−
OUT3
IN4+
IN4−
OUT4
CTL
FWD
REV
SGND
MUTE123
MUTE4
PS
TSD-M
PVCC2
DO5−
DO5+
PGND2
DO4−
DO4+
DO3−
DO3+
REGO2
REGO1
O
I
I
O
I
I
I
I
I
O
I
I
O
I
I
I
-
I
I
I
O
-
O
O
-
O
O
O
O
O
O
CH1 OP-AMP Output
CH2 OP-AMP Input (+)
CH2 OP-AMP Input (−)
CH2 OP-AMP Output
Regulator1 Reset
Regulator2 Reset
Regulator2 Control Voltage
CH3 OP-AMP Input (+)
CH3 OP-AMP Input (−)
CH3 OP-AMP Output
CH4 OP-AMP Input (+)
CH4 OP-AMP Input (−)
CH4 OP-AMP Output
CH5 Motor Speed Control
CH5 Forward Input
CH5 Reverse Input
Signal Ground
Mute for CH1,2,3
Mute for CH4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Power Save
TSD Monitor
Power Supply Voltage 2 (for CH3,CH4,CH5)
CH5 Drive Ouptut (−)
CH5 Drive Output (+)
Power Ground 2 (for CH3,CH4,CH5)
CH4 Drive Ouptut (−)
CH4 Drive Output (+)
CH3 Drive Ouptut (−)
CH3 Drive Output (+)
Regulator2 Ouptut
Regulator1 Ouptut
3
FAN8036
Pin Definitions (Continued)
Pin Number
Pin Name
PGND1
DO2−
I/O
-
Pin Function Descrition
Power Ground 1 (for CH1, CH2)
CH2 Drive Ouptut (−)
CH2 Drive Output (+)
CH1 Drive Ouptut (−)
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
O
O
O
O
-
-
O
I
I
I
-
O
I
DO2+
DO1−
DO1+
CH1 Drive Output (+)
PVCC1
REGVCC
OPOUT2
OPIN2−
OPIN2+
VREF
Power Supply Voltage 1 (for CH1, CH2)
Regulator Supply Voltage( Regulator1,2)
Normal OP-AMP2 Output
Normal OP-AMP2 Input (−)
Normal OP-AMP2 Input (+)
Bias Voltage Input
Signal & OPAMPs Supply Voltage
Normal OP-AMP1 Output
Normal OP-AMP1 Input (−)
Normal OP-AMP1 Input (+)
CH1 OP-AMP Intput (+)
SVCC
OPOUT1
OPIN1−
OPIN1+
IN1+
I
I
4
FAN8036
Internal Block Diagram
FIN
REGVCC
OPIN2- OPOUT2
PVCC1 DO1+
OPIN1+
VREF
IN1+
OPIN1- OPOUT1 SVCC
46 45 44
(GND)
OPIN2+
43
37
48
47
42
41
40
39
38
REGVCC
IN1-
1
36
35
34
33
DO1-
2
DO2+
OUT1
IN2+
IN2-
3
4
DO2-
PGND1
REGO1
REGO2
REGVCC REGVCC
REGVCC REGVCC
5
6
32
31
OUT2
RES1
TSD
FIN
FIN
(GND)
(GND)
30
29
28
27
RES2
7
DO3+
REGCTL
IN3+
8
9
DO3-
DO4+
10
DO4-
IN3-
OUT3
IN4+
D
D
M
S
C
+
-
26
25
S
W
11
12
PGND2
DO5+
MUTE123 MUTE4
PS
TSD_M
18
FWD REV SGND
24
13
14
15
16
17
19
20
21
22
23
FIN MUTE123
(GND)
DO5-
IN4- OUT4
CTL
MUTE4 PS TSD_M PVCC2
5
FAN8036
Equivalent Circuits
Description
Pin No
Internal Circuit
VCC
VCC
BTL INPUT
&
2K
2K
48,3,9,12,47
1,4,10,13,46
48
9
3
1
4
OP AMP1 INPUT
12
47
10 13
46
VCC
VCC
5K
5K
OP AMP2 INPUT
41,42
42
41
VCC
VCC
5K
1K
1K
43
VREF
43
VCC VCC
BTL OP AMP OUT
OP AMP1 OUT
2
5
2,5,11,14,45
11 14
45
6
FAN8036
Equivalent Circuits (Continued)
Description
Pin No
Internal Circuit
VCC
VCC
OP AMP2 OUT
40
0.05K
0.05K
40
VCC
20K
19
20
MUTE123,4
19,20
50K
50K
VCC
CTL
15
1K
15
39K
20k
22
TSD-M
22
7
FAN8036
Equivalent Circuits (Continued)
Description
Pin No
Internal Circuit
VCC
100k
PS
21
50K
50K
21
VCC
30K
30K
30K
FWD,REV
16,17
30K
16 17
freewheeling diode
vccVCC VCC
BTL CH1,2,3,4
OUTPUT
27 28
29 30
34 35
36 37
27,28,29,30,
34,35,36,37
40K
7K
parastic diode
freewheeling diode
vcc
VCC VCC
BTL CH5
OUTPUT
24 25
24,25
60K
7K
parastic diode
8
FAN8036
Equivalent Circuits (Continued)
Description
Pin No
Internal Circuit
39
REGVCC
10K
REGO1,2
31,32
31
32
10K
10K
VCC
6
7
50K
50K
RES1,2
6,7
VCC VCC
REGCTL
8
2K
8
10K
9
FAN8036
Absolute Maximum Ratings ( Ta=25°C)
Parameter
Symbol
SVCC
Value
18
Unit
V
MAX
PVCC1
PVCC2
REGVCC
18
V
V
V
W
°C
°C
A
Maximum Supply Voltage
18
18
Power Dissipation
P
D
3note
Operating Temperature
Storge Temperature
Maximum Output Current
T
OPR
−35 ~ +85
−55 ~ +150
1
T
STG
I
OMAX
Note:
1. When mounted on the PCB of which size is 114mm × 76mm × 1.6mm.
2. Power dissipation is derated with the rate of -24mW/°C for TA≥25°C.
3. Do not exceed P and SOA.
D
Pd (mW)
3,000
2,000
1,000
0
0
25
50
75
100
125
150
175
Ambient temperature, Ta [°C]
Recommended Operating Conditions ( Ta=25°C)
Parameter
Symbol
Min.
Typ.
Max.
13.2
13.2
13.2
13.2
Unit
SVCC
4.5
-
-
-
-
V
V
V
V
PVCC1
PVCC2
SV
SV
CC
CC
Operating Supply Voltage
REGVCC
7
10
FAN8036
Electrical Characteristics
(SV
=5V, PV
CC1
= PV = 8V, T = 25°C, unless otherwise specified)
CC2 A
CC
Parameter
Symbol
Conditions
Under no-load
Under no-load
Pin21 = Variation
Pin21 = Variation
Pin19 = Variation
Pin19 = Variation
Pin20 = Variation
Pin20 = Variation
Min. Typ. Max. Unit
Quiescent Circuit Current
Power Save On Current
Power Save On Voltage
Power Save Off Voltage
Mute123 On Voltage
Mute123 Off Voltage
Mute4 On Voltage
Mute4 Off Voltage
I
-
-
-
2
-
20
-
-
-
-
-
-
-
1
0.5
-
0.5
-
mA
mA
V
V
V
CC
*note1
I
PS
V
PSON
V
PSOFF
V
MON123
V
2
-
V
V
MOFF123
V
0.5
-
MON4
V
2
-
V
MOFF4
BTL DRIVER CIRCUIT
Output Offset Voltage
V
V
= 2.5V
-100
4.5
5.5
16.8
-
-
+100 mV
OO
IN
R = 10Ω, CH1,2
L
Maximum Output Voltage1
Maximum Output Voltage2
Closed-loop Voltage Gain
Ripple Rejection Ratio*note2
Slew Rate*note2
V
V
6.0
6.5
18
60
2
-
-
V
V
OM1
OM2
L
R = 18Ω, CH3,4,5
A
RR
SR
V
IN
V
IN
= 0.1Vrms
= 0.1Vrms, f = 120Hz
19.2
-
-
dB
dB
V/µs
VF
Square, Vout = 4Vp-p
1
INPUT OPAMP CIRCUIT
Input Offset Voltage1
Input Bias Current1
High Level Output Voltage1
Low Level Output Voltage1
Output Sink Current1
V
I
-
-
-
-
-10
-
4.4
-
1
1
-0.3
-
-
-
-
-
-
+10
400
-
0.5
-
-
mV
nA
V
OF1
B1
V
4.7
0.2
2
2
-
80
65
80
1.5
OH1
V
V
OL1
I
R = 50Ω
R = 50Ω
L
mA
mA
V
dB
dB
dB
V/µs
SINK1
L
Output Source Current1
Common Mode Input Range1*note2
Open Loop Voltage Gain1*note2
Ripple Rejection Ratio1*note2
I
SOU1
Vicm1
G
RR1
-
4.0
V
IN
V
IN
V
IN
= −75dB
-
-
-
-
VO1
= −20dB, f = 120Hz
= −20dB
Square, Vout = 3Vp-p
Common Mode Rejection Ratio1*note2 CMRR1
Slew Rate1*note2
SR1
Note :
1. When the voltage at pin 39 goes below 0.5V, the power save circuit makes the main bias current sources stop operating. As
a result, the whole circuits are disable. ( The whole circuits mean the driver circuit, the input OP amp circuit, and the normal
OP amp circuit.)
2. Guaranteed field.(No EDS/Final test)
11
FAN8036
Electrical Characteristics (Continued)
(SV
= 5V, PV
= PV = 8V, T = 25°C, unless otherwise specified)
CC2 A
CC
CC1
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
NORMAL OP AMP CIRCUIT 1
Input Offset Voltage 2
Input Bias Current 2
V
I
-
-
-
-
-10
-
4.4
-
2
2
-0.3
-
-
-
-
-
-
+10
400
-
0.5
-
-
mV
nA
V
OF2
B2
High Level Output Voltage 2
Low Level Output Voltage 2
Output Sink Current 2
Output Source Current 2
Common Mode Input Range 2*note
Open Loop Voltage Gain 2*note
Ripple Rejection Ratio 2*note
Common Mode Rejection Ratio 2*note
Slew Rate 2*note
V
OH2
4.7
0.2
4
4
-
80
65
80
1.5
V
V
OL2
I
R = 50Ω
R = 50Ω
L
mA
mA
V
dB
dB
dB
V/µs
SINK2
L
I
SOU2
Vicm2
G
RR2
CMRR2
SR2
-
4.0
V
V
V
= −75dB
-
-
-
-
VO2
IN
IN
IN
= −20dB, f = 120Hz
= −20dB
Square, Vout = 3Vp-p
NORMAL OP AMP CIRCUIT 2
Input Offset Voltage 3
Input Bias Current 3
V
I
-
-
-
-
-15
-
-
+15
400
-
mV
nA
V
OF3
-
3
-
10
10
-
-
-
-
B3
High Level Output Voltage 3
Low Level Output Voltage 3
Output Sink Current 3
Output Source Current 3
Open Loop Voltage Gain 3*note
Ripple Rejection Ratio 3*note
Common Mode Rejection Ratio 3*note
Slew Rate 3*note
V
OH3
3.8
1.0
-
V
1.5
V
OL3
I
R = 50Ω
-
-
-
-
-
-
mA
mA
dB
dB
dB
V/µs
SINK3
L
I
R = 50Ω
-
SOU3
L
G
VO3
RR3
CMRR3
SR3
V
V
V
= −75dB
80
65
80
1.5
IN
IN
IN
= −20dB, f = 120Hz
= −20dB
Square, Vout = 3Vp-p
TRAY DRIVE CIRTUIT
Input High Level Voltage
Input Low Level Voltage
V
V
-
-
2
-
-
-
-
V
V
IH
0.5
IL
PV
= 8V, V
= 3V,
CC2
CTL
Output Voltage 1
V
V
-
-
-
6
3
-
-
V
V
O1
O2
R = 45Ω
L
PV
= 8V, V
= 1.5V,
CC2
CTL
Output Voltage 2
R = 10Ω
L
V
=3V, I =100mA →
L
CTL
Output Load Regulation
∆V
300
700
mV
RL
400mA
Output Offset Voltage 1
Output Offset Voltage 2
V
V
V
V
= 5V, 5V
= 0V, 0V
-40
-40
-
-
+40
+40
mV
mV
OO1
IN
IN
OO2
Note: Guaranteed field.(No EDS/Final test)
12
FAN8036
Electrical Characteristics (Continued)
(SV
= 5V, PV
CC1
= PV = 8V, T = 25°C, unless otherwise specified)
CC2 A
CC
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
REGULATOR1 CIRCUIT(REGVCC=8V)
Load regulation
Line regulation
Regulator output voltage 1
Regulator reset on voltage 1
Regulator reset off voltage 1
Ripple Rejection 1*note
∆V
∆V
I =0→ 200mA
I =200mA,V 7V→ 9V
L =
-80
-20
4.75
-
2
-
0
0
5.0
-
-
55
0
+30
5.25
0.5
SVCC
-
mV
mV
V
V
V
RL1
L
CC1
V
I =100mA
REG1
L
Reson1
Resoff1
RR1
Pin6=Variation
Pin6=Variation
Vin=1Vp-p, f=120Hz
dB
REGULATOR2 CIRCUIT(REGVCC=8V)
Load regulation
Line regulation
∆V
∆V
I =0→ 200mA
-80
-20
1.5
0
0
-
0
+30
4.5
mV
mV
V
RL2
L
I =200mA,V 7V→ 9V
CC2
L
=
Regulator output voltage 2 range
V
I =100mA
L
REG2R
I =100mA,V
=0V
=1.9V
1.482 1.56 1.638
3.135 3.3 3.465
V
V
L
REGCTL
Regulator output voltage 2
V
REG2
I =100mA,V
L
REGCTL
Regulator reset on voltage 2
Regulator reset off voltage 2
Control Gain
Reson2
Resoff2
Pin7=Variation
Pin7=Variation
-
2
-
-
0.5
SVCC
V
V
V/V
dB
G
-
0.75 0.95 1.15
55
REGCTL
RR2
Ripple Rejection 2*note
Vin=1Vp-p, f=120Hz
-
-
Note: Guaranteed field.(No EDS/Final test)
13
FAN8036
Application Information
1. Thermal Shutdown
SVCC
• The TSD circuit is activated at the junction temperature of 160°C and
deactivated at 135°C with the hysteresis of 25°C. During the thermal
shutdown, the TSD circuit keeps all the output driver off.
IREF
Output driver
Bias
R1
R2
Q0
Hysteresis
Ihys
R3
2. CH Mute Function
• When the mute pin is high, the TR Q1 is on and Q2 is off, so the bias
circuit is enabled. When the mute pin is low (GND), the TR Q1 is off
and Q2 is on, so the bias circuit is disabled.
SVCC
Bias Blocks
(4-CH BTL)
• During the mute on state, all the circuit blocks except for the variable
regulator remain off, and the low power quiescent state is established.
• Truth table is as follows;
Q2
19 20
MUTE
Pin 19, 20
High
Mute
Mute-Off
Mute-On
Q1
Low
3. Power Save Function
• When the pin21 is high, the TR Q3 becomes on and Q4 off, so the bias
circuit is enabled. When the pin21 is low (GND) , the TR Q3 becomes
off and Q4 is on, so the bias circuit is disabled.
• During the power save on state, this function keeps all the circuit
blocks off, and the low power quiescent state is established.
• Truth table is as follows;
SVCC
Main Bias
Q4
21
Q3
Pin21
High
Low
Power Save
Power Save Off
Power Save On
4. TDS Monitor Function
• Pin 22 is TSD monitor pin, which detects the state of the TSD block
and generates the TSD-monitor signal.
SVCC
VCC
• In the normal state Q5 is on, and Q6 is off. When the TSD block is
activated Q5 becomes off, and thus the voltage of pin22 keeps low.
• Truth table is as follows;
R(external)
20K
22
TSD
Pin22
High
Low
Q6
TSD Off
Q5
TSD On
14
FAN8036
5. Focus, Tracking Actuator, Spindle, Sled Motor Drive Part
40K
VREF
10K
43
DO+
37 35 30 28
10K
40K
IN+
IN-
48
1
3
4
9
12
13
Vin
M
Vp
10
40K
10K
10K
OUT
2
5
11
14
36 34 29
27
DO-
PVCC1(PVCC2)
+
VDP
-
40K
60K
Vp
62K
QP
• The Vref at pin 43 is for eliminating the dc components from the input signals and can set by an exteranl circuit.
• The voltage gain from Vin to output is as follows ;
Vin = Vref + ∆V
DOP= VD + 4∆V
DON= VD–4∆V
Vout = DOP – DON= 8∆V
Vout
------------
Gain = 20log
= 20log8= 18dB
∆V
• Where ∆V means just ac component.
• The total input to output voltage gain is the sum of the input OP amp network gain and 18dB.
• The output stage is the balanced transformerless (BTL) driver.
• The bias voltage Vp is expressed as ;
62k
-------------------------
VP = (PVCC1 – VDP – VCESATQP) ×
PVCC1 – VDP – VCESATQP
+ VCESATQP
60k + 62k
- - - - - - - - - -
(1)
= ------------------------------------------------------------------------- + VCESATQP
1.97
15
FAN8036
6. Tray, Changer,panel Motor Drive Part
out 1
24
out 2
25
M
D
D
LEVEL SHIFT
M.S.C
6.0V
V(out1,out2)
CTL
15
S.W
0
3.0V
V
CTL
IN
IN
FWD
16
REV
17
• Rotational direction control
The forward and reverse rotational direction is controlled by FWD (pin16) and REV (pin17) and the input conditions are as
follows;
INPUT
OUTPUT
FWD
REV
H
L
OUT 1
OUT 2
Vp
State
Brake
Forward
H
H
L
Vp
H
L
L
H
H
Reverse
L
L
-
-
Hign impedance
• Where Vp(Power reference voltage) is approximately 3.75V at PV
=8V according to equation (1).
CC2
• Motor speed control (When SV =5V, PV
CC
=8V)
CC2
- The maximum torque is obtained when the pin15(CTL) is open.
- If the voltage of the pin15 (CTL) is 0V, the motor will not operate.
- When the control voltage (pin15) is between 0 and 3.0V, the differential output voltage V(out1,out2) is about two times
of control voltage. The output gain is 6dB.
- When the control voltage is greater than 3.0V, the output voltage is saturated at the 6.0V because of the output swing
limitation.
16
FAN8036
7. Regulator1 Part
REGVCC
REGVCC
39
VREF1
2.5V
REGO1
32
6
RES1
R1
R2
10K
10K
33uF
• The output voltage of the regulator1 is fixed to 5V.
• When power save on or TSD on, regulator1 is disabled.
• Truth table is as follows;
RES1(Pin6)
HIGH
REGO1
Active
LOW
Deactive
17
FAN8036
8. Regulator2 Part
REGVCC
REGVCC
REGO2
4.2V
39
VREF2
2.5V
Gain=0.95
REGO2
31
7
RES2
10K
40K
R3
R4
1.77V
1.56V
33uF
8
REGCTL
0.3V
REGCTL
• The output of the regulator2 is variable.
• The input impedance of the REGCTL pin is 50kΩ.
• The REGCTL input circuit is as follows;
VCC
FAN8036
R1
8
REGCTL
R2
50K
• The output voltage(VREGO2) is decided as follows;
VREGO2 = (1.56V +VREGCTL )× 0.95
• When the REGCTL pin is connect to the ground or open, the regulator output voltage becomse1.56V.
• When power save on or TSD on, regulator2 is disabled.
• Truth table is as follows;
RES2(Pin7)
HIGH
REGO2
Active
LOW
Deactive
18
FAN8036
Test Circuits
VCC
PVCC1
REGVCC
OP-AMP
OP-AMP
VREF
IN+
IN-
OUT
IN+
IN-
OUT
48
47
46
45
44
43
42
41
40
39
38
PVCC1
37
IN+
IN1+ OPIN1+ OPIN1- OPOUT1 SVCC VREF
IN1-
OPIN2+
OPIN2- OPOUT2
REGVCC
DO1+
OP-AMP
RL1
RL2
1
2
36
35
IN-
DO1-
OUT1
DO2+
OUT
IN+
3
4
DO2- 34
IN2+
IN2-
OP-AMP
PGND1
REGO1
REGO2
33
32
IN-
OUT2
5
OUT
IL1
6
31
RES1
VRES1
FAN8036
IL2
DO3+
DO3-
DO4+
RES2
7
30
VRES2
RL3
RL4
8
9
29
28
REGCTL
IN3+
VREGCTL
IN+
OP-AMP
DO4- 27
10
11
IN3-
OUT3
IN4+
IN-
PGND2
26
25
OUT
DO5+
12
RL5
PS
TSD-M PVCC2 DO5-
IN4- OUT4 CTL
FWD
REV SGND
18
MUTE123 MUTE4
13
16
19
20
24
14
15
17
21
22
23
IN+
IN-
OUT
VMU123
VMU4 V PS
VCTL VFWD VREV
OP-AMP
PVCC2
OP-AMP
IN+
IN-
OUT
SW1
SW2
VCC
RL
SW4
VPULSE
SW3
VAC
VDC
VB
VA
19
FAN8036
Typical Application Circuits 1
[Voltage control mode]
SVCC
REGVCC PVCC1
48
47
46
45
44
43
42
41
40
39
38
37
FOCUS
DO1- 36
IN1-
1
2
3
4
5
6
35
34
33
32
31
DO2+
DO2-
OUT1
IN2+
TRACKIN
G
PGND1
REGO1
REGO2
IN2-
REGO1
REGO2
OUT2
RES1
FAN8036
RES2
REGCTL
IN3+
DO3+
DO3-
DO4+
30
29
28
7
8
VCC
M
M
SLED
9
IN3-
DO4- 27
10
11
12
SPINDLE
26
OUT3
IN4+
PGND2
25
DO5+
M
TRAY
13
14
15
16
17
18
19
20
21
22
23
24
PVCC2
VCC
FOCUS
REG1 REG2
RESET RESET
TRAY
CONTROL
TRAY
INPUT
VREF FOCUS TRACKING SLED SPINDLE
SPINDLE POWER TSD_M
MUTE SAVE
TRACKING
SLED
MUTE
INPUT
INPUT
INPUT
INPUT
[SERVO PRE AMP]
[CONTROLLER]
20
FAN8036
Typical Application Circuits 2
[Differential PWM control mode ]
REGVCC
PVCC1
SVCC
48
47
46
45
44
43
42
41
40
39
38
37
FOCUS
DO1-
DO2+
DO2-
36
35
34
33
32
31
IN1-
1
2
3
4
5
6
OUT1
IN2+
TRACKING
PGND1
REGO1
REGO2
IN2-
REGO1
REGO2
OUT2
RES1
FAN8036
RES2
REGCTL
IN3+
DO3+
DO3-
DO4+
30
29
28
7
8
VCC
M
M
SLED
9
IN3-
DO4- 27
10
11
12
SPINDLE
26
OUT3
IN4+
PGND2
25
DO5+
M
TRAY
13
14
15
16
17
18
19
20
21
22
23
24
PVCC2
VCC
SPINDL
E
INPUT
TRAY
INPUT
FOCUS
TRACKING
SLED
SPINDLE POWER
TSD_M
VREF FOCUS TRACKING SLED
REG1
REG2
TRAY
MUTE
SAVE
INPUT
INPUT INPUT
RESET RESET CONTROL
MUTE
[SERVO PRE AMP]
[CONTROLLER]
Notes:
Radiation pin is connected to the internal GND of the package.
21
FAN8036
Mechanical Dimensions
Package
48-QFPH-1414
17.20 0.30
14.00 0.20
#48
#1
(0.825)
+0.10
0.30 -0.05
0.10MAX
0.65
0.10MAX
0.80 0.20
22
FAN8036
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/22/03 0.0m 001
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2003 Fairchild Semiconductor Corporation
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