FAN8303MX [FAIRCHILD]
2A 23V Non-Synchronous Step-Down DC/DC Regulator; 2A 23V非同步降压型DC / DC稳压器
| 型号： | FAN8303MX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 2A 23V Non-Synchronous Step-Down DC/DC Regulator |
| 文件： | 总12页 (文件大小：631K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
December 2008
FAN8303
2A 23V Non-Synchronous Step-Down DC/DC Regulator
Features
Description
The FAN8303 is a monolithic, non-synchronous, step-
down (buck) regulator with internal power MOSFETs. It
achieves 2A continuous output current over a wide input
supply range with excellent load and line regulation.
Current-mode operation provides fast transient
response and eases loop stabilization. Fault condition
protection includes cycle-by-cycle current limiting and
thermal shutdown. The regulator draws less than 40µA
2A Output Current
0.22Ω Internal Power MOSFET Switch
Wide 5V to 23V Operating Input Range
Output Adjustable from 0.6 to 20V
Stable with Low ESR Output Ceramic Capacitors
Up to 90% Efficiency
shutdown current. FAN8303 requires
a minimum
number of readily available standard external components.
Less than 40µA Shutdown Current
Fixed 370kHz Frequency
External compensation, enable, and programmable
soft-start features allow design optimization and
flexibility. Cycle-by-cycle current limit, frequency
foldback, and thermal shutdown provide protection
against shorted outputs.
Thermal Shutdown with Hysteresis
Cycle-by-Cycle Over-Current Protection
Available in 8-Pin SOIC Package
C
BS
10nF
INPUT
5~23V
Applications
C
IN
10 µF
VIN
BS
L
1
Set-Top Box
15µH
ENABLE
SHUTDOWN
OUTPUT
2.5V/2A
EN
SS
SW
DSL and Cable Modems
Distributed Power Systems
Consumer Appliances (DVD)
Auxiliary supplies
D1
FAN8303
FB
R
18k
2
COMP
GND
C
OUT
22µF
C
SS
R
3
10nF
5.6k
R
C
C
A
22k
OPEN
C
C
1nF
Figure 1. Typical Application
Ordering Information
Part Number
Operating Temperature Range
Package
Packing Method
Eco Status
RoHS
FAN8303MX
-40°C to +85°C
8-SOIC
Reel
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
Internal Block Diagram
Figure 2. Functional Block Diagram
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
2
Pin Configuration
BS
SS
EN
VIN
SW
COMP
FB
GND
Figure 3.
Pin Configuration (Top View)
Pin Definitions
Name
Pin #
Type
Bootstrap
Description
High-Side Drive BOOT Voltage. Connect through capacitor (CBS) to SW.
The IC includes an internal synchronous bootstrap diode to recharge the
capacitor on this pin to VCC when SW is LOW.
BS
1
Power Input. This pin needs to be closely decoupled to the GND pin with a
10µF or greater ceramic capacitor.
VIN
2
3
Supply Voltage
Switch
Power Switching Output. SW is the switching node that supplies power to
the output.
SW
Power Return and Signal Ground for the IC. All internal control voltages
are referred to this pin. Tie this pin to the ground island / plane through the
lowest impedance connection. This pin is the ground reference for the
regulated output voltage.
GND
4
Ground
Feedback Input. This pin is the center tap of the external feedback voltage
resistive divider across the output.
FB
5
6
Feedback
Compensation Node. Frequency compensation is accomplished at this
node by connecting a series R-C to ground.
COMP
Compensation
Enable Input. EN is a digital input that turns the regulator on or off. Drive
EN HIGH to turn on the regulator, drive it LOW to turn it off. For automatic
startup, leave EN unconnected.
EN
SS
7
8
Enable
External Soft-Start. A capacitor connected between this pin and GND can
be used to set soft-start time.
Soft Start
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are
given with respect to the network ground terminal. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device
Symbol
Parameter
Min.
Max.
Unit
V
VIN
Supply Voltage, VIN to GND
25
VSW
VBS
VFB
VEN
VCOMP
VSS
ΘJA
ΘJC
TJ
Switch Voltage, SW to GND
Boost Voltage
-0.3
VIN+0.3
VSW + 6
6.0
V
V
V
Feedback Voltage
Enable Voltage
-0.3
-0.3
-0.3
-0.3
6.0
V
Compensation Voltage
Soft-Start Voltage
6.0
V
6.0
V
Thermal Resistance, Junction-Air
Thermal Resistance, Junction-Case
Operating Junction Temperature
Lead Temperature (Soldering, 5 Seconds)
Storage Temperature Range
105
°C/W
°C/W
°C
°C
°C
40
-40
+125
+260
+150
TL
TSTG
-65
3.0
Human Body Model, JEDEC JESD22-A114
Electrostatic Discharge
Protection Level
ESD
kV
Charged Device Model, JEDEC JESD22-
C101
2.5
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
VIN
Parameter
Min
5
Max.
23
Unit
V
Supply Voltage
Operating Ambient Temperature
TA
-40
+85
°C
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
4
Electrical Characteristics
VIN=12V, TA= -40 to +85°C, unless otherwise noted.
Symbol
VFB
Parameter
Feedback Voltage
Condition
Min.
Typ. Max. Unit
25°C, 5V<VIN<23V
0.58
0.60
0.22
4
0.62
V
Ω
RON_H
RON_L
ILKG
Upper Switch On Resistance
Lower Switch On Resistance
Upper Switch Leakage Current
Peak Inductor Current
Ω
VEN=0V,VSW=0V
0
10
µA
A
IPK
3.5
370
4.6
45
fOSC
Oscillator Frequency
VFB>0.3V
Rising VIN
VFB<0.3V
315
4.2
25
435
5.0
55
kHz
V
VUVLO
fSHORT
DMAX
TON_MIN
VEN
Under-Voltage Lockout
Short Circuit Frequency
Maximum Duty Cycle
kHz
%
90
Minimum On Time
210
1.6
150
10
ns
Enable Threshold
1.2
2.0
V
VEN_H
IOFF
Enable Threshold Hysteresis
Supply Current (Shutdown)
Supply Current (Quiescent)
Current Sense Gain
mV
µA
mA
A/V
µA/V
V/V
µA
°C
VEN=0V
40
IQ
VEN>1.6V; VFB=0.8V
1.0
2
2.0
GCS
GEA
Error Amplifier Transconductance
Error Amplifier Voltage Gain
Soft-Start Current
380
400
6
AVEA
ISS
TSD
Thermal Shutdown Temperature
155
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
5
Typical Performance Characteristics
VIN = 12V, VOUT = 5V, L1 = 15μH, CIN = 10μF, COUT = 22μF, TA = +25oC, unless otherwise noted.
CH1(VO) : 2V, 50µs/div.
CH2(EN) : 4V, 50µs/div.
CH3(SW) : 6V, 50µs/div.
CH4(IL) : 1A, 50µs/div.
CH1(VO) : 2V, 500µs/div.
CH2(EN) : 4V, 500µs/div.
CH3(SW) : 6V, 500µs/div.
CH4(IL) : 1A, 500µs/div.
CH2
CH2
CH1
CH3
CH4
CH1
CH3
CH4
Figure 4. EN Startup with 2A Load
Figure 5. EN Turn-off with 2A Load
CH1
CH1
CH2
CH3
CH2
CH3
CH1(VO) : 2V, 1ms/div.
CH2(VIN) : 4V, 1ms/div.
CH3(SW) : 6V, 1ms/div.
CH4(Io) : 1A, 1ms/div.
CH1(VO) : 2V, 200µs/div.
CH2(VIN) : 4V, 200µs/div.
CH3(SW) : 6V, 200µs/div.
CH4(Io) : 1A, 200µs/div.
CH4
CH4
Figure 6. Power-on with 2A Load
Figure 7. Power-off with 2A Load
CH1(VO) : 5V offset
CH1(VO) : 5V offset
200mV, 50µs/div.
200mV, 50µs/div.
CH2(COMP) : 300mV, 50µs/div.
CH3(SW) : 10V, 50µs/div.
CH4(Io) : 1A, 50µs/div.
CH2(COMP) : 300mV, 50µs/div.
CH3(SW) : 10V, 50µs/div.
CH4(Io) : 1A, 50µs/div.
CH1
CH1
CH4
△Vo = 204mV
△Vo = 240mV
Slew Rate( 2.5A/µs)
Slew Rate( 2.5A/µs)
CH4
CH3
CH2
CH3
CH2
Figure 8. Load Transient Response (0.5A to 1.5A)
Figure 9. Load Transient Response (1.5A to 0.5A)
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
6
Typical Performance Characteristics (Continued)
VIN = 12V, VOUT = 5V, L1 = 15μH, CIN = 10μF, COUT = 22μF, TA = +25oC, unless otherwise noted.
Δf=45kHz
CH1
CH1
CH2
CH2
CH1(VO) : 2V, 20µ/div.
CH2(VIN) : 4V, 20µs/div.
CH3(SW) : 6V, 20µs/div.
CH4(IL) : 2A, 20µs/div.
CH1(VO) : 2V, 20µ/div.
CH2(VIN) : 4V, 20µs/div.
CH3(SW) : 6V, 20µs/div.
CH4(IL) : 2A, 20µs/div.
CH4
CH4
Figure 10. Hard-Short at Output (OCP)
Figure 11. Overload at Output (OCP)
1
0.5
0
95
5.0Vo
3.3Vo
90
85
80
75
70
2.5Vo
1.8Vo
-0.5
-1
-1.5
-40
-15
10
35
60
85
0
0.5
1
1.5
2
Temperature [℃]
Load Current [A]
Figure 13. Normalized Output Voltage vs.
Temperature
Figure 12. Efficiency Curve
4
3.5
3
380
370
360
350
340
330
320
2.5
2
-40
-15
10
35
60
85
0
20
40
60
80
100
Temperature [℃]
Duty [%]
Figure 14. Oscillator Frequency vs. Temperature
Figure 15. Current Limited Level vs. Duty Ratio
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
7
Functional Description
The FAN8303 is
a monolithic, non-synchronous,
Inductor Selection
A higher inductor value lowers ripple current. The
inductor value can be calculated as:
current-mode, step-down regulator with internal power
MOSFETs. It achieves 2A continuous output current
over a wide input supply range from 5V to 23V with
excellent load and line regulation. The output voltage
can be regulated as low as 0.6V. The FAN8303 uses
current-mode operation that provides fast transient
response and eases loop stabilization. The FAN8303
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
VIN
L =
1−
(1)
fS ⋅ ΔIL
requires
standard external components.
a minimum number of readily available
where:
fs is the switching frequency;
VOUT is the output voltage;
Current Mode PWM Control Loop
FAN8303 uses current-mode PWM control scheme.
The peak inductor current is modulated in each
switching cycle by an internal op-amp output signal to
achieve the output voltage regulation. An internal slope
compensation circuit is included to avoid sub-harmonic
oscillation at duty cycle greater than 50%. Current-
mode control provides cycle-by-cycle current limit
protection and superior regulation control loop response
compared to the traditional voltage-mode control.
V
IN is the input supply voltage; and
ΔIL Is the inductor ripple current.
Considering worst case, the equation is changed to:
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
L =
1−
(2)
fS ⋅ ΔIL,MAX
VIN,MAX
In normal operation, the high-side MOSFET is turned on
at the beginning of each switching cycle, which causes
the current in the inductor to build up. The current-
control loop senses the inductor current by sensing the
voltage across the high-side senseFET during on time.
The output of the current-sense amplifier is summed
with the slope compensation signal and the combined
signal is compared with the error amplifier output to
generate the PWM signal. As the inductor current
ramps up to the controlled value, the high-side
MOSFET is turned off and the inductor current reaches
Input Capacitor Selection
To prevent high-frequency switching current passing to
the input, the input capacitor impedance at the
switching frequency must be less than input source
impedance. High-value, small, inexpensive, lower-ESR
ceramic capacitors are recommended. 10µF ceramic
capacitors should be adequate for 2A applications.
Output Capacitor Selection
A larger output capacitor value keeps the output ripple
voltage smaller. The formula of output ripple ΔVOUT is:
zero through
a freewheeling diode. In light-load
condition, the high-side switch may be kept off for
several cycles to improve efficiency.
⎛
⎜
⎝
⎞
⎟
⎟
⎠
1
⎜
ΔVOUT ≅ ΔIL ESR +
(3)
Short-Circuit Protection
8⋅COUT ⋅fS
The FAN8303 protects output short circuit by switching
frequency fold-back. The oscillator frequency is reduced
to about 45kHz when the output is shorted to ground.
This frequency fold-back allows the inductor current
more time to decay to prevent potential run-away
condition. The oscillator frequency switches to 370kHz
as VOUT rises gradually from 0V back to regulated level.
where COUT is the output capacitor and ESR is the
equivalent series resistance of the output capacitor.
Output Voltage Programming
The output voltage is set by a resistor divider, according
to the following equation:
Slope Compensation and Inductor Peak
Current
⎛
R2 ⎞
VOUT = 0.6 1+
⎜
⎟
(4)
R3
⎝
⎠
The slope compensation provides stability in constant
frequency architecture by preventing sub-harmonic
oscillations at high duty cycles. It is accomplished
internally by adding a compensating ramp to the
inductor current signal at duty cycles in excess of 50%.
Freewheeling Diode
An output freewheeling diode carries load current when
the high-side switch is turned off. Therefore, use a
Schottky diode to reduce loss due to diode forward
voltage and recovery time. The diode should have at
least 2A current rating and a reverse blocking voltage
greater than the maximum input voltage. The diode
should be close to the SW node to keep traces short
and reduce ringing.
Maximum Load Current at Low VIN
The FAN8303 is able to operate with input supply
voltage as low as 5V, although the maximum allowable
output current is reduced as a function of duty cycle
(see Figure 15). Additionally, at this low input voltage; if
the duty cycle is greater than 50%, slope compensation
reduces allowable output current.
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
8
The system crossover frequency (fC), where the control
loop has unity gain, is recommended for setting the
1/10th of switching frequency. Generally, higher fC
means faster response to load transients, but can result
in instability if not properly compensated.
Soft-Start
A capacitor, CSS, connected between the SS pin and
GND helps control the rate of rise on the output voltage.
When EN is HIGH and VIN is within the operating range,
a trimmed bias current charges the capacitor connected
to the SS pin, causing the voltage to rise.
The first step of the compensation design is choosing
the compensation resistor (RC) to set the crossover
frequency by the following equation:
The time it takes this voltage to reach 0.6V and the
PWM output to reach regulation is given by:
2π ⋅COUT ⋅ fC ⋅VOUT
tRISE (ms) ≈ 0.1•CSS
RC =
(5)
(10)
GCS ⋅GEA ⋅VFB
where CSS is in nF.
where VFB is reference voltage and GCS is the current
sense gain, which is roughly the output current divided
by the voltage at COMP (2A/V).
Loop Compensation
The goal of the compensation design is to shape the
converter frequency response to achieve high DC gain
and fast transient, while maintaining loop stability.
FAN8303 employs peak current-mode control for fast
transient response and to help simplify the loop to a
one-pole and one-zero system.
The next step is choosing the compensation capacitor
(CC) to achieve the desired phase margin. For
applications with typical inductor values, setting the
compensation zero, fZ2, to below one fourth of the
crossover frequency provides sufficient phase margin.
Determine the (CC) value by the following equation:
The system pole is calculated by the equation:
1
2
CC
=
(11)
π ⋅RC ⋅fC
fP1
=
(6)
2π ⋅COUT ⋅RL
Determine if the second compensation capacitor (CA) is
required. It is required if the ESR zero of the output
capacitor is located at less than half of the switching
frequency.
where RL is the load resistor value (VOUT/IOUT).
The system zero is due to the output capacitor and its
ESR system zero is calculated by following equation:
1
fS
<
(12)
2π ⋅COUT ⋅ESR
2
1
fz1
=
(7)
2π ⋅COUT ⋅ESR
If required, add the second compensation capacitor
(CA) to set the pole fP3 at the location of the ESR zero.
Determine the (CA) value by the equation:
The characteristics of the control system are controlled
by a series capacitor and resistor network connected to
the COMP pin to set the pole and zero.
COUT ⋅ESR
CA
=
(13)
RC
The pole is calculated by the following equation:
GEA
VO
fp2
=
(8)
SW
FB
2π ⋅CC ⋅ AVEA
FAN8303
where:
_
+
GEA is the error amplifier transconductance (380µA/V);
AVEA is the error amplifier voltage gain (400V/V); and
CC is the compensation capacitor.
PWM
modulator
0.6V
COMP
Zero is due to the compensation capacitor (CC) and
resistor (RC) calculated by the following equation:
RC
CC
CA
1
fz2
=
(9)
2π ⋅CC ⋅ RC
where RC is compensation resistor.
Figure 16. Block Diagram of Compensation
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
9
Design example
Layout Consideration
Assume the VIN voltage is 12V with a 10% tolerance.
The maximum load current is 2A and the output voltage
is set to 2.5V at 2A maximum load. Calculate the
inductor value from the following formula:
As with all switching power supplies, careful attention to
PCB layout is important to the design. A few design
rules should be implemented to ensure good layout:
Keep the high-current traces and load connections
as short as possible.
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
L =
1−
(14)
fOSC ⋅ ΔIL,MAX
VIN,MAX
Place the input capacitor, the inductor, the
freewheeling diode, and the output capacitor as
close as possible to the IC terminals.
Substituting VOUT=2.5V, VIN,MAX=12V, Δ IL,MAX=0.4A, and
fS = 370kHz in the formula gives:
Keep the loop area between the SW node,
freewheeling diode, inductor, and output capacitor
as small as possible. Minimizing ground loops
reduces EMI issues.
2.5
370kHz 0.4A
2.5
12
⎛
⎜
⎞
⎟
L =
1−
= 13μH
(15)
(
)
⎝
⎠
A 15µH inductor is chosen for this application.
Route high-dV/dt signals, such as SW node, away
from the error amplifier input/output pins. Keep
components connected to these pins close to the
pins.
If the VOUT voltage is 2.5V, choose R2=18kΩ(1%), and
R3 can be calculated from:
0.6
⎛
⎜
⎞
⎟
R3 = 18kΩ
= 5.68kΩ
(16)
To effectively remove heat from the MOSFETs, use
wide land areas with appropriate thermal vias.
2.5 − 0.6
⎝
⎠
Choose R3=5.6kΩ (1%).
In this application, with the desired crossover frequency
at 30kHz, RC value is calculated as follows:
2π ⋅ 22μF ⋅ 30kHz ⋅ 2.5V
2A/V ⋅ 380μA/V ⋅ 0.6V
RC
=
(17)
If RC=22.72kΩ , choose 22kΩ for the design.
If RC=22kΩ , use the following equation to get CC:
2
CC
=
(18)
π ⋅ 22kΩ ⋅ 30kHz
CC= 0.965nF, choose 1nF for the design.
Table 1. Recommended Compensation Values
(VIN=12V)
VO
L
COUT
R2
R3
9kΩ
RC
CC
1.8V 10µH
2.5V 15µH
3.3V 15µH
16kΩ
22kΩ
27kΩ
43kΩ
1.5nF
1nF
5.6kΩ
4kΩ
22µF
Figure 17.Recommended PCB Layout
18kΩ
MLCC
820pF
560pF
5V
22µH
2.45kΩ
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev. 1.0.0
www.fairchildsemi.com
10
Physical Dimensions
5.00
4.80
A
0.65
3.81
8
5
B
1.75
6.20
5.80
4.00
3.80
5.60
1
4
PIN ONE
INDICATOR
1.27
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
0.10
0.25
0.19
C
1.75 MAX
0.10
C
0.51
0.33
OPTION A - BEVEL EDGE
0.50
0.25
x 45°
R0.10
R0.10
GAGE PLANE
OPTION B - NO BEVEL EDGE
0.36
NOTES: UNLESS OTHERWISE SPECIFIED
8°
0°
0.90
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
SEATING PLANE
(1.04)
0.406
DETAIL A
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
SCALE: 2:1
Figure 18.8-Lead, Small Outline Integrated Circuit (SOIC-8)
Dimensions
Symbol
Millimeter
Inch
Typ.
Min.
1.346
0.101
Typ.
Max.
1.752
0.254
Min.
0.053
0.004
Max.
0.069
0.010
A
A1
b
0.406
0.203
0.016
0.008
c
D
E
e
4.648
3.810
4.978
3.987
0.183
0.150
0.196
0.157
1.270
0.050
F
0.381X45˚
0.015X45˚
H
L
θ˚
5.791
0.406
0˚
6.197
1.270
8˚
0.228
0.016
0˚
0.244
0.050
8˚
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev.1.0.0
www.fairchildsemi.com
11
© 2008 Fairchild Semiconductor Corporation
FAN8303 • Rev.1.0.0
www.fairchildsemi.com
12
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