FDC654P_NL

更新时间:2024-09-18 16:37:02
品牌:FAIRCHILD
描述:Small Signal Field-Effect Transistor, 3.6A I(D), 30V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, SUPERSOT-6

FDC654P_NL 概述

Small Signal Field-Effect Transistor, 3.6A I(D), 30V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, SUPERSOT-6 小信号场效应晶体管

FDC654P_NL 规格参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOT包装说明:SMALL OUTLINE, R-PDSO-G6
针数:6Reach Compliance Code:compliant
ECCN代码:EAR99风险等级:5.23
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:30 V
最大漏极电流 (Abs) (ID):3.6 A最大漏极电流 (ID):3.6 A
最大漏源导通电阻:0.075 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PDSO-G6JESD-609代码:e3
湿度敏感等级:1元件数量:1
端子数量:6工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:P-CHANNEL
最大功率耗散 (Abs):1.6 W认证状态:Not Qualified
子类别:Other Transistors表面贴装:YES
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

FDC654P_NL 数据手册

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May 2003  
FDC654P  
Single P-Channel Logic Level PowerTrenchÒ MOSFET  
General Description  
Features  
This P-Channel Logic Level MOSFET is produced  
using Fairchild’s advanced PowerTrench process. It  
has been optimized for battery power management  
applications.  
·
–3.6 A, –30 V. RDS(ON) = 75 mW @ VGS = –10 V  
RDS(ON) = 125 mW @ VGS = –4.5 V  
·
·
Low gate charge (6.2 nC typical)  
Applications  
High performance trench technology for extremely  
low RDS(ON)  
·
·
·
Battery management  
Load switch  
Battery protection  
S
D
1
2
3
6
5
4
D
G
D
SuperSOT TM-6  
D
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
VDSS  
Parameter  
Drain-Source Voltage  
Ratings  
Units  
V
–30  
VGSS  
ID  
Gate-Source Voltage  
Drain Current – Continuous  
– Pulsed  
V
A
±20  
–3.6  
(Note 1a)  
–10  
PD  
Maximum Power Dissipation  
(Note 1a)  
(Note 1b)  
1.6  
W
0.8  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
–55 to +150  
°C  
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
78  
30  
RqJA  
°C/W  
°C/W  
RqJC  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
.654  
FDC654P  
7’’  
8mm  
3000 units  
FDC654P Rev E1 (W)  
Ó2003 Fairchild Semiconductor Corporation  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BVDSS  
Drain–Source Breakdown Voltage  
–30  
V
VGS = 0 V, ID = –250 mA  
Breakdown Voltage Temperature  
Coefficient  
–22  
DBVDSS  
DTJ  
ID = –250 mA,Referenced to 25°C  
mV/°C  
IDSS  
Zero Gate Voltage Drain Current  
Gate–Body Leakage, Forward  
Gate–Body Leakage, Reverse  
VDS = –24 V, VGS = 0 V  
–1  
mA  
nA  
nA  
IGSSF  
IGSSR  
VGS = 20 V,  
VDS = 0 V  
100  
VGS = –20 V, VDS = 0 V  
–100  
On Characteristics  
(Note 2)  
VGS(th)  
Gate Threshold Voltage  
–1  
–5  
–1.9  
4
–3  
V
VDS = VGS, ID = –250 mA  
Gate Threshold Voltage  
Temperature Coefficient  
DVGS(th)  
DTJ  
ID = –250 mA, Referenced to 25°C  
mV/°C  
RDS(on)  
Static Drain–Source  
On–Resistance  
VGS = –10 V,  
VGS = –4.5 V,  
ID = –3.6 A  
ID = –2.7 A  
63  
100  
90  
75  
125  
115  
mW  
VGS = –10 V, ID = –3.6A,TJ=125°C  
ID(on)  
gFS  
On–State Drain Current  
VGS = –4.5 V,  
VDS = –5 V,  
VDS = –5 V  
ID = –3.6 A  
A
S
Forward Transconductance  
6
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Input Capacitance  
298  
83  
pF  
pF  
pF  
VDS = –15 V,  
f = 1.0 MHz  
V GS = 0 V,  
Output Capacitance  
Reverse Transfer Capacitance  
39  
Switching Characteristics (Note 2)  
td(on)  
tr  
td(off)  
tf  
Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
6
13  
11  
6
12  
23  
20  
12  
9
ns  
ns  
VDD = –15 V,  
VGS = –10 V,  
ID = –1 A,  
RGEN = 6 W  
ns  
ns  
Qg  
Qgs  
Qgd  
6.2  
1
nC  
nC  
nC  
VDS = –15 V,  
VGS = –10 V  
ID = –3.6 A,  
1.2  
Drain–Source Diode Characteristics and Maximum Ratings  
IS  
Maximum Continuous Drain–Source Diode Forward Current  
–1.3  
–1.2  
A
V
VSD  
Drain–Source Diode Forward  
Voltage  
VGS = 0 V, IS = –1.3 A (Note 2)  
–0.8  
Notes:  
1. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins. RqJC is guaranteed by design while RqCA is determined by the user's board design.  
a)  
78°C/W when  
b)  
156°C/W when mounted  
on a minimum pad of 2 oz  
copper  
mounted on a 1in2 pad  
of 2 oz copper  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width < 300ms, Duty Cycle < 2.0%  
FDC654P Rev E1(W)  
Typical Characteristics  
15  
2
1.8  
1.6  
1.4  
1.2  
1
VGS = -10V  
-6.0V  
-5.0V  
12  
9
-4.5V  
VGS = -3.5V  
-4.0V  
-4.0V  
-4.5V  
6
-5.0V  
-3.5V  
-6.0V  
0.8  
0.6  
0.4  
-7.0V  
12  
3
-10V  
-3.0V  
0
0
1
2
3
4
5
0
3
6
9
15  
-VDS, DRAIN TO SOURCE VOLTAGE (V)  
-ID, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
1.6  
1.4  
1.2  
1
0.3  
ID = -3.6A  
VGS = -10V  
ID = -1.8A  
0.25  
0.2  
TA = 125oC  
0.15  
0.1  
0.8  
0.6  
TA = 25oC  
0.05  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
2
4
6
8
10  
TJ, JUNCTION TEMPERATURE (oC)  
-VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
10  
8
10  
VGS = 0V  
TA = -55oC  
VDS = -5.0V  
25oC  
125oC  
1
TA = 125oC  
6
0.1  
25oC  
4
0.01  
0.001  
-55oC  
2
0
0.0001  
1
2
3
4
5
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
-VGS, GATE TO SOURCE VOLTAGE (V)  
-VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDC654P Rev E1(W)  
Typical Characteristics  
10  
400  
300  
200  
100  
0
f = 1 MHz  
VGS = 0 V  
VDS = -5V  
ID = -3.6A  
-10V  
CISS  
8
6
4
2
0
-15V  
COSS  
CRSS  
0
1
2
3
4
5
6
7
0
6
12  
18  
24  
30  
Qg, GATE CHARGE (nC)  
-VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
100  
10  
10  
8
SINGLE PULSE  
RqJA = 156°C/W  
TA = 25°C  
RDS(ON) LIMIT  
10ms  
100ms  
1ms  
6
10ms  
100ms  
1s  
1
4
VGS = -10V  
DC  
SINGLE PULSE  
RqJA = 156oC/W  
TA = 25oC  
0.1  
0.01  
2
0
0.1  
1
10  
100  
0.01  
0.1  
1
10  
100  
-VDS, DRAIN-SOURCE VOLTAGE (V)  
t1, TIME (sec)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
RqJA(t) = r(t) + RqJA  
R
qJA = 156oC/W  
0.2  
P(pk)  
0.1  
0.1  
t1  
0.05  
t2  
0.02  
0.01  
TJ - TA = P * RqJA(t)  
Duty Cycle, D = t1 / t2  
100 1000  
SINGLE PULSE  
0.01  
0.0001  
0.001  
0.01  
0.1  
1
10  
t1, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDC654P Rev E1(W)  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarksꢀ  
ACEx™  
PACMAN™  
POP™  
Power247™  
PowerTrench  
QFET™  
QS™  
SPM™  
Stealth™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
ImpliedDisconnect™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MicroPak™  
MICROWIRE™  
MSX™  
FACT™  
ActiveArray™  
Bottomless™  
CoolFET™  
CROSSVOLT™  
DOME™  
EcoSPARK™  
E2CMOSTM  
EnSignaTM  
FACT Quiet Series™  
â
FAST  
â
FASTr™  
FRFET™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
I2C™  
SyncFET™  
â
QT Optoelectronics™ TinyLogic  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
TruTranslation™  
UHC™  
UltraFET  
MSXPro™  
OCX™  
â
OCXPro™  
OPTOLOGIC  
Across the boardAround the worldꢀ™  
The Power Franchise™  
ProgrammableActive Droop™  
â
â
SILENT SWITCHER VCX™  
SMARTSTART™  
OPTOPLANAR™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGNꢀ FAIRCHILD  
DOES NOTASSUMEANY LIABILITYARISING OUT OF THEAPPLICATION OR USE OFANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERSꢀ  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATIONꢀ  
As used herein:  
1ꢀ Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
userꢀ  
2ꢀ A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectivenessꢀ  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product developmentꢀ Specifications may change in  
any manner without noticeꢀ  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later dateꢀ  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
designꢀ  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specificationsꢀ Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve designꢀ  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductorꢀ  
The datasheet is printed for reference information onlyꢀ  
Revꢀ I2  

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