FDD6685_11 [FAIRCHILD]
30V P-Channel PowerTrenchà MOSFET; 30V P沟道PowerTrenchà ? MOSFET型号: | FDD6685_11 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | 30V P-Channel PowerTrenchà MOSFET |
文件: | 总6页 (文件大小:187K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
May 2011
FDD6685
30V P-Channel PowerTrenchÒ MOSFET
General Description
Features
This P-Channel MOSFET is a rugged gate version of
Fairchild Semiconductor’s advanced PowerTrench
process. It has been optimized for power management
applications requiring a wide range of gave drive
voltage ratings (4.5V – 25V).
·
–40 A, –30 V. RDS(ON) = 20 mW @ VGS = –10 V
RDS(ON) = 30 mW @ VGS = –4.5 V
·
·
Fast switching speed
High performance trench technology for extremely
low RDS(ON)
·
·
High power and current handling capability
Qualified to AEC Q101
S
D
G
G
S
TO-252
D
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
Parameter
Drain-Source Voltage
Ratings
–30
Units
V
VGSS
Gate-Source Voltage
V
±25
ID
–40
–11
–100
52
Continuous Drain Current @TC=25°C
@TA=25°C
(Note 3)
(Note 1a)
A
Pulsed, PW £ 100µs(Note 1b)
PD
W
Power Dissipation for Single Operation
(Note 1)
(Note 1a)
(Note 1b)
3.8
1.6
TJ, TSTG
Operating and Storage Junction Temperature Range
°C
–55 to +175
Thermal Characteristics
Thermal Resistance, Junction-to-Case
(Note 1)
(Note 1a)
(Note 1b)
2.9
40
96
RqJC
RqJA
RqJA
°C/W
°C/W
°C/W
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry.
For a copy of the requirements, see AEC Q101 at http://www.aecouncil.com/
Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html.
All Fairchild Semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems
certification.
Ó2011 Fairchild Semiconductor Corporation
FDD6685 Rev D1
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape Width
Quantity
FDD6685
FDD6685
13”
12mm
2500 units
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Drain-Source Avalanche Ratings (Note 4)
EAS
IAS
Single Pulse Drain-Source
Avalanche Energy
Maximum Drain-Source
Avalanche Current
ID = –11 A
42
mJ
A
–11
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
–30
V
VGS = 0 V, ID = –250 mA
DBVDSS
DTJ
Breakdown Voltage Temperature
Coefficient
–24
ID = –250 mA, Referenced to 25°C
VDS = –24 V, VGS = 0 V
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate–Body Leakage
–1
mA
VGS = ±25V,
VDS = 0 V
±100
nA
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
–1
–1.8
5
–3
V
VDS = VGS, ID = –250 mA
DVGS(th)
DTJ
Gate Threshold Voltage
Temperature Coefficient
ID = –250 mA, Referenced to 25°C
mV/°C
14
21
20
mW
RDS(on)
Static Drain–Source
On–Resistance
VGS = –10 V,
VGS = –4.5 V,
VGS = –10 V,ID = –11 A,TJ=125°C
ID = –11 A
ID = –9 A
20
30
ID(on)
gFS
On–State Drain Current
VGS = –10 V,
VDS = –5 V,
VDS = –5 V
ID = –11 A
–20
A
S
Forward Transconductance
26
Dynamic Characteristics
Ciss
Coss
Crss
RG
Input Capacitance
1715
440
225
3.6
pF
pF
pF
W
VDS = –15 V,
f = 1.0 MHz
V GS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VGS = 15 mV,
f = 1.0 MHz
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
17
11
43
21
17
9
31
21
68
34
24
ns
ns
VDD = –15 V,
VGS = –10 V,
ID = –1 A,
RGEN = 6 W
ns
ns
Qg
Qgs
Qgd
nC
nC
nC
VDS = –15V,
VGS = –5 V
ID = –11 A,
4
Drain–Source Diode Characteristics and Maximum Ratings
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = –3.2 A (Note 2)
–0.8 –1.2
V
Trr
IF = –11 A,
diF/dt = 100 A/µs
26
13
ns
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
Qrr
nC
FDD6685 Rev D1
Electrical Characteristics
TA = 25°C unless otherwise noted
Notes:
1. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RqJC is guaranteed by design while RqCA is determined by the user's board design.
a)
R
qJA = 40°C/W when mounted on a
b)
R
qJA = 96°C/W when mounted
1in2 pad of 2 oz copper
on a minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300ms, Duty Cycle < 2.0%
P
D
RDS(ON)
3. Maximum current is calculated as:
where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VGS = 10V.
4. Starting TJ = 25°C, L = 0.69mH, IAS = –11A
FDD6685 Rev D1
Typical Characteristics
40
2.4
2.2
2
VGS = -10V
-6.0V
-4.5V
-4.0V
VGS = -3.5V
-5.0V
30
20
10
0
1.8
1.6
1.4
1.2
1
-4.0V
-3.5V
-4.5V
-5.0V
-6.0V
-8.0V
-3.0V
-10V
0.8
0
2
4
6
8
10
0
1
2
3
175
5
-VDS, DRAIN-SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
0.08
ID = -11.0A
VGS = -10V
ID = -5.5A
1.4
1.2
1
0.06
0.04
0.02
0
TA = 125oC
0.8
0.6
TA = 25oC
-50
-25
0
25
50
75
100
125
150
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
40
30
20
10
0
100
TA = -55oC
VGS = 0V
125oC
VDS = -5V
10
TA = 125oC
25oC
1
25oC
0.1
-55oC
0.01
0.001
0.0001
1
2
3
4
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDD6685 Rev D1
Typical Characteristics
10
2400
1800
1200
600
0
ID = -11.0 A
f = 1MHz
VGS = 0 V
VDS = 10V
8
30V
Ciss
6
4
2
0
20V
Coss
Crss
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
1000
100
80
60
40
20
0
SINGLE PULSE
RqJA = 96°C/W
100
10
TA = 25°C
100µs
1ms
10ms
100ms
RDS(ON) LIMIT
1
10s
DC
1
VGS = 10V
SINGLE PULSE
0.1
R
qJA = 96oC/W
TA = 25oC
0.01
0.01
0.1
1
10
100
1000
0.01
0.10
1.00
10.00
100.00
VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RqJA(t) = r(t) * RqJA
RqJA = 96 °C/W
0.2
0.1
0.1
0.05
0.02
P(pk)
t1
0.01
t2
0.01
TJ - TA = P * RqJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDD6685 Rev D1
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Datasheet contains the design specifications for product development. Specifications
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Rev. I54
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