FDN340PS62Z [FAIRCHILD]

Small Signal Field-Effect Transistor, 2A I(D), 20V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, SUPERSOT-3;
FDN340PS62Z
型号: FDN340PS62Z
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Small Signal Field-Effect Transistor, 2A I(D), 20V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, SUPERSOT-3

开关 光电二极管 晶体管
文件: 总5页 (文件大小:99K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
September 2001  
FDN340P  
Single P-Channel, Logic Level, PowerTrenchÒ MOSFET  
General Description  
Features  
This P-Channel Logic Level MOSFET is produced  
using Fairchild Semiconductor advanced Power Trench  
process that has been especially tailored to minimize  
the on-state resistance and yet maintain low gate  
charge for superior switching performance.  
· –2A, 20 V  
RDS(ON) = 70 mW @ VGS = –4.5 V  
RDS(ON) = 110 mW @ VGS = –2.5 V  
· Low gate charge (7.2 nC typical).  
These devices are well suited for portable electronics  
applications: load switching and power management,  
battery charging circuits, and DC/DC conversion.  
· High performance trench technology for extremely  
low RDS(ON)  
.
· High power version of industry Standard SOT-23  
package. Identical pin-out to SOT-23 with 30%  
higher power handling capability.  
D
D
TM  
S
SuperSOT -3  
G
G
S
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
Parameter  
Ratings  
Units  
VDSS  
Drain-Source Voltage  
–20  
V
VGSS  
ID  
Gate-Source Voltage  
±8  
–2  
V
A
Drain Current – Continuous  
– Pulsed  
(Note 1a)  
–10  
PD  
Power Dissipation for Single Operation  
(Note 1a)  
(Note 1b)  
0.5  
W
0.46  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
–55 to +150  
°C  
Thermal Characteristics  
°C/W  
°C/W  
RqJA  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1)  
250  
75  
RqJC  
Thermal Resistance, Junction-to-Case  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
340  
FDN340P  
7’’  
8mm  
3000 units  
Ó2001 Fairchild Semiconductor Corporation  
FDN340P Rev E (W)  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BVDSS  
Drain–Source Breakdown Voltage  
VGS = 0 V, ID = –250 mA  
–20  
V
Breakdown Voltage Temperature  
Coefficient  
DBVDSS  
DTJ  
ID = –250 mA,Referenced to 25°C  
–12  
mV/°C  
mA  
VDS = –16 V, VGS = 0 V  
–1  
–10  
100  
–100  
IDSS  
Zero Gate Voltage Drain Current  
VDS = –16 V, VGS = 0 V,TJ=55°C  
IGSSF  
IGSSR  
Gate–Body Leakage, Forward  
Gate–Body Leakage, Reverse  
VGS = 8 V,  
VDS = 0 V  
VDS = 0 V  
nA  
nA  
VGS = –8 V,  
On Characteristics  
(Note 2)  
VGS(th)  
Gate Threshold Voltage  
Gate Threshold Voltage  
Temperature Coefficient  
VDS = VGS, ID = –250 mA  
–0.4  
–0.8  
3
–1.5  
V
mV/°C  
W
DVGS(th)  
DTJ  
RDS(on)  
ID = –250 mA,Referenced to 25°C  
Static Drain–Source  
On–Resistance  
VGS = –4.5 V, ID = –2 A  
60  
77  
82  
70  
120  
110  
VGS = –4.5 V, ID = –2 A,TJ=125°C  
VGS= –2.5 V,  
ID = –1.7A,  
ID(on)  
gFS  
On–State Drain Current  
VGS = –4.5 V, VDS = –5 V  
–5  
A
S
Forward Transconductance  
VDS = –4.5 V,  
ID = –2 A  
9
Dynamic Characteristics  
600  
175  
80  
Input Capacitance  
779  
121  
56  
pF  
pF  
pF  
VDS = –10 V,  
f = 1.0 MHz  
V GS = 0 V,  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics (Note 2)  
td(on)  
tr  
td(off)  
tf  
Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
VDD = –10 V,  
VGS = –4.5 V,  
ID = –1 A,  
RGEN = 6 W  
10  
9
20  
10  
43  
20  
10  
ns  
ns  
27  
11  
7.2  
1.7  
1.5  
ns  
ns  
Qg  
VDS = –10V,  
VGS = –4.5 V  
ID = –3.5 A,  
nC  
nC  
nC  
Qgs  
Qgd  
Drain–Source Diode Characteristics and Maximum Ratings  
IS  
Maximum Continuous Drain–Source Diode Forward Current  
–0.42  
–1.2  
A
V
Drain–Source Diode Forward  
VSD  
VGS = 0 V, IS = –0.42 A (Note 2)  
–0.7  
Voltage  
Notes:  
1.  
R
qJAis the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins. RqJCis guaranteed by design while RqCAis determined by the user's board design.  
a. 250°C/W when mounted on a  
0.02in pad of 2 oz copper  
b. 270°C/W when mounted on a  
2
.001 in pad of 2 oz copper  
2
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width < 300ms, Duty Cycle < 2.0%  
FDN340P Rev E (W)  
Typical Characteristics  
15  
2
1.8  
1.6  
1.4  
1.2  
1
VGS = -4.5V  
-3.0V  
-2.5V  
-3.5V  
VGS=-2.0V  
12  
9
-2.0V  
-2.5V  
6
-3.0V  
-3.5V  
3
-4.5V  
-1.5V  
0
0.8  
0
1
2
3
4
0
3
6
9
12  
15  
-VDS , DRAIN TO SOURCE VOLTAGE (V)  
-ID, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
1.4  
1.3  
0.22  
ID = -1A  
ID = -2A  
VGS = -4.5V  
0.18  
0.14  
0.1  
1.2  
1.1  
1
TA = 125oC  
TA = 25oC  
0.9  
0.8  
0.7  
0.06  
0.02  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
1
2
3
4
5
TJ, JUNCTION TEMPERATURE (oC)  
-VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
10  
8
10  
VDS = -5V  
VGS = 0V  
TA = -55oC  
25oC  
125oC  
1
TA = 125oC  
6
0.1  
25oC  
4
0.01  
-55o  
C
2
0.001  
0
0.0001  
0.5  
1
1.5  
2
2.5  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
-VGS, GATE TO SOURCE VOLTAGE (V)  
-VSD , BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDN340P Rev E (W)  
Typical Characteristics  
5
1000  
800  
600  
400  
200  
0
f = 1 MHz  
VGS = 0 V  
ID = -3.5A  
VDS = -5V  
-10V  
CISS  
4
3
2
1
0
-15V  
COSS  
CRSS  
0
1
2
3
4
5
6
7
8
9
0
5
10  
15  
20  
Qg, GATE CHARGE (nC)  
-VDS , DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
50  
40  
30  
20  
10  
0
100  
10  
SINGLE PULSE  
R
= 270° C/W  
qJA  
RDS(ON) LIMIT  
100ms  
1ms  
10ms  
T
= 25°C  
A
100ms  
1
1s  
DC  
VGS = -10V  
SINGLE PULSE  
0.1  
0.01  
R
qJA = 270oC/W  
TA = 25oC  
0.001  
0.01  
0.1  
1
10  
100  
0.1  
1
10  
100  
SINGLE PULSE TIME (SEC)  
-VDS, DRAIN-SOURCE VOLTAGE (V)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
0.5  
0.2  
0.2  
R
JA (t) = r(t) * R JA  
q
q
0.1  
R
= 270 °C/W  
JA  
q
0.1  
0.05  
0.05  
0.02  
P(pk)  
0.01  
0.02  
t
1
Single Pulse  
0.01  
t
2
0.005  
T
J
- T = P * R  
(t)  
qJA  
A
Duty Cycle, D = t /t  
1
2
0.002  
0.001  
0.0001  
0.001  
0.01  
0.1  
t , TIME (sec)  
1
10  
100  
300  
1
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDN340P Rev E (W)  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
â
SMART START™  
STAR*POWER™  
Stealth™  
VCX™  
FAST  
ACEx™  
Bottomless™  
CoolFET™  
OPTOLOGIC™  
OPTOPLANAR™  
PACMAN™  
FASTr™  
FRFET™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MicroPak™  
MICROWIRE™  
CROSSVOLT™  
DenseTrench™  
DOME™  
POP™  
Power247™  
PowerTrenchâ  
QFET™  
EcoSPARK™  
E2CMOSTM  
TinyLogic™  
QS™  
EnSignaTM  
TruTranslation™  
UHC™  
QT Optoelectronics™  
Quiet Series™  
SILENTSWITCHERâ  
FACT™  
FACT Quiet Series™  
UltraFETâ  
STAR*POWER is used under license  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOT ASSUME ANY LIABILITYARISING OUT OF THE APPLICATION OR USE OFANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICESORSYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFFAIRCHILDSEMICONDUCTORCORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. H4  

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