FDN361BN [FAIRCHILD]

30V N-Channel, Logic Level, PowerTrench MOSFET; 30V N沟道逻辑电平的PowerTrench MOSFET
FDN361BN
型号: FDN361BN
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

30V N-Channel, Logic Level, PowerTrench MOSFET
30V N沟道逻辑电平的PowerTrench MOSFET

晶体 小信号场效应晶体管 开关 光电二极管 PC
文件: 总5页 (文件大小:97K)
中文:  中文翻译
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October 2005  
FDN361BN  
30V N-Channel, Logic Level, PowerTrench® MOSFET  
General Description  
Features  
These N-Channel Logic Level MOSFETs are produced  
1.8 A, 30 V.  
RDS(ON) = 110 mΩ @ VGS = 10 V  
RDS(ON) = 160 mΩ @ VGS = 4.5 V  
using  
Fairchild  
Semiconductor’s  
advanced  
PowerTrench process that has been especially tailored  
to minimize the on-state resistance and yet maintain  
superior switching performance.  
Low gate charge  
These devices are particularly suited for low voltage  
applications in notebook computers, portable phones,  
PCMCIA cards, and other battery powered circuits  
where fast switching, and low in-line power loss are  
needed in a very small outline surface mount package.  
Industry standard outline SOT-23 surface mount  
package using proprietary SuperSOTTM-3 design for  
superior thermal and electrical capabilities  
High performance trench technology for extremely  
low RDS(ON)  
D
D
S
S
G
SuperSOTTM-3  
G
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
VDSS  
Parameter  
Drain-Source Voltage  
Ratings  
Units  
30  
V
V
A
VGSS  
Gate-Source Voltage  
± 20  
ID  
Drain Current – Continuous  
– Pulsed  
(Note 1a)  
1.4  
10  
Power Dissipation for Single Operation  
(Note 1a)  
(Note 1b)  
0.5  
PD  
W
0.46  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
–55 to +150  
°C  
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
250  
75  
RθJA  
°C/W  
RθJC  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
361B  
FDN361BN  
7’’  
8mm  
3000 units  
www.fairchildsemi.com  
©2005 Fairchild Semiconductor Corporation  
FDN361BN Rev A(W)  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BVDSS  
Drain–Source Breakdown Voltage  
30  
V
VGS = 0 V,  
ID = 250 μA  
ΔBVDSS  
ΔTJ  
Breakdown Voltage Temperature  
Coefficient  
26  
ID = 250 μA,Referenced to 25°C  
mV/°C  
IDSS  
Zero Gate Voltage Drain Current  
VDS = 24 V,  
VGS = 0 V  
1
μA  
μA  
nA  
10  
VDS = 24 V, VGS = 0 V, TJ = 55°C  
IGSS  
Gate–Body Leakage  
VGS = ±20 V,  
VDS = 0 V  
±100  
On Characteristics  
(Note 2)  
VGS(th)  
Gate Threshold Voltage  
1
2.1  
3
V
V
DS = VGS  
,
ID = 250 μA  
RDS(on)  
Static Drain–Source  
On–Resistance  
VGS = 10 V,  
VGS = 4.5 V,  
ID = 1.4 A  
ID = 1.2 A  
92  
120  
114  
110  
160  
150  
mΩ  
V
GS = 10 V, ID = 1.4 A, TJ = 125°C  
ID(on)  
gFS  
On–State Drain Current  
VGS = 4.5 V,  
VDS = 5 V,  
VDS = 5 V  
3.5  
A
S
Forward Transconductance  
ID = 1.4 A  
4
Dynamic Characteristics  
Ciss  
Coss  
Crss  
RG  
Input Capacitance  
145  
35  
193  
47  
pF  
pF  
pF  
Ω
V
DS = 15 V,  
V GS = 0 V,  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
f = 1.0 MHz  
15  
23  
VGS = 15 mV,  
f = 1.0 MHz  
1.6  
Switching Characteristics (Note 2)  
td(on)  
tr  
td(off)  
tf  
Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
3
8
6
16  
29  
4
ns  
ns  
VDD = 15 V,  
VGS = 10 V,  
ID = 1 A,  
RGEN = 6 Ω  
16  
2
ns  
ns  
Qg  
Qgs  
Qgd  
1.3  
0.5  
0.5  
1.8  
nC  
nC  
nC  
VDS = 15 V,  
VGS = 4.5 V  
ID = 1.4 A,  
Drain–Source Diode Characteristics  
VSD  
Drain–Source Diode Forward  
Voltage  
VGS = 0 V, IS = 0.42 A (Note 2)  
IF = 1.4 A, diF/dt = 100 A/µs  
0.8  
1.2  
22  
V
trr  
11  
4
nS  
nC  
Diode Reverse Recovery Time  
Diode Reverse Recovery Charge  
Qrr  
Notes:  
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.  
b) 270°C/W when mounted on a  
minimum pad.  
a) 250°C/W when mounted on a  
2
0.02 in pad of 2 oz. copper.  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width 300 μs, Duty Cycle 2.0%  
FDN361BN Rev A(W)  
www.fairchildsemi.com  
Typical Characteristics  
5
2.8  
2.6  
2.4  
2.2  
2
VGS = 10V  
6.0V  
4.5V  
4
3
2
1
0
VGS = 3.5V  
3.5V  
1.8  
1.6  
1.4  
1.2  
1
4.0V  
4.5V  
5.0V  
6.0V  
10V  
3.0V  
0.8  
0
1
2
3
4
5
0
0.5  
1
1.5  
2
ID, DRAIN CURRENT (A)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
1.6  
1.4  
1.2  
1
0.25  
ID = 1.4A  
VGS = 10V  
ID = 0.7A  
0.225  
0.2  
0.175  
TA = 125oC  
0.15  
0.125  
0.8  
0.6  
0.1  
TA = 25oC  
0.075  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
3
4
5
6
7
8
9
10  
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
10  
5
VDS = 5V  
VGS = 0V  
1
4
3
TA = 125oC  
0.1  
25oC  
0.01  
2
TA = 125oC  
-55oC  
25oC  
1
0.001  
-55oC  
0
0.0001  
2
2.5  
3
3.5  
4
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
VGS, GATE TO SOURCE VOLTAGE (V)  
V
SD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDN361BN Rev A(W)  
www.fairchildsemi.com  
Typical Characteristics  
10  
200  
180  
160  
140  
120  
100  
80  
f = 1 MHz  
GS = 0 V  
ID =1.4A  
VDS = 10V  
15V  
V
CISS  
8
6
4
2
0
20V  
60  
COSS  
40  
20  
CRSS  
0
0
5
10  
15  
20  
25  
30  
0
0.5  
1
1.5  
2
2.5  
3
Qg, GATE CHARGE (nC)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
100  
10  
5
4
3
2
1
0
SINGLE PULSE  
RθJA = 270°C/W  
TA = 25°C  
100μs  
RDS(ON) LIMIT  
1ms  
10ms  
1
100ms  
1s  
VGS = 10V  
DC  
SINGLE PULSE  
RθJA = 270oC/W  
TA = 25oC  
0.1  
0.01  
0.1  
1
10  
100  
0.01  
0.1  
1
10  
100  
1000  
VDS, DRAIN-SOURCE VOLTAGE (V)  
t1, TIME (sec)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
RθJA(t) = r(t) * RθJA  
RθJA = 270oC/W  
0.2  
0.1  
0.1  
P(pk)  
0.05  
t1  
0.02  
t2  
0.01  
0.01  
TJ - TA = P * RθJA(t)  
Duty Cycle, D = t1 / t2  
SINGLE PULSE  
0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t1, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDN361BN Rev A(W)  
www.fairchildsemi.com  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
®
ACEx™  
PowerSaver™  
SuperSOT™-8  
SyncFET™  
TinyLogic  
ISOPLANAR™  
LittleFET™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MICROWIRE™  
MSX™  
FAST  
®
ActiveArray™  
Bottomless™  
Build it Now™  
CoolFET™  
CROSSVOLT™  
DOME™  
EcoSPARK™  
E2CMOS™  
EnSigna™  
FACT™  
PowerTrench  
FASTr™  
FPS™  
FRFET™  
GlobalOptoisolator™  
GTO™  
®
®
QFET  
QS™  
TINYOPTO™  
TruTranslation™  
UHC™  
QT Optoelectronics™  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
μSerDes™  
SILENT SWITCHER  
SMART START™  
SPM™  
®
UltraFET  
HiSeC™  
I2C™  
UniFET™  
VCX™  
Wire™  
MSXPro™  
OCX™  
i-Lo™  
ImpliedDisconnect™  
IntelliMAX™  
®
OCXPro™  
OPTOLOGIC  
®
OPTOPLANAR™  
PACMAN™  
POP™  
Power247™  
PowerEdge™  
FACT Quiet Series™  
Stealth™  
Across the board. Around the world.™  
SuperFET™  
SuperSOT™-3  
SuperSOT™-6  
®
The Power Franchise  
Programmable Active Droop™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY  
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY  
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT  
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. I16  

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